MPC102 [BB]
Wide-Bandwidth DIFFERENTIAL 2 x 1 MULTIPLEXER; 高带宽差分2× 1多路复用器
| 型号： | MPC102 |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | Wide-Bandwidth DIFFERENTIAL 2 x 1 MULTIPLEXER |
| 文件： | 总12页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MPC102
®
MPC102
MPC102
Wide-Bandwidth
DIFFERENTIAL 2 x 1 MULTIPLEXER
The MPC102 consists of four identical monolithic,
FEATURES
● BANDWIDTH: 210MHz (1.4Vp-p)
integrated, open-loop buffer amplifiers. Two buffer
outputs are each connected internally at the output.
The bipolar complementary buffers form a unidirec-
tional transmission path and offer extremely high
output-to-input isolation. The MPC102 multiplexer
enables the user to connect one of two input signals to
the corresponding output. The output of the multi-
plexer is in a high-impedance state when no channel is
selected. When one channel is selected with a digital
“1” at the corresponding SEL input, the component
acts as a buffer with high input impedance and low
output impedance.
● LOW INTERCHANNEL CROSSTALK:
–68dB (30MHz, SO); –58dB (30MHz, DIP)
● LOW SWITCHING TRANSIENTS:
+6mV/–8mV
● LOW DIFFERENTIAL GAIN/PHASE
ERRORS: 0.02%, 0.02°
● LOW QUIESCENT CURRENT:
One Channel Selected: ±4.6mA
No Channel Selected: ±250µA
The wide bandwidth of over 210MHz at 1.4Vp-p
signal level, high linearity and low distortion, and low
input voltage noise of 4nV/√Hz make this crosspoint
switch suitable for RF and video applications. All
performance is specified with ±5V supply voltage,
which reduces power consumption in comparison with
±15V designs. The multiplexer is available in a space-
saving SO-14 and DIP packages. Both are designed
and specified for operation over the industrial tem-
perature range (–40°C to +85°C.)
APPLICATIONS
● VIDEO ROUTING AND MULTIPLEXING
(CROSSPOINTS)
● RADAR SYSTEMS
● DATA ACQUISITION
● DISC R/W TEST SYSTEMS
● xDSL TEST SYSTEMS
IN1
+1
DESCRIPTION
VOUT1
The MPC102 is dual, wide-bandwidth, differential 2-
to-1 multiplexer, which can be used in a wide variety
of applications.
IN2
+1
IN3
+1
VOUT2
It was designed for wide-bandwidth systems, includ-
ing high-definition television and broadcast equip-
ment. Although it is primarily used to route video
signals, the harmonic and dynamic attributes of the
MPC102 also make it appropriate for other analog
signal routing applications such as radar, communica-
tions, computer graphics, and data acquisition sys-
tems.
IN4
+1
SEL1 SEL2 SEL3 SEL4
TRUTH TABLE
SEL1
SEL2
SEL3
SEL4
VOUT1
VOUT2
0
1
0
0
0
0
0
1
0
0
0
0
0
1
0
0
0
0
0
1
HI-Z
IN1
HI-Z
HI-Z
HI-Z
IN3
IN2
HI-Z
HI-Z
IN4
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
FAXLine: (800) 548-6133 (US/Canada Only)
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706
•
Tel: (520) 746-1111
•
Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
©1993 Burr-Brown Corporation
PDS-1202E
Printed in U.S.A. January, 1995
SPECIFICATIONS
ELECTRICAL
At VCC = ±5V, RL = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC102AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
DC CHARACTERISTICS
INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
Initial Matching
RIN = 0, RSOURCE = 0
14
60
–74
–50
–50
±3
±30
mV
µV/°C
dB
dB
dB
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
All Four Buffers
–40
mV
INPUT BIAS CURRENT
Initial
4
±10
µA
vs Temperature
20
nA/°C
nA/V
µA/V
µA/V
vs Supply (Tracking)
vs Supply (Non-tracking)
vs Supply (Non-tracking)
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
±710
0.26
1.7
INPUT IMPEDANCE
Resistance
Capacitance
Channel On
Channel On
Channel Off
0.88
1.0
1.0
MΩ
pF
pF
Capacitance
INPUT NOISE
Voltage Noise Density
Signal-to-Noise Ratio
fOUT = 20kHz to 10MHz
S/N = 0.7/(VIN • √5MHz)
4.0
98
nV/√Hz
dB
INPUT VOLTAGE RANGE
Gain Error ≤ 10%
±3.6
V
TRANSFER CHARACTERISTICS
Voltage Gain
Voltage Gain
RL = 1kΩ, VIN = ±2V
RL = 10kΩ, VIN = ±2.8V
0.982
0.992
V/V
V/V
0.98
RATED OUTPUT
Voltage
Resistance
Resistance
Capacitance
VIN = ±3V, RL = 10kΩ
One Channel Selected
No Channel Selected
No Channel Selected
±2.8
±2.98
11
900
1.5
V
Ω
MΩ
pF
CHANNEL SELECTION INPUTS
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
+2
VCC
+0.8
150
5
V
V
µA
µA
VSEL = 5.0V
VSEL = 0.8V
100
SWITCHING CHARACTERISTICS
SEL to Channel ON Time
SEL to Channel OFF Time
Switching Transient, Positive
Switching Transient, Negative
VIN = –0.3V to +0.7V, f = 5MHz
90% Point of VOUT = 1Vp-p
10% Point of VOUT = 1Vp-p
Measured While Switching
0.25
0.25
6
µs
µs
mV
mV
Between Two Grounded Channels
–8
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
±5
V
V
mA
µA
dB
±4.5
±5.5
±5
±350
One Channel Selected
No Channel Selected
±4.6
±250
–80
Rejection Ratio
TEMPERATURE RANGE
Operating
Storage
–40
–40
+85
+125
°C
°C
Thermal Resistance, θJA
90
°C/W
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
2
MPC102
SPECIFICATIONS—AC CHARACTERISTICS (CONT)
At VCC = ±5V, RL = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
MPC102AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
LARGE SIGNAL BANDWIDTH (–3dB)
VOUT = 5.0Vp-p, COUT = 1pF
55
100
210
MHz
MHz
MHz
V
V
OUT = 2.8Vp-p, COUT = 1pF
OUT = 1.4Vp-p, COUT = 1pF
SMALL SIGNAL BANDWIDTH
GROUP DELAY TIME
VOUT = 0.2Vp-p, COUT = 1pF
370
450
MHz
ps
DIFFERENTIAL GAIN
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.02
%
DIFFERENTIAL PHASE
f = 4.43MHz, VIN = 0.3Vp-p
VDC = 0 to 0.7V
0.02
Degrees
GAIN FLATNESS PEAKING
VOUT = 0.2Vp-p, DC to 30MHz
VOUT = 0.2Vp-p, DC to 100MHz
0.04
0.05
dB
dB
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
f = 30MHz, VOUT = 1.4Vp-p, RL = 350Ω
–64
–66
dBc
dBc
CROSSTALK
MPC102AP Channel-to-Channel
VIN = 1.4Vp-p
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz,
f = 5MHz,
f = 30MHz
–75
–58
–70
–71
–78
–68
–75
–76
dB
dB
dB
dB
dB
dB
dB
dB
Off Isolation
MPC102AU Channel-to-Channel
Off Isolation
TIME DOMAIN
RISE/FALL TIME
VOUT = 1.4Vp-p, Step 10% to 90%
COUT = 1pF, ROUT = 22Ω
2.5
ns
SLEW RATE
VOUT = 1.4Vp-p
COUT = 1pF
500
360
260
V/µs
V/µs
V/µs
COUT = 22pF
COUT = 47pF
®
3
MPC102
CONNECTION DIAGRAM
PIN DESCRIPTION
PIN
DESCRIPTION
Top View
DIP/SO-14
IN1, IN2
IN3, IN4
Analog Inputs Channel 1 and 2
Analog Inputs Channel 3 and 4
GND
Analog Shielding Grounds, Connect to System Ground
Channel Selection Inputs
+1
+1
+1
IN1
GND
IN2
1
2
3
4
5
6
7
14 SEL1
13 SEL2
12 VOUT1
11 –VCC
10 VOUT2
SEL1, SEL2
VOUT1
Analog Output 1
VOUT2
Analog Output 2
+VCC
IN3
–VCC
Negative Supply Voltage; typical –5VDC
Positive Supply Voltage; typical +5VDC
+VCC
GND
IN4
9
8
SEL3
SEL4
+1
ELECTROSTATIC
DISCHARGE SENSITIVITY
MPC102
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage (±VCC) .............................................................. ±6V
Analog Input Voltage (IN1 through IN4) ................................... ±VCC, ±0.7V
Operating Temperature ..................................................... –40°C to +85°C
Storage Temperature ...................................................... –40°C to +125°C
Output Current .................................................................................. ±6mA
Junction Temperature .................................................................... +175°C
Lead Temperature (soldering, 10s)................................................ +300°C
Digital Input Voltages (SEL1 through SEL4) .............. –0.5V to +VCC +0.7V
Logic Voltage Input ................................................... –0.6V to +VCC +0.6V
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING TEMPERATURE
PRODUCT
PACKAGE
NUMBER(1)
RANGE
MPC102AP
MPC102AU
14-Pin DIP
SO-14 Surface Mount
010
235
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
4
MPC102
TYPICAL PERFORMANCE CURVES
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
INPUT OFFSET VOLTAGE vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
18
16
14
12
10
8
6
5
4
3
2
1
0
6
4
2
0
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
INPUT IMPEDANCE vs FREQUENCY
OUTPUT IMPEDANCE vs FREQUENCY
1.0M
100k
10k
100
30
10
1k
3
1
100
10k
100k
1M
10M
100M
1G
10k
100k
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
QUIESCENT CURRENT vs TEMPERATURE
One Channel Selected
QUIESCENT CURRENT vs TEMPERATURE
No Channel Selected
9
8
7
6
5
4
3
2
300
250
200
150
100
50
0
1
0
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
®
5
MPC102
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
TRANSFER FUNCTION
INPUT VOLTAGE NOISE SPECTRAL DENSITY
100
10
5
4
3
2
1
0
–1
–2
–3
1
–4
–5
0.1
–5
–4
–3
–2
–1
0
1
2
3
4
5
100
1k
10k
100k
1M
10M
100M
Input Voltage (V)
Frequency (Hz)
SWITCHING TRANSIENTS
(Channel-to-Channel)
SWITCHING ENVELOPE
(Channel-to-Channel Switching)
20
15
SEL1
5V
5V
Without Bandwidth
Limiting Lowpass Filter
5V
tRISE = tFALL = 5ns
10
5
SEL2
0V SEL1
+0.7V
0
–5
–10
–15
0V
–0.7V
–20
0
20 40 60 80 100 120 140 160 180 200
Time (ns)
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
Time (µs)
SEL1
150Ω
150Ω
VIN
DB1
DB2
VOUT1
SEL2
SMALL SIGNAL PULSE RESPONSE
SWITCHING TRANSIENTS
(Channel-to-Channel)
150
100
50
20
SEL1
SEL2
5V
5V
15
10
36MHz Low Pass Filter
Acc. Eureka Rec. EU95-PG03
in the Signal Path
tRISE = tFALL = 5ns
0
5
0
–50
–100
–150
–5
–10
–15
–20
0
20
40
60
Time (ns)
80
100
0
20 40 60 80 100 120 140 160 180 200
Time (ns)
COUT = 1pF, tRISE = t FALL = 2ns
(Generator), VIN = 0.2Vp-p
®
6
MPC102
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
SMALL SIGNAL PULSE RESPONSE
LARGE SIGNAL PULSE RESPONSE
150
100
50
3
2
1
0
0
–50
–100
–150
–1
–2
–3
0
20
40
60
Time (ns)
80
100
100
1G
0
20
40
60
Time (ns)
80
100
COUT = 47pF, tRISE = t FALL = 2ns
(Generator), VIN = 0.2Vp-p
COUT = 1pF, tRISE = t FALL = 5ns
(Generator), VIN = 5Vp-p
LARGE SIGNAL PULSE RESPONSE
GROUP DELAY TIME vs FREQUENCY
3
2
3
2
1
1
0
BUF601
150Ω
50Ω
22Ω
150Ω
DUT
+1
–1
–2
–3
VOUT
VIN
0
1pF
VIN = 2.8Vp-p
–1
0
20
40
60
Time (ns)
80
1M
10M
100M
1G
Frequency (Hz)
COUT = 47pF, tRISE = t FALL = 5ns
(Generator), VIN = 5Vp-p
BANDWIDTH vs COUT WITH RECOMMENDED ROUT
GAIN FLATNESS
2
1.5
1
10
5
0
1pF
–5
10pF
22pF
33pF
0.5
0
–10
–15
–20
–25
–30
–35
–40
COUT ROUT
f–3dB
1pF 0Ω 410MHz
47pF
–0.5
–1
10pF 30Ω 310MHz
22pF 22Ω 220MHz
33pF 13Ω 155MHz
47pF 11Ω 140MHz
–1.5
–2
VIN = 0.2Vp-p
1M
10M
100M
1G
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
®
7
MPC102
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, RIN = 150Ω, RSOURCE = 50Ω, and TA = +25°C, unless otherwise noted.
BANDWIDTH vs RLOAD
BANDWIDTH vs OUTPUT VOLTAGE
20
10
20
10
5Vp-p
2.8Vp-p
RL = 10kΩ
RL = 500Ω
1.4Vp-p
0
0
–10
–20
–30
–40
–50
–60
–10
–20
–30
–40
–50
–60
0.2Vp-p
VIN = 2.8Vp-p, COUT = 22pF
1M
10M
Frequency (Hz)
100M
1G
1M
10M
100M
1G
Frequency (Hz)
BANDWIDTH MATCHING (DB1...DB4)
2.8Vp-p
30MHz HARMONIC DISTORTION
20
15
10
5
0
–5
–10
–15
–20
–25
dB
COUT = 22pF, ROUT = 15Ω, VOUT = 2.8Vp-p
300k 1M
10M
100M
1G
30M
60M
90M
Frequency (Hz)
Frequency (Hz)
VOUT = 1.4Vp-p, RL = 350Ω, COUT = 1pF
ON/OFF CHARACTERISTIC
SEL1
+0.7V
0V
–0.7V
0
0.2 0.4 0.6 0.8
0
1.2 1.4 1.6 1.8 2.0
Time (µs)
SEL1
150Ω
150Ω
VIN
DB1
VOUT1
DB2
®
8
MPC102
+6mV and –8mV. The MPC102 consists of four identical
unity-gain buffer amplifiers. Two of the four amplifiers are
connected together internally at the output. The open-loop
buffer amps, which consist of complementary emitter fol-
lowers, apply no feedback so their low-frequency gain is
slightly less than unity and somewhat dependent on loading.
Unlike devices using MOS bilateral switching elements, the
bipolar complementary buffers form a unidirectional trans-
mission path, thus providing high output-to-input isolation.
Switching stages compatible to TTL-level digital signals are
provided for each buffer to select the input channel. When
no channel is selected, the outputs of the device are high-
impedance. This allows the user to wire several MPC102s
together to create multichannel switch matrices.
APPLICATIONS INFORMATION
The MPC102 operates from ±5V power supplies (±6V
maximum). Do not attempt to operate with larger power
supply voltages or permanent damage may occur. The buffer
outputs are not current-limited or protected. If the output is
shorted to ground, currents up to 18mA could flow. Momen-
tary shorts to ground (a few seconds) should be avoided, but
are unlikely to cause permanent damage.
INPUT PROTECTION
As shown below, all pins on the MPC102 are internally
protected from ESD by a pair of back-to-back reverse-biased
diodes to either power supply. These diodes will begin to
conduct when the input voltage exceeds either power supply
by about 0.7V. This situation can occur with loss of the
amplifier’s power supplies while a signal source is still
present. The diodes can typically withstand a continuous
current of 30mA without destruction. To insure long term
reliability, however, diode current should be externally lim-
ited to 10mA whenever possible.
Chip select logic is not integrated. The selected design
increases the flexibility of address decoding in complex
distribution fields, eases bus-controlled channel selection,
simplifies channel selection monitoring for the user, and
lowers transient peaks. All of these characteristics make the
multiplexer, in effect, a quad switchable high-speed buffer.
The buffers require DC coupling and termination resistors
when driven directly from a low-impedance cable. High-
current output amplifiers are recommended when driving
low-impedance transmission lines or inputs.
The internal protection diodes are designed to withstand
2.5kV (using Human Body Model) and will provide ad-
equate ESD protection for most normal handling proce-
dures. However, static damage can cause subtle changes in
the characteristics of the buffer amplifier input without
necessarily destroying the device. In precision buffer ampli-
fiers, such damage may cause a noticeable degradation of
offset voltage and drift. Therefore, static protection is strongly
recommended when handling the MPC102.
An advanced complementary bipolar process, consisting of
pn-junction isolated, high-frequency NPN and PNP transis-
tors, provides wide bandwidth while maintaining low
crosstalk and harmonic distortion. Bandwidth of over
210MHz at an output voltage of 1.4Vp-p allows the design
of multi-channel crosspoint or distribution fields in HDTV-
quality with an overall system bandwidth of 36MHz. The
buffer amplifiers also offer low differential gain (0.02%)
and phase (0.02°) errors. These parameters are essential for
video applications and demonstrate how well the signal path
maintains a constant small-signal gain and phase for the
low-level color subcarrier at 4.43MHz (PAL) or 3.58MHz
(NSTC) as the luminance signal is ramped through its
specified range. The bipolar construction also ensures that
the input impedance remains high and constant between ON
and OFF states. The ON/OFF input capacitance ratio is near
unity and does not vary with power supply voltage varia-
tions. The low output capacitance of 1.5pF when no channel
is selected is a very important parameter for large distribu-
tion fields. Each parallel output capacitance is an additional
load and reduces the overall system bandwidth.
Static damage has been well-recognized as a problem for
MOSFET devices, but any semiconductor device deserves
protection from this potentially damaging source. The
MPC102 incorporates on-chip ESD protection diodes as
shown in Figure 1. Thus the user does not need to add
external protection diodes, which can add capacitance and
degrade AC performance.
ESD Protection diodes
+VCC
internally connected to all pins.
External Pin
Internal Circuitry
–VCC
Bipolar video crosspoint switches are virtually glitch-free
when compared to signal switches using CMOS or DMOS
devices. The MPC102 operates with a fast make-before-
break switching action to keep the output switching tran-
sients small and short. Switching from one channel to
another causes the signal to mix at the output for a short
time, but it interferes minimally with the input signals. The
transient peaks remain less than +6mV and –8mV. The
generated output transients are extremely small, so DC
clamping during switching between channels is unneces-
sary. DC clamping during the switching dead time is re-
quired to avoid synchronization by large negative output
glitches in subsequent equipment.
FIGURE 1. Internal ESD Protection.
DISCUSSION
OF PERFORMANCE
The MPC102 is a dual, 2-to-1, wide-band analog signal
multiplexer. It allows the user to connect one of the two
inputs (IN1/IN2 or IN3/IN4) to the corresponding output. The
switching speed between two input channels is typically less
than 300ns.
However, in contrast to signal switches using CMOS or
DMOS transistors, the switching transients are very low at
®
9
MPC102
The SEL-to-channel-ON time is typically 25ns and is always
shorter than the typical SEL-to-channel-OFF time of 250ns.
In the worst case, an ON/OFF margin of 150ns ensures safe
switching even for timing spreads in the digital control
latches. The short interchannel switching time of 300ns
allows channel change during the vertical blanking time,
even in high-resolution graphic or broadcast systems. As
shown in the typical performance curves, the signal enve-
lope during transition from one channel to another rises and
falls symmetrically and shows less overshooting and DC
settling effects.
• Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF), a parallel
470pF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.
• PC board traces for signal and power lines should be wide
to reduce impedance.
• Make short and low inductance traces. The entire circuit
layout should be as small as possible.
• Use a low-impedance ground plane on the component side
to ensure that low-impedance ground is available through-
out the layout. Grounded traces between the input traces
are essential to achieve high interchannel crosstalk rejec-
tion.
Power consumption is a serious problem when designing
large crosspoint fields with high component density. Since
most of the buffer amplifiers are in the off-state, one
important design goal was to attain low off-state quies-
cent current when no channel is selected. The low supply
current of ±250µA when no channel is selected and
±4.6mA when one channel is selected, as well as the
reduced ±5V supply voltage, conserves power, simplifies
the power supply design, and results in cooler, more
reliable operation.
• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances, such as the buffer’s
input terminals.
• Sockets are not recommended, because they add signifi-
cant inductance and parasitic capacitance. If sockets are
required, use zero-profile solderless sockets.
• Use low-inductance and surface-mounted components for
best ac-performance.
CIRCUIT LAYOUT
The high-frequency performance of the MPC102 can be
greatly affected by the physical layout of the circuit. The
following tips are offered as suggestions, not as absolutes.
Oscillations, ringing, poor bandwidth and settling, higher
crosstalk, and peaking are all typical problems which plague
high-speed components when they are used incorrectly.
• A resistor (100Ω to 200Ω) in series with the input of the
buffers may help to reduce peaking. Place the resistor as
close as possible to the pin.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential.
SEL1
(14)
IN1
DB1
(1)
GND
(2)
+VCC = +5V
(4)
SEL2
(13)
IN2
(3)
VOUT1
(12)
DB2
(11)
–VCC = –5V
SEL3
(9)
IN3
DB3
(5)
VOUT2
(10)
SEL4
(8)
GND
(6)
IN4
DB4
(7)
Note: DB = Diamond Buffer
FIGURE 2. Simplified Circuit Diagram.
®
10
MPC102
VOUT1 50Ω
50Ω
BUF601
150Ω
150Ω
VIN1
20
0
DB1
DB2
DB3
DB4
150Ω
22Ω
IN1
IN2
IN3
IN4
50Ω
VOUT1
1kΩ
–20
–40
–60
–80
–100
VIN = 1.4Vp –p
VOUT2 50Ω
50Ω
BUF601
150Ω
150Ω
VIN2
150Ω
22Ω
MPC102AP
50Ω
VOUT2
SEL1
SEL2
SEL3
SEL4
0
1
0
1
MPC102AU
1kΩ
100k
1M
10M
100M 300M
MPC102
Frequency (Hz)
FIGURE 3. Channel Crosstalk – Grounded Input.
VOUT1 50Ω
50Ω
BUF601
150Ω
150Ω
VIN1
20
0
DB1
DB2
DB3
DB4
150Ω
22Ω
IN1
IN2
IN3
IN4
50Ω
VOUT1
1kΩ
–20
–40
–60
–80
–100
VIN = 1.4Vp –p
MPC102AP
VOUT2 50Ω
50Ω
BUF601
150Ω
150Ω
VIN2
150Ω
22Ω
MPC102AU
50Ω
VOUT2
SEL1
SEL2
SEL3
SEL4
0
1
0
1
1kΩ
100k
1M
10M
100M 300M
MPC102
Frequency (Hz)
FIGURE 4. Off Isolation 150Ω Input.
VOUT1 50Ω
50Ω
20
0
BUF601
50Ω
150Ω
150Ω
150Ω
150Ω
VIN1
DB1
DB2
DB3
DB4
150Ω
22Ω
IN1
50Ω
VOUT1
–20
–40
–60
–80
–100
1kΩ
IN2
VIN = 1.4Vp-p
VOUT2 50Ω
50Ω
BUF601
50Ω
VIN2
IN3
150Ω
22Ω
50Ω
SEL1
SEL2
SEL3
SEL4
0
MPC102AU
100M 300M
MPC102AP
VOUT2
0
0
0
1kΩ
100k
1M
10M
IN4
Frequency (Hz)
MPC102
FIGURE 5. Off Isolation Test Circuit 2.
®
11
MPC102
RIN
150Ω
RB
51Ω
400MHz
Scope
ROUT
150Ω
50Ω
50Ω
In
DUT
+1
Out
RIN
=
RIN =
50Ω
50Ω
50Ω
COUT
DB1 to DB4
BUF601
Pulse
Generator
FIGURE 6. Test Circuit Pulse Response.
MPC102
OPA623
VIN
150Ω
150Ω
75Ω
Generator
Video
Analyzer
+
–
75Ω
DUT
75Ω
RIN
=
75Ω
RIN
=
75Ω
10kΩ
75Ω
330Ω
1 of 4
4.43MHz
330Ω
VDC
FIGURE 7. Test Circuit Differential Gain and Phase.
MPC102
SEL Inputs
MPC102
SEL Inputs
MPC102
SEL Inputs
MPC102
SEL Inputs
MPC102
SEL Inputs
MPC102
SEL Inputs
1
4
3
5
5
6
7
7
1
3
5
7
1
3
5
7
7
1
3
5
7
1
3
5
7
7
1
3
5
7
14 13 12 11
4
5
6
14 13 12 11
4
5
6
14 13 12 11
Parallel Out
HC4094
Parallel Out
HC4094
Parallel Out
HC4094
2
3
2
3
2
3
SER
Out
SER
Out
SER
Out
SER In
D
• • •
3
1
15
3
1
15
3
1
15
Clock
STR
OE
FIGURE 8. Serial Bus-Controlled Distribution Field.
®
12
MPC102
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