MPY100BM-BS [BB]

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MPY100BM-BS
型号: MPY100BM-BS
厂家: BURR-BROWN CORPORATION    BURR-BROWN CORPORATION
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®
MPY100  
MULTIPLIER-DIVIDER  
FEATURES  
APPLICATIONS  
LOW COST  
MULTIPLICATION  
DIFFERENTIAL INPUT  
DIVISION  
ACCURACY 100% TESTED AND  
SQUARING  
GUARANTEED  
SQUARE ROOT  
LINEARIZATION  
POWER COMPUTATION  
NO EXTERNAL TRIMMING REQUIRED  
LOW NOISE: 90µVrms, 10Hz to 10kHz  
HIGHLY RELIABLE ONE-CHIP DESIGN  
DIP OR TO-100 TYPE PACKAGE  
ANALOG SIGNAL PROCESSING  
ALGEBRAIC COMPUTATION  
TRUE RMS-TO-DC CONVERSION  
WIDE TEMPERATURE OPERATION  
DESCRIPTION  
The MPY100 multiplier-divider is a low cost preci-  
sion device designed for general purpose application.  
In addition to four-quadrant multiplication, it also  
performs analog square root and division without the  
bother of external amplifiers or potentiometers. Laser-  
trimmed one-chip design offers the most in highly  
reliable operation with guaranteed accuracies.  
Because of the internal reference and pretrimmed  
accuracies the MPY100 does not have the restrictions  
of other low cost multipliers. It is available in both  
TO-100 and DIP ceramic packages.  
X1  
V-I  
X2  
Multiplier Core  
Y1  
Y2  
V-I  
V-I  
Out  
A
High Gain  
Output Amplifier  
Z1  
Z2  
Attenuator  
International Airport Industrial Park  
Mailing Address: PO Box 11400  
Cable: BBRCORP  
Tucson, AZ 85734  
Street Address: 6730 S. Tucson Blvd.  
Tucson, AZ 85706  
Tel: (520) 746-1111  
Twx: 910-952-1111  
Telex: 066-6491  
FAX: (520) 889-1510  
Immediate Product Info: (800) 548-6132  
©1987 Burr-Brown Corporation  
PDS-412D  
Printed in U.S.A. March, 1995  
SPECIFICATIONS  
At TA = +25°C and ±VS = 15VDC, unless otherwise specified.  
MPY100A  
TYP  
MPY100B/C  
TYP  
MPY100S  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
MULTIPLIER PERFORMANCE  
Transfer Function  
(X1 – X2)(Y1 –Y2)  
10  
*/*  
*
+ Z2  
Total Error  
Initial  
–10V X, Y 10V  
TA = +25°C  
±2.0  
±1.0/0.5  
±0.5  
% FSR  
vs Temperature  
vs Temperature  
vs Supply(1)  
Individual Errors  
Output Offset  
Initial  
vs Temperature  
vs Temperature  
vs Supply(1)  
Scale Factor Error  
Initial  
vs Temperature  
vs Temperature  
vs Supply(1)  
Nonlinearity  
X Input  
–25°C TA +85°C  
–55°C TA +125°C  
±0.017  
±0.05  
±0.05  
±0.008/0.008 ±0.02/0.02  
% FSR/°C  
% FSR/°C  
% FSR/%  
±0.025  
*
±0.05  
*/*  
TA = +25°C  
–25°C TA +85°C  
–55°C TA +125°C  
±50  
±0.7  
±100  
±2.0  
±10/7  
±50/25  
±7  
±50  
mV  
±0.7/0.3  
±2.0/±0.7  
mV/°C  
mV/°C  
mV/%  
±0.3  
*
±0.7  
±0.25  
*/*  
TA = +25°C  
–25°C TA +85°C  
–55°C TA +125°C  
±0.12  
±0.008  
*/*  
*/*  
*
% FSR  
% FSR/°C  
% FSR/°C  
% FSR %  
±0.008  
*
±0.05  
*/*  
X = 20Vp-p; Y = ±10VDC  
Y = 20Vp-p: X = ±10VDC  
f = 50Hz  
X = 20Vp-p; Y = 0  
Y = 20Vp-p; X = 0  
–25°C TA +85°C  
–55°C TA 125°C  
±0.08  
±0.08  
*/*  
*/*  
*
*
% FSR  
% FSR  
Y Input  
Feedthrough  
X Input  
100  
6
0.1  
30/30  
*/*  
*/*  
30  
*
mVp-p  
mVp-p  
mVp-p/°C  
mVp-p/°C  
mVp-p/%  
Y Input  
vs Temperature  
vs Temperature  
vs Supply(1)  
0.1  
*
0.15  
*/*  
*/*  
DIVIDER PERFORMANCE  
Transfer Function  
10(Z2 – Z1)  
X1 > X2  
*
+ Y1  
(X1 – X2)  
Total Error (with  
X = 10V  
external adjustments)  
–10V Z +10V  
X = 1V  
–1V Z +1V  
+0.2V X +10V  
–10V Z +10V  
±1.5  
±4.0  
±5.0  
±0.75/0.35  
±2.0/1.0  
±2.5/1.0  
±0.35  
±1.0  
±1.0  
% FSR  
% FSR  
% FSR  
SQUARER PERFORMANCE  
Transfer Function  
(X1 – X2)2  
10  
*/*  
*
+ Z2  
Total Error  
–10V X +10V  
±1.2  
±0.6/0.3  
±0.3  
% FSR  
% FSR  
SQUARE ROOTER PERFORMANCE  
Transfer Function  
Total Error  
Z
1 < Z2  
+10(Z2 – Z1) + X2  
±2  
*/*  
±1/0.5  
*
1V Z 10V  
±0.5  
AC PERFORMANCE  
Small-Signal Bandwidth  
% Amplitude Error  
% (0.57°) Vector Error  
Full Power Bandwidth  
Slew Rate  
550  
70  
5
320  
20  
2
*/*  
*/*  
*/*  
*/*  
*/*  
*/*  
*/*  
*
*
*
*
*
*
*
kHz  
kHz  
kHz  
kHz  
V/µs  
µs  
Small-Signal  
Small-Signal  
|VO| = 10V, RL = 2kΩ  
|VO| = 10V, RL = 2kΩ  
ε = ±1%, VO = 20V  
50% Output Overload  
Settling Time  
Overload Recovery  
0.2  
µs  
INPUT CHARACTERISTICS  
Input Voltage Range  
Rated Operation  
Absolute Maximum  
Input Resistance  
±10  
*/*  
*
V
V
MΩ  
µA  
±VCC  
*/*  
*
X, Y, Z(2)  
X, Y, Z  
10  
1.4  
*/*  
*/*  
*
*
Input Bias Current  
OUTPUT CHARACTERISTICS  
Rated Output  
Voltage  
Current  
Output Resistance  
IO = ±5mA  
VO = ±10V  
f = DC  
±10  
±5  
*/*  
*/*  
*
*
V
mA  
1.5  
*/*  
*
®
2
MPY100  
SPECIFICATIONS (CONT)  
At TA = +25°C and ±VS = 15VDC, unless otherwise specified.  
MPY100A  
TYP  
MPY100B/C  
TYP  
MPY100S  
TYP  
PARAMETER  
CONDITIONS  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
UNITS  
OUTPUT NOISE VOLTAGE  
fO = 1Hz  
fO = 1kHz  
l/f Corner Frequency  
fB = 5Hz to 10kHz  
fB = 5Hz to 5MHz  
X = Y = 0  
6.2  
0.6  
110  
60  
*/*  
*/*  
*/*  
*/*  
*/*  
*
*
*
*
*
µV/Hz  
µV/Hz  
Hz  
µVrms  
mVrms  
1.3  
POWER SUPPLY REQUIREMENTS  
Rated Voltage  
Operating Range  
Quiescent Current  
±15  
*/*  
*/*  
*
*
VDC  
VDC  
mA  
Derated Performance ±8.5  
±20  
*/*  
*/*  
*
*
±5.5  
TEMPERATURE RANGE (Ambient)  
Specification  
Operating Range  
Storage  
–25  
+85  
+125  
+150  
*/*  
*/*  
*/*  
*/*  
*/*  
*/*  
–55  
*
*
+125  
*
*
°C  
°C  
°C  
Derated Performance –55  
–65  
* Same as MPY100A specification.  
*/* B/C grades same as MPY100A specification.  
NOTES: (1) Includes effects of recommended null pots. (2) Z2 input resistance is 10M, typical, with VOS pin open. If VOS pin is grounded or used for optional offset  
adjustment, the Z2 input resistance may be as low as 25kΩ  
PIN CONFIGURATIONS  
Top View  
TO-100  
Top View  
DIP  
Y2  
10  
1
2
3
4
5
6
7
14 +VCC  
13 Y1  
Z1  
Out  
–VCC  
NC  
Y1  
VOS  
1
4
9
6
+VCC  
Z1  
Z2  
X2  
2
3
8
7
12 Y2  
11 VOS  
10 Z2  
NC  
Out  
X1  
5
NC  
9
8
X2  
–VCC  
X1  
NC  
NOTES: (1) VOS adjustment optional not normally recommended. VOS pin  
may be left open or grounded. (2) All unused input pins should be grounded.  
NOTES: (1) VOS adjustment optional not normally recommended. VOS pin  
may be left open or grounded. (2) All unused input pins should be grounded.  
ORDERING INFORMATION  
MODEL  
PACKAGE  
TEMPERATURE RANGE  
ABSOLUTE MAXIMUM RATINGS  
MPY100AG  
MPY100AM  
MPY100BG  
MPY100BM  
MPY100CG  
MPY100CM  
MPY100SG  
MPY100SM  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–25°C to +85°C  
–55°C to +125°C  
–55°C to +125°C  
Supply ........................................................................................... ±20VDC  
Internal Power Dissipation(1) .......................................................... 500mW  
Differential Input Voltage(2) ........................................................... ±40VDC  
Input Voltage Range(2) ................................................................. ±20VDC  
Storage Temperature Range ......................................... –65°C to +150°C  
Operating Temperature Range .................................... –55°C to +125°C  
Lead Temperature (soldering, 10s) ............................................... +300°C  
Output Short-circuit Duration(3) ................................................ Continuous  
Junction Temperature .................................................................... +150°C  
PACKAGE INFORMATION  
NOTES: (1) Package must be derated on θJC = 15°C/W and θJA  
=
165°C/W for the metal package and θJC = 35°C/W and θJA = 220°C/  
W for the ceramic package. (2) For supply voltages less than ±20VDC,  
the absolute maximum input voltage is equal to the supply voltage. (3)  
Short-circuit may be to ground only. Rating applies to +85°C ambient  
for the metal package and +65°C for the ceramic package.  
PACKAGE DRAWING  
NUMBER(1)  
MODEL  
PACKAGE  
MPY100AG  
MPY100AM  
MPY100BG  
MPY100BM  
MPY100CG  
MPY100CM  
MPY100SG  
MPY100SM  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
14-Pin Ceramic DIP  
Metal TO-100  
169  
007  
169  
007  
169  
007  
169  
007  
NOTE: (1) For detailed drawing and dimension table, please see end of data  
sheet, or Appendix D of Burr-Brown IC Data Book.  
®
3
MPY100  
SIMPLIFIED SCHEMATIC  
+VCC  
A
Z2  
Out  
Z1  
25kΩ  
25kΩ  
3.8kΩ  
X1  
X2  
Y2  
Y1  
25kΩ  
25kΩ  
25kΩ  
25kΩ  
25kΩ  
25kΩ  
VOS  
500µA  
500µA  
500µA  
–VCC  
CONNECTION DIAGRAM  
+15VDC  
Z1  
+VS  
X1  
VO  
X2  
Y1  
Y2  
Out  
(X1 – X2)(Y1 – Y2)  
10  
Z2  
VOS  
–VS  
(1)  
NOTE: (1) Optional component.  
–15VDC  
100kΩ  
DICE INFORMATION  
PAD  
FUNCTION  
1
2
3
Y2  
VOS  
Z2  
4
X2  
5
X1  
6
7
VO  
Z1  
8
9
10  
+V  
–V  
Y1  
Substrate Bias: –VCC  
MECHANICAL INFORMATION  
MILS (0.001")  
MILLIMETERS  
Die Size  
Die Thickness  
Min. Pad Size  
107 x 93 ±5  
20 ±3  
2.72 x 2.36 ±0.13  
0.51 ±0.08  
0.10 x 0.10  
4 x 4  
Backing  
Gold  
MPY100 DIE TOPOGRAPHY  
®
4
MPY100  
TYPICAL PERFORMANCE CURVES  
At TA = +25°C and ±VS = 15VDC, unless otherwise specified.  
TOTAL ERROR vs AMBIENT TEMPERATURE  
10  
NONLINEARITY vs FREQUENCY  
Input Signal = 20Vp-p  
100  
10  
1
X
1
0.1  
Y
0.01  
0.001  
0.1  
10  
10k  
0
100  
1k  
10k  
100k  
1M  
–100  
–50  
0
50  
100  
150  
10M  
5
Frequency (Hz)  
Ambient Temperature (°C)  
FEEDTHROUGH vs FREQUENCY  
OUTPUT AMPLITUDE vs FREQUENCY  
5
0
1000  
Small Signal  
500  
200  
100  
50  
Input Signal = 20Vp-p  
–5  
X
X Feedthrough  
Y Feedthrough  
–10  
Y
20  
–15  
–20  
10  
5
10  
100  
1k  
10k  
100k  
1M  
100k  
Frequency (Hz)  
1M  
10M  
Frequency (Hz)  
LARGE SIGNAL RESPONSE  
INPUT VOLTAGE FOR LINEAR RESPONSE  
10  
5
20  
18  
16  
14  
12  
10  
8
Positive Common-Mode  
Differential  
Negative Common-Mode  
Input  
Output  
0
RL = 2kΩ  
CL = 150pF  
6
–5  
4
2
0
–10  
0
1
2
3
4
2
4
6
8
10  
12  
14  
16  
18 20  
Power Supply Voltage (±VCC  
)
Time (µs)  
®
5
MPY100  
TYPICAL PERFORMANCE CURVES (CONT)  
At TA = +25°C and ±VS = 15VDC, unless otherwise specified.  
OUTPUT VOLTAGE vs OUTPUT CURRENT  
COMMON-MODE REJECTION vs FREQUENCY  
80  
70  
60  
50  
40  
25  
20  
15  
10  
+25°C  
–55°C  
Y = 12Vp-p  
X = ±10VDC  
VCC = ±20V  
VCC = ±15V  
X = 12Vp-p  
Y = ±10VDC  
V
CC = ±10V  
V
CC = ±8.5V  
5
0
30  
20  
10  
100  
1k  
10k  
100k  
1M  
10M  
0
2
4
6
8
10  
12  
14  
16  
Frequency (Hz)  
Output Current (±mA)  
SUPPLY CURRENT vs AMBIENT TEMPERATURE  
16  
14  
12  
10  
8
5mA Load  
Quiescent  
6
4
2
0
–100  
–50  
0
50  
100  
150  
Ambient Temperature (°C)  
®
6
MPY100  
and is modulated by the voltage, V2, to give  
THEORY OF OPERATION  
gm V2/VTRE  
The MPY100 is a variable transconductance multiplier con-  
sisting of three differential voltage-to-current converters, a  
multiplier core and an output differential amplifier as illus-  
trated in Figure 1.  
Substituting this into the original equation yields the overall  
transfer function  
VO = gmRLV1 = V1V2 (RL/VTRE)  
The basic principle of the transconductance multiplier can  
be demonstrated by the differential stage in Figure 2.  
which shows the output voltage to be the product of the two  
input voltages, V1 and V2.  
For small values of the input voltage, V1, that are much  
smaller than VT, the transistor’s thermal voltage, the differ-  
ential output voltage, VO, is:  
Variations in IE due to V2 cause a large common-mode  
voltage swing in the circuit. The errors associated with this  
common-mode voltage can be eliminated by using two  
differential stages in parallel and cross-coupling their out-  
puts as shown in Figure 3.  
VO = gm RLV1  
The transconductance gm of the stage is given by:  
gm = IE/VT  
+VS  
RL  
RL  
Stable  
+VS  
+
VO  
Reference  
–VS  
and Bias  
I1  
I2  
I3  
I4  
(X1 – X2)(Y1 – Y2)  
VO = A  
– (Z1 – Z2)  
10  
Q1  
Q2  
Q3  
Q4  
+
X1  
X2  
V-I  
V-I  
V-I  
Transfer Function  
V1  
Multiplier  
Core  
Y1  
Y2  
Q5  
Q6  
RE  
RE  
Out  
A
+
V2  
High Gain  
Z1  
Z2  
Output Amplifier  
IT  
–VCC  
Attenuator  
FIGURE 1. MPY100 Functional Block Diagram.  
FIGURE 3. Cross-Coupled Differential Stages as a Variable-  
Transconductance Multiplier.  
An analysis of the circuit in Figure 3 shows it to have the  
same overall transfer function as before:  
+VCC  
I1  
RL  
RL  
I2  
VO = V1V2 (RL/VTRE).  
For input voltages larger than VT, the voltage-to-current  
transfer characteristics of the differential pair Q1, Q2 or Q3  
and Q4 are no longer linear. Instead, their collector currents  
are related to the applied voltage V1  
VO +  
Q1  
Q2  
+
V1  
V1  
I1  
I2  
I3  
I4  
VT  
=
= e  
Q3  
+
RE  
IE  
The resultant nonlinearity can be overcome by developing  
V1 logarithmically to exactly cancel the exponential rela-  
tionship just derived. This is done by diodes D1 and D2 in  
Figure 4.  
V2  
The emitter degeneration resistors, RX and RY, in Figure 4,  
provide a linear conversion of the input voltages to differen-  
tial current, IX and IY, where:  
FIGURE 2. Basic Differential Stage as a Transconductance  
Multiplier.  
®
7
MPY100  
IX = VX/RX and IY = VY/RY  
CAPACITIVE LOADS  
Analysis of Figure 4 shows the voltage VA to be:  
VA = (2RL/I1)(IXIY)  
Stable operation is maintained with capacitive loads to  
1000pF in all modes, except the square root mode for which  
50pF is a safe upper limit. Higher capacitive loads can be  
driven if a 100resistor is connected in series with the  
MPY100’s output.  
Since IX and IY are linearly related to the input voltages VX  
and VY, VA may also be written:  
VA = KVXVY  
where K is a scale factor. In the MPY100, K is chosen to be  
0.1.  
DEFINITIONS  
TOTAL ERROR (Accuracy)  
Total error is the actual departure of the multiplier output  
voltage form the ideal product of its input voltages. It  
includes the sum of the effects of input and output DC  
offsets, gain error and nonlinearity.  
The addition of the Z input alters the voltage VA to:  
VA = KVXVY – VZ  
Therefore, the output of the MPY100 is:  
VO = A[KVXVY – VZ]  
where A is the open-loop gain of the output amplifier.  
Writing this last equation in terms of the separate inputs to  
the MPY100 gives  
OUTPUT OFFSET  
Output offset is the output voltage when both inputs VX and  
VY are 0V.  
(X1 – X2)(Y1 – Y2)  
VO = A  
– (Z1 – Z2)  
10  
SCALE FACTOR ERROR  
the transfer function of the MPY100.  
Scale factor error is the difference between the actual scale  
factor and the ideal scale factor.  
WIRING PRECAUTIONS  
In order to prevent frequency instability due to lead induc-  
tance of the power supply lines, each power supply should  
be bypassed. This should be done by connecting a 10µF  
tantalum capacitor in parallel with a 1000pF ceramic capaci-  
tor from the +VCC and –VCC pins of the MPY100 to the  
power supply common. The connection of these capacitors  
should be as close to the MPY100 as practical.  
NONLINEARITY  
Nonlinearity is the maximum deviation from a best  
straightline (curve fitting on input-output graph) expressed  
as a percent of peak-to-peak full scale output.  
FEEDTHROUGH  
Feedthrough is the signal at the output for any value of VX  
or VY within the rated range, when the other input is zero.  
+VCC  
RCM  
RL  
RL  
+
VA  
I4  
D1  
D2  
I1  
I2 I3  
VO  
A
Q1 Q2  
Q3 Q4  
Out  
+
V1  
X1  
+
Z1  
+
Q7  
Q8  
Q5  
Q6  
Q9  
Q10  
Y1  
+
RX  
2
RX  
RY  
2
RY  
2
RZ  
2
RZ  
2
VX  
VY  
VZ  
2
Y2  
X2  
Z2  
211  
211  
211  
–VCC  
FIGURE 4. MPY100 Simplified Circuit Diagram.  
®
8
MPY100  
SMALL SIGNAL BANDWIDTH  
εDIVIDER = 10 εMULTIPLIER/(X1 – X2)  
Small signal bandwidth is the frequency at which the output  
is down 3dB from its low-frequency value for nominal  
output amplitude of 10% of full scale.  
It is obvious from this error equation that divider error  
becomes excessively large for small values of X1 – X2. A 10-  
to-1 denominator range is usually the practical limit. If more  
accurate division is required over a wide range of denomi-  
nator voltages, an externally generated voltage may be  
1% AMPLITUDE ERROR  
The 1% amplitude error is the frequency the output ampli-  
tude is in error by 1%, measured with an output amplitude  
of 10% of full scale.  
(X1 – X2)(Y1 – Y2)  
VO  
Z1  
=
+ Z2  
10  
VX, ±10V,  
FS  
X1  
X2  
Y1  
Y2  
1% VECTOR ERROR  
VO, ±10V, FS  
MPY100  
Out  
The 1% vector error is the frequency at which a phase error  
of 0.01 radians (0.57°) occurs. This is the most sensitive  
measure of dynamic error of a multiplier.  
Optional  
Summing  
Input, ±10V, FS  
VY, ±10V,  
FS  
Z2  
–VCC VOS +VCC  
(1)  
NOTE: (1) Optional balance  
potentiometer.  
TYPICAL APPLICATIONS  
100kΩ  
MULTIPLICATION  
–15VDC  
+15VDC  
Figure 5 shows the basic connection for four-quadrant mul-  
tiplication.  
FIGURE 5. Multiplier Connection.  
The MPY100 meets all of its specifications without trim-  
ming. Accuracy can, however be improved over a limited  
range by nulling the output offset voltage using the 100Ω  
optional balance potentiometer shown in Figure 5.  
+VCC  
50kΩ  
470kΩ  
To the appropriate  
input terminal.  
AC feedthrough may be reduced to a minimum by applying  
an external voltage to the X or Y input as shown in Figure  
6.  
1kΩ  
–VCC  
Z2, the optional summing input, may be used to sum a  
voltage into the output of the MPY100. If not used, this  
terminal, as well as the X and Y input terminals, should be  
grounded. All inputs should be referenced to power supply  
common.  
FIGURE 6. Optional Trimming Configuration.  
R2  
10kΩ  
Figure 7 shows how to achieve a scale factor larger than the  
nominal 1/10. In this case, the scale factor is unity which  
makes the transfer function  
X1  
X2  
Y1  
Y2  
R1  
90kΩ  
Z1  
Out  
MPY100  
VO  
1 + (R1/R2)  
K =  
VO = KVXVY = K(X1 – X2)(Y1 – Y2).  
Z2  
10  
0.1 K 1  
This circuit has the disadvantage of increasing the output  
offset voltage by a factor of 10, which may require the use  
of the optional balance control as in Figure 1 for some  
applications. In addition, this connection reduces the small  
signal bandwidth to about 50kHz.  
FIGURE 7. Connection for Unity Scale Factor.  
10(Z2 – Z1)  
VO  
=
+ Y1  
(X1 – X2)  
X1  
X2  
Y1  
Y2  
VXDemonimator  
±0.2V to +10V, FS  
DIVISION  
Z1  
Out  
VO = ±10V, FS  
Figure 8 shows the basic connection for two-quadrant  
division. This configuration is a multiplier-inverted analog  
divider, i.e., a multiplier connected in the feedback loop of  
an operational amplifier. In the case of the MPY100, this  
operational amplifier is the output amplifier shown in  
Figure 1.  
MPY100  
Optional Summing  
Input, ±10V, FS  
Z2  
V2  
Numerator  
±10V, FS  
The divider error with a multiplier-inverted analog divider is  
approximately:  
FIGURE 8. Divider Connection.  
®
9
MPY100  
applied to the unused X-input (see Optional Trim Configu-  
ration). To trim, apply a ramp of +100mV to +1V at 100Hz  
to both X1 and Z1 if X2 is used for offset adjustment,  
otherwise reverse the signal polarity and adjust the trim  
voltage to minimize the variation in the output. An alterna-  
tive to this procedure would be to use the Burr-Brown  
DIV100, a precision log-antilog divider.  
MORE CIRCUITS  
The theory and procedures for developing virtually any  
function generator or linearization circuit can be found in the  
Burr-Brown/McGraw Hill book “FUNCTION CIRCUITS -  
Design and Applications.”  
VO = + 10(Z2 – Z1) +X2  
SQUARING  
Optional  
X1  
X2  
Y1  
Y2  
Summing  
Input,  
±10V, FS  
(X1 – X2)2  
Z1  
Out  
VO  
VO  
=
+ Z2  
10  
MPY100  
RL  
X1  
X2  
Y1  
Y2  
Z2  
Z1  
Out  
VO = ±10V, FS  
VZ  
+0.2V (Z2 – Z1) +10V  
MPY100  
(a) Circuit for positive VZ.  
Z2  
VX  
Optional  
±10V, FS  
Summing  
Optional  
VO = – 10(Z2 – Z1) +X2  
Input, ±10V, FS  
Summing  
Input,  
±10V, FS  
X1  
X2  
Y1  
Y2  
FIGURE 9. Squarer Connection.  
Z1  
VO  
MPY100  
Out  
SQUARE ROOT  
RL  
Z2  
Figure 10 shows the connection for taking the square root of  
the voltage VZ. The diode prevents a latching condition  
which could occur if the input momentarily changed polar-  
ity. This latching condition is not a design flaw in the  
MPY100, but occurs when a multiplier is connected in the  
feedback loop of an operational amplifier to perform square  
root functions.  
VZ  
+0.2V (Z2 – Z1) +10V  
(b) Circuit for negative VZ.  
FIGURE 10. Square Root Connection.  
(V2 – V1)  
V1  
VO  
=
100  
The load resistance, RL, must be in the range of  
10kΩ ≤ RL 1M. This resistance must be in the circuit as  
it provides the current necessary to operate the diode.  
1% per volt  
V1  
X1  
PERCENTAGE COMPUTATION  
Z1  
+0.2V V1 +10V  
VO  
X2  
Y1  
Y2  
The circuit of Figure 11 has a sensitivity of 1V/% and is  
capable of measuring 10% deviations. Wider deviation can  
be measured by decreasing the ratio of R2/R1.  
MPY100  
Out  
Z2  
9kΩ  
1kΩ  
V2  
BRIDGE LINEARIZATION  
The use of the MPY100 to linearize the output from a bridge  
circuit makes the output VO independent of the bridge  
supply voltage. See Figure 12.  
FIGURE 11. Percentage Computation.  
TRUE RMS-TO-DC CONVERSION  
The rms-to-DC conversion circuit of Figure 13 gives greater  
accuracy and bandwidth but with less dynamic range than  
most rms-to-DC converters.  
SINE FUNCTION GENERATOR  
The circuit in Figure 14 uses implicit feedback to implement  
the following sine function approximation:  
3
2
VO = (1.5715V1 – 0.004317V1 )/(1 + 0.001398V1 )  
= 10 sin (9V1)  
®
10  
MPY100  
RG  
V
40kΩ  
R
R + R  
Z1  
X1  
X2  
Y1  
Y2  
Z1  
Out  
V1  
VO  
INA101  
V2  
MPY100  
G = 2  
R
R
R1  
Z2  
R2  
R1 + R2  
V
2
1
1
R  
R
V1 =  
V2 = V  
VO = 5  
2R  
2R  
R2  
1+  
1+  
R  
R  
NOTE: V should be as large as possible to minimize divider errors. But V [10 + (20R/R)]  
to keep V2 within the input voltage limits of the MPY100.  
FIGURE 12. Bridge Linearization.  
Matched to 0.025%  
R1  
R2  
20kΩ  
10kΩ  
10kΩ  
OPA111  
VIN  
(±5V pk)  
X1  
X2  
Y1  
Y2  
10µF  
Z1  
Out  
10kΩ  
DC  
AC  
MPY100  
VO  
C2  
10µF  
10kΩ  
2
VO  
= VIN  
Z2  
0 to 5V  
OPA111  
Mode Switch  
+VS  
10MΩ  
50kΩ  
Zero  
Adjust  
10kΩ  
–VS  
20kΩ  
FIGURE 13. True RMS-to-DC Conversion.  
®
11  
MPY100  
23.165kΩ  
71.548kΩ  
X1  
X2  
Y1  
Y2  
10kΩ  
Z1  
Out  
VO = 10 sin 9V1  
MPY100  
5.715kΩ  
Z2  
V1  
X1  
X2  
Y1  
Y2  
Z1  
Out  
10kΩ  
MPY100  
Z2  
(–10V V1 +10V, and 1V = 9°)  
FIGURE 14. Sine Function Generator  
IL  
Load  
ei(t) = 2 Eirms Sin ωt  
R4  
iL(t) = 2 ILrms Sin (ωt +θ )  
ei  
R1  
ei  
R2  
R5  
=R5/(R4 +R5)  
γ =(–R1R3)/R2  
X
XY  
10  
R3  
Instantaneous  
Power  
Y
γiL  
Real Power  
(
γ/10)(EirmsILrms cosθ )  
FIGURE 15. Single-Phase Instantaneous and Real Power  
Measurement.  
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN  
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject  
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not  
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.  
®
12  
MPY100  

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