OPA128JM-BI [BB]
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| 型号： | OPA128JM-BI |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | 暂无描述 运算放大器 |
| 文件： | 总11页 (文件大小：130K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
OPA128
Difet® Electrometer-Grade
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● ULTRA-LOW BIAS CURRENT: 75fA max
● ELECTROMETER
● MASS SPECTROMETER
● CHROMATOGRAPH
● ION GAUGE
● LOW OFFSET: 500µV max
● LOW DRIFT: 5µV/°C max
● HIGH OPEN-LOOP GAIN: 110dB min
● HIGH COMMON-MODE REJECTION:
● PHOTODETECTOR
90dB min
● RADIATION-HARD EQUIPMENT
● IMPROVED REPLACEMENT FOR AD515
AND AD549
DESCRIPTION
Case (Guard)
8
The OPA128 is an ultra-low bias current monolithic
operational amplifier. Using advanced geometry
dielectrically-isolated FET (Difet®) inputs, this mono-
lithic amplifier achieves a performance level exceed-
ing even the best hybrid electrometer amplifiers.
7
+V
CC
–In
2
Laser-trimmed thin-film resistors give outstanding volt-
age offset and drift performance.
3
A noise-free cascode and low-noise processing give
the OPA128 excellent low-level signal handling capa-
bilities. Flicker noise is very low.
Noise-Free
Cascode
+In
6
Output
The OPA128 is an improved pin-for-pin replacement
for the AD515.
28kΩ
2kΩ
28kΩ
2kΩ
Trim
1
1kΩ
1kΩ
Difet® Burr-Brown Corp.
5
Trim
4
–V
CC
OPA128 Simplified Circuit
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706
Telex: 066-6491 FAX: (520) 889-1510
• Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
FAXLine: (800) 548-6133 (US/Canada Only) Cable: BBRCORP
•
•
•
•
Immediate Product Info: (800) 548-6132
©1986 Burr-Brown Corporation
PDS-653E
Printed in U.S.A. May, 1995
SBOS148
SPECIFICATIONS
ELECTRICAL
At VCC = ±15VDC and TA = +25°C, unless otherwise noted. Pin 8 connected to ground.
OPA128JM
OPA128KM
TYP MAX
OPA128LM
TYP MAX
OPA128SM
TYP MAX
PARAMETER
INPUT
CONDITIONS
MIN
TYP MAX
MIN
MIN
MIN
UNITS
BIAS CURRENT(1)
Input Bias Current
VCM = 0VDC,
RL ≥ 10kΩ
±150 ±300
±75
±150
±40
±75
±75
±150
fA
fA
OFFSET CURRENT(1)
Input Offset Current
VCM = 0VDC,
RL ≥ 10kΩ
65
30
30
30
OFFSET VOLTAGE(1)
Input Offset Voltage
Average Drift
VCM = 0VDC
TA = TMIN to TMAX
±260 ±1000
±140 ±500
±10
120
±140 ±500
±140 ±500
±10
120
µV
µV/°C
dB
±20
±5
Supply Rejection
80
120
90
90
120
90
±1
±100
±1
±32
±1
±32
±1
±32
µV/V
NOISE
Voltage: fO = 10Hz
fO = 100Hz
fO = 1kHz
fO = 10kHz
fB = 10Hz to 10kHz
fB = 0.1Hz to 10Hz
Current: fB = 0.1Hz to 10Hz
fO = 0.1Hz to 20kHz
92
78
27
15
2.4
4
92
78
27
15
2.4
4
92
78
27
15
2.4
4
92
78
27
15
2.4
4
nV/√Hz
nV/√Hz
nV/√Hz
nV/√Hz
µVrms
µVp-p
4.2
0.22
3
0.16
2.3
0.12
3
0.16
fA, p-p
fA/√Hz
IMPEDANCE
Differential
Common-Mode
1013 || 1
1015 || 2
1013 || 1
1015 || 2
1013|| 1
1015 || 2
1013 || 1
1015 || 2
Ω || pF
Ω || pF
VOLTAGE RANGE(4)
Common-Mode Input Range
Common-Mode Rejection
±10
80
±12
118
±10
90
±12
118
±10
90
±12
118
±10
90
±12
118
V
dB
VIN = ±10VDC
RL ≥ 2kΩ
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
FREQUENCY RESPONSE
94
128
110
128
110
128
110
128
dB
(2)
Unity Gain, Small Signal
Full Power Response
Slew Rate
Settling Time, 0.1%
0.01%
0.5
1
47
3
5
10
0.5
1
1
47
3
5
10
0.5
1
1
47
3
5
10
0.5
1
1
47
3
5
10
MHz
kHz
V/µs
µs
20Vp-p, RL = 2kΩ
VO = ±10V, RL =2kΩ 0.5
Gain = –1, RL = 2kΩ
10V Step
µs
Overload Recovery,
50% Overdrive(3)
Gain = –1
5
5
5
5
µs
RATED OUTPUT
Voltage Output
Current Output
Output Resistance
Load Capacitance Stability
Short Circuit Current
RL = 2kΩ
VO = ±10VDC
DC, Open Loop
Gain = +1
±10
±5
±13
±10
100
1000
34
±10
±5
±13
±10
100
1000
34
±10
±5
±13
±10
100
1000
34
±10
±5
±13
±10
100
1000
34
V
mA
Ω
pF
mA
10
55
10
55
10
55
10
55
POWER SUPPLY
Rated Voltage
±15
±15
±15
±15
VDC
Voltage Range,
Derated Performance
Current, Quiescent
±5
±18
1.5
±5
±18
1.5
±5
±18
1.5
±5
±18
1.5
VDC
mA
IO = 0mADC
0.9
0.9
0.9
0.9
TEMPERATURE RANGE
Specification
Operating
Storage
Ambient Temp.
Ambient Temp.
Ambient Temp.
0
–55
–65
+70
+125
+150
0
–55
–65
+70
+125
+150
0
–55
–65
+70
+125
+150
–55
–55
–65
+125
+125
+150
°C
°C
°C
θ Junction-Ambient
200
200
200
200
°C/W
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. Bias current doubles approximately every 11°C. (2) Sample
tested. (3) Overload recovery is defined as the time required for the output to return from saturation to linear operation following the removal of a 50% input overdrive.
(4) If it is possible for the input voltage to exceed the supply voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices
can withstand overload currents of 0.3mA indefinitely without damage.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
OPA128
2
ELECTRICAL (FULL TEMPERATURE RANGE SPECIFICATIONS)
At VCC = ±15VDC and TA = TMIN and TMAX, unless otherwise noted.
OPA128JM
TYP MAX
OPA128KM
TYP MAX
OPA128LM
TYP MAX
OPA128SM
TYP MAX
PARAMETER
CONDITIONS
MIN
MIN
MIN
MIN
UNITS
TEMPERATURE RANGE
Specification Range
INPUT
Ambient Temp.
0
+70
0
+70
0
+70
–55
+125
°C
BIAS CURRENT(1)
Input Bias Current
VCM = 0VDC
VCM = 0VDC
VCM = 0VDC
±2.5
±8
±1.3
±4
±0.7
±2
±43
±170
pA
pA
OFFSET CURRENT(1)
Input Offset Current
1.1
0.6
0.6
18
OFFSET VOLTAGE(1)
Input Offset Voltage
Average Drift
±2.2mV
±20
±1mV
±10
±750
±5
±1.5mV
±10
µV
µV/°C
dB
Supply Rejection
74
114
80
114
80
114
80
106
±2
±200
±2
±100
±2
±100
±5
±100
µV/V
VOLTAGE RANGE(2)
Common-Mode Input Range
Commmon-Mode Rejection
±10
74
±11
112
±10
80
±11
112
±10
80
±11
112
±10
74
±11
104
V
dB
VIN = ±10VDC
RL ≥ 2kΩ
OPEN-LOOP GAIN, DC
Open-Loop Voltage Gain
RATED OUTPUT
90
125
104
125
104
125
90
122
dB
Voltage Output
Current Output
Short Circuit Current
RL = 2k
VO = ±10VDC
VO = 0VDC
±10
±5
10
±10
±5
10
±10
±5
10
±10
±5
10
V
mA
mA
22
22
22
18
POWER SUPPLY
Current, Quiescent
I = 0mADC
0.9
1.8
0.9
1.8
0.9
1.8
0.9
2
mA
NOTES: (1) Offset voltage, offset current, and bias current are measured with the units fully warmed up. (2) If it is possible for the input voltage to exceed the supply
voltage, a series protection resistor should be added to limit input current to 0.5mA. The input devices can withstand overload currents of 0.3mA indefinitely without
damage.
CONNECTION DIAGRAM
ORDERING INFORMATION
TEMPERATURE
BIAS CURRENT,
max (fA)
Top View
PRODUCT
PACKAGE
RANGE
Substrate and Case
OPA128JM
OPA128KM
OPA128LM
OPA128SM
TO-99
TO-99
TO-99
TO-99
0°C to +70°C
0°C to +70°C
0°C to +70°C
±300
±150
±75
8
Offset
Trim
+VCC
1
3
7
–55°C to +125°C
±150
2
–In
OPA128
6
Output
PACKAGE INFORMATION
Offset
Trim
5
PACKAGE DRAWING
NUMBER(1)
+In
PRODUCT
PACKAGE
4
–VCC
OPA128JM
OPA128KM
OPA128LM
OPA128SM
TO-99
TO-99
TO-99
TO-99
001
001
001
001
ABSOLUTE MAXIMUM RATINGS
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
Supply ........................................................................................... ±18VDC
Internal Power Dissipation(1) .......................................................... 500mW
Differential Input Voltage .............................................................. ±36VDC
Input Voltage Range ..................................................................... ±18VDC
Storage Temperature Range .......................................... –65°C to +150°C
Operating Temperature Range ....................................... –55°C to +125°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Output Short Circuit Duration(2) ................................................ Continuous
Junction Temperature .................................................................... +175°C
NOTES: (1) Packages must be derated based on θCA = 150°C/W or θJA
=
200°C/W. (2) Short circuit may be to power supply common only. Rating
applies to +25°C ambient. Observe dissipation limit and TJ.
®
3
OPA128
DICE INFORMATION
PAD
FUNCTION
1
2
Offset Trim
–In
3
+In
4
–VCC
5
6
Offset Trim
Output
7
+VCC
8
NC
Substrate
No Connection
Substrate Bias: Isolated, normally con-
nected to common.
MECHANICAL INFORMATION
MILS (0.001")
MILLIMETERS
Die Size
Die Thickness
Min. Pad Size
96 x 71 ±5
20 ±3
4 x 4
2.44 x 1.80 ±0.13
0.51 ±0.08
0.10 x 0.10
Backing
None
OPA128 DIE TOPOGRAPHY
TYPICAL PERFORMANCE CURVES
At TA = +25°C, ±15VDC, unless otherwise noted.
OPEN-LOOP FREQUENCY RESPONSE
140
POWER SUPPLY REJECTION vs FREQUENCY
140
120
100
80
–45
–90
120
100
80
Gain
Ø
+PSRR
60
60
Phase
Margin
90°
–PSRR
–135
–180
40
40
20
0
20
0
1
10
100
1k
10k
100k
1M
10M
1
10
100
1k
10k
100k
1M
10M
Frequency (Hz)
Frequency (Hz)
COMMON-MODE REJECTION
vs FREQUENCY
COMMON-MODE REJECTION
vs INPUT COMMON-MODE VOLTAGE
140
120
100
80
120
110
100
90
60
40
80
20
0
70
1
10
100
1k
10k
100k
1M
10M
–15
–10
–5
0
5
10
15
Frequency (Hz)
Common-Mode Voltage (V)
®
OPA128
4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, +15VDC, unless otherwise noted.
BIAS AND OFFSET CURRENT
vs TEMPERATURE
BIAS AND OFFSET CURRENT
vs INPUT COMMON-MODE VOLTAGE
100pA
10pA
1pA
10
1
SM
IB
IOS
100
0.1
10
1
0.01
–50
–25
0
25
50
75
100
125
–15
–10
–5
0
5
10
15
Common-Mode Voltage (V)
Ambient Temperature (°C)
GAIN-BANDWIDTH AND SLEW RATE
vs SUPPLY VOLTAGE
GAIN-BANDWIDTH AND SLEW RATE
vs TEMPERATURE
3
2
6
4
4
3
2
4
3
2
1
+ Slew
– Slew
1
0
2
0
1
0
0
0
5
10
15
20
–75
–50
–25
0
25
50
75
100 125
Supply Voltage (±VCC
)
Ambient Temperature (°C)
OPEN-LOOP GAIN, PSR, AND CMR vs TEMPERATURE
SUPPLY CURRENT vs TEMPERATURE
140
130
120
2
1.5
1
AOL
CMR
110
100
0.5
0
PSR
–75
–50
–25
0
25
50
75
100 125
–75
–50
–25
0
25
50
75
100 125
Ambient Temperature (°C)
Ambient Temperature (°C)
®
5
OPA128
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, +15VDC, unless otherwise noted.
SMALL SIGNAL TRANSIENT RESPONSE
LARGE SIGNAL TRANSIENT RESPONSE
80
10
0
40
0
–10
–40
–80
5µs
5µs
5V
20mV
2
1µs
0
25
50
0
4
6
8
10
Time (µs)
Time (µs)
BIAS CURRENT
vs ADDITIONAL POWER DISSIPATION
COMMON-MODE INPUT RANGE
vs SUPPLY VOLTAGE
100pA
10pA
1pA
15
10
KM
100
5
0
10
1
0
50
100
150
200
250
300
350
0
5
10
15
20
Additional Power Dissipation (mW)
Supply Voltage (±VCC
)
INPUT VOLTAGE NOISE SPECTRAL DENSITY
FULL-POWER OUTPUT vs FREQUENCY
1k
100
10
30
20
10
0
1
10
100
1k
10k
100k
1k
10k
100k
Frequency (Hz)
1M
Frequency (Hz)
®
OPA128
6
The amplifier case should be connected to any input shield or
guard via pin 8. This insures that the amplifier itself is fully
surrounded by guard potential, minimizing both leakage and
noise pickup (see Figure 2).
APPLICATIONS INFORMATION
OFFSET VOLTAGE ADJUSTMENT
The OPA128 offset voltage is laser-trimmed and will require
no further trim for most applications. As with most amplifi-
ers, externally trimming the remaining offset can change
drift performance by about 0.3µV/°C for each 100µV of
adjusted effort. Note that the trim (Figure 1) is similar to
operational amplifiers such as HA-5180 and AD515. The
OPA128 can replace many other amplifiers by leaving the
external null circuit unconnected.
Non-Inverting
Buffer
8
8
2
2
Out
Out
6
6
OPA128
OPA128
3
3
In
In
+V
CC
7
Inverting
TO-99 Bottom View
2
6
5
In
OPA128
4
6
7
3
2
1
2
3
3
Out
6
5
±10mV Typical
Trim Range
OPA128
4
8
8
(1)
1
NOTE: (1) 10kΩ to 1MΩ
Trim Potentiometer
–V
(100kΩ Recommended)
BOARD LAYOUT
FOR INPUT GUARDING
CC
Guard top and bottom of board.
Alternate: use Teflon® standoff
for sensitive input pins.
FIGURE 1. Offset Voltage Trim.
Teflon® E.I. Du Pont de Nemours & Co.
INPUT PROTECTION
Conventional monolithic FET operational amplifiers’ inputs
must be protected against destructive currents that can flow
when input FET gate-to-substrate isolation diodes are for-
ward-biased. Most BIFET® amplifiers can be destroyed by
the loss of –VCC.
FIGURE 2. Connection of Input Guard.
Triboelectric charge (static electricity generated by friction)
can be a troublesome noise source from cables connected to
theinputofanelectrometeramplifier.Speciallow-noisecable
will minimize this effect but the optimum solution is to mount
the signal source directly at the electrometer input with short,
rigid, wiring to preclude microphonic noise generation.
Because of its dielectric isolation, no special protection is
needed on the OPA128. Of course, the differential and
common-mode voltage limits should be observed.
Static damage can cause subtle changes in amplifier input
characteristics without necessarily destroying the device. In
precision operational amplifiers (both bipolar and FET types),
this may cause a noticeable degradation of offset voltage and
drift.
TESTING
AccuratelytestingtheOPA128isextremelydifficultduetoits
high level of performance. Ordinary test equipment may not
be able to resolve the amplifier’s extremely low bias current.
Static protection is recommended when handling any preci-
sion IC operational amplifier.
Inaccurate bias current measurements can be due to:
1. Test socket leakage
2. Unclean package
GUARDING AND SHIELDING
3. Humidity or dew point condensation
As in any situation where high impedances are involved,
careful shielding is required to reduce “hum” pickup in input
leads. If large feedback resistors are used, they should also be
shielded along with the external input circuitry. Leakage
currents across printed circuit boards can easily exceed the
bias current of the OPA128. To avoid leakage problems, it is
recommended that the signal input lead of the OPA128 be
wired to a Teflon standoff. If the input is to be soldered
directly into a printed circuit board, utmost care must be used
in planning the board layout. A “guard” pattern should
completely surround the high impedance input leads and
should be connected to a low impedance point which is at the
signal input potential.
4. Circuit contamination from fingerprints or anti-static
treatment chemicals
5. Test ambient temperature
6. Load power dissipation
BIFET® National Semiconductor Corp.
®
7
OPA128
500Ω
9.5kΩ
Guard
CF
RF
10pF
1011
+15V
7
1VDC
Output
8
2
3
Ω
6
OPA128
4
8
5
2
3
Output
eO
1
Offset Trim
6
OPA128
100kΩ
pH Probe
RS ≈ 500MΩ
50mV Output
∆Q
–15V
eO = –∆Q/CF
100pF
1011
Ω
Low Frequency Cutoff =
1/(2 π RF CF) = 0.16Hz
FIGURE 3. High Impedance (1015Ω) Amplifier.
FIGURE 4. Piezoelectric Transducer Charge Amplifier.
I
B ≈ 100fA
Gain = 100
CMRR ≈ 118dB
IN ≈ 1015
3
–In
6
OPA128
R
Ω
2
RF
10kΩ
25kΩ
25kΩ
25kΩ
2
3
5
6
RG
202Ω
RF
10kΩ
Output
Burr-Brown
INA105
Differential
Amplifier
2
25kΩ
6
OPA128
3
+In
1
Differential Voltage Gain = 1 + 2RF/RG
FIGURE 5. FET Input Instrumentation Amplifier for Biomedical Applications.
10kΩ
≈10pF
(1)
1MΩ
2
3
8
1N914
Output
6
OPA128
2
3
(1)
(1)
6
OPA606
Input
Droop ≈ 100µV/s
1N914
2N4117A
1000µF
Polystyrene
NOTE: (1) Reverse polarity
for negative peak detection.
FIGURE 6. Low-Droop Positive Peak Detector.
®
OPA128
8
<1pF to prevent gain peaking.
1010Ω
1000MΩ
2kΩ
18kΩ
Silicon Detector Corp.
SD-020-11-21-011
+15V
0.1µF
2
Guard
2
6
Current
Input
8
7
OPA128
3
Output
Output
6
8
OPA128
5 x 109 V/W
0.1µF
VO = –1V/nA
3
4
0.01µF
1010Ω
–15V
Circuit must be well shielded.
FIGURE 7. Sensitive Photodiode Amplifier.
FIGURE 8. Current-to-Voltage Converter.
109Ω
+5V
2
3
6
OPA128
Biased
Current
Transducer
8
3
4
5
1
10
11
12
INA101HP
Output
14
+15V
7
5
VO = 1mV/pA
8
REF101
6
+5V
4
1
FIGURE 9. Biased Current-to-Voltage Converter.
®
9
OPA128
PACKAGE OPTION ADDENDUM
www.ti.com
22-Jun-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
TO-99
TO-99
TO-99
TO-99
Drawing
OPA128JM
OPA128KM
OPA128LM
OPA128SM
NRND
NRND
NRND
NRND
LMC
8
8
8
8
20
20
20
20
TBD
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Level-NA-NA-NA
Level-NA-NA-NA
Level-NA-NA-NA
Level-NA-NA-NA
LMC
LMC
LMC
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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