OPA1632 [BB]
High-Performance, Fully-Differential AUDIO OP AMP; 高性能,全差分音频运算放大器型号: | OPA1632 |
厂家: | BURR-BROWN CORPORATION |
描述: | High-Performance, Fully-Differential AUDIO OP AMP |
文件: | 总16页 (文件大小:494K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
OPA1632
SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
High-Performance, Fully-Differential
AUDIO OP AMP
FD EATURES
DESCRIPTION
SUPERIOR SOUND QUALITY
The OPA1632 is a fully-differential amplifier designed
for driving high-performance audio analog-to-digital
converters (ADCs). It provides the highest audio quality,
with very low noise and output drive characteristics
optimized for this application. The OPA1632’s excellent
gain bandwidth of 180MHz and very fast slew rate of
50V/µs produce exceptionally low distortion. Very low
input noise of 1.3nV/√Hz further ensures maximum
signal-to-noise ratio and dynamic range.
D
D
D
ULTRA LOW DISTORTION: 0.000022%
LOW NOISE: 1.3nV/√Hz
HIGH SPEED:
− Slew Rate: 50V/µs
− Gain Bandwidth: 180MHz
D
FULLY DIFFERENTIAL ARCHITECTURE:
− Balanced Input and Output Converts
Single-Ended Input to Balanced
Differential Output
The flexibility of the fully differential architecture allows
for easy implementation of
a single-ended to
fully-differential output conversion. Differential output
reduces even-order harmonics and minimizes
common-mode noise interference. The OPA1632
provides excellent performance when used to drive
high-performance audio ADCs such as the PCM1804.
A shutdown feature also enhances the flexibility of this
amplifier.
D
D
WIDE SUPPLY RANGE: 2.5V to 16V
SHUTDOWN TO CONSERVE POWER
AD PPLICATIONS
AUDIO ADC DRIVER
D
D
D
D
BALANCED LINE DRIVER
BALANCED RECEIVER
ACTIVE FILTER
The OPA1632 is available in an SO-8 package and a
thermally-enhanced MSOP-8 PowerPAD package.
RELATED DEVICES
PREAMPLIFIER
OPAx134
High-PerformanceAudio Amplifiers
Precision High-Speed DiFET Amplifiers
Low-Noise Bipolar Amplifiers
OPA627/637
OPAx227/x228
THD + NOISE vs FREQUENCY
0.001
Gain = +1
+15V
Ω
RF = 348
O = 3Vrms
Differential I/O
V
Digital
Output
VIN+
VIN−
−
VIN
VOCM
VIN+
0.0001
VCOM
Ω
RL = 600
−
15V
Ω
RL = 2k
0.00001
10
100
1000
10k
100k
Typical ADC Circuit
Frequency (Hz)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.
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Copyright 2003−2006, Texas Instruments Incorporated
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
(1)
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DRAWING
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT
MEDIA, QUANTITY
PRODUCT
PACKAGE-LEAD
OPA1632D
OPA1632DR
OPA1632DGN
Rails, 100
Tape and Reel, 2500
Rails, 100
SO-8
D
−40°C to +85°C
−40°C to +85°C
OPA1632
1632
OPA1632
MSOP-8
PowerPAD
DGN
OPA1632DGNR Tape and Reel, 2500
(1)
For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI web site
at www.ti.com.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handledwith appropriate precautions. Failure to observe
(1)(2)
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted.
proper handling and installation procedures can cause damage.
Supply Voltage,
V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16.5V
S
Input Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
I
S
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
Output Current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150mA
O
Differential Input Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V
ID
Maximum Junction Temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Operating Free-Air Temperature Range . . . . . . . . . . . . . . . −40°C to +85°C
Storage Temperature Range, T
. . . . . . . . . . . . . . . . . −65°C to +150°C
STG
ESD Ratings: Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Charge Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . 500V
Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V
PIN CONFIGURATION
(1)
Top View
MSOP, SO
Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
The OPA1632 MSOP-8 package version incorporates a
PowerPAD on the underside of the chip. This acts as a heatsink
and must be connected to a thermally dissipative plane for proper
power dissipation. Failure to do so may result in exceeding the
maximumjunction temperature, which can permanently damage
the device. See TI technical brief SLMA002 for more information
about using the PowerPAD thermally enhanced package.
OPA1632
(2)
VIN+
VIN
1
2
3
4
8
7
6
5
−
VOCM
V+
Enable
−
V
VOUT+
VOUT−
2
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
ELECTRICAL CHARACTERISTICS: V = 15V
S
V
= 15V: R = 390Ω, R = 800Ω, and G = +1, unless otherwise noted.
F L
S
OPA1632
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
0.5
5
3
mV
µV/_C
µV/V
dVos/dT
PSRR
vs Power Supply, DC
INPUT BIAS CURRENT
Input Bias Current
Input Offset Current
NOISE
316
13
I
2
6
µA
nA
B
I
100
500
OS
Input Voltage Noise
Input Current Noise
INPUT VOLTAGE
f = 10 kHz
f = 10 kHz
1.3
0.4
nV/√Hz
pA/√Hz
Common-Mode Input Range
Common-Mode Rejection Ratio, DC
INPUT IMPEDANCE
(V−) + 1.5
74
(V+) − 1
V
90
34 || 4
78
dB
Input Impedance (each input pin)
MΩ || pF
OPEN-LOOP GAIN
Open-Loop Gain , DC
FREQUENCY RESPONSE
Small-Signal Bandwidth
66
dB
G = +1, R = 348Ω
180
90
MHz
MHz
MHz
MHz
MHz
dB
F
(V = 100mV , Peaking < 0.5 dB)
PP
G = +2, R = 602Ω
O
F
G = +5, R = 1.5kΩ
36
F
G = +10, R = 3.01kΩ
18
F
Bandwidth for 0.1dB Flatness
Peaking at a Gain of 1
Large-Signal Bandwidth
Slew Rate (25% to 75% )
Rise and Fall Time
G = +1, V = 100mV
40
O
PP
V
= 100mV
0.5
800
50
O
PP
G = +2, V = 20V
kHz
V/µs
ns
O
PP
G = +1
G = +1, V = 5V Step
100
75
O
Settling Time to 0.1%
G = +1, V = 2V Step
ns
O
0.01%
G = +1, V = 2V Step
200
ns
O
Total Harmonic Distortion + Noise
Differential Input/Output
Differential Input/Output
Single-Ended In/Differential Out
Single-Ended In/Differential Out
Intermodulation Distortion
Differential Input/Output
Differential Input/Output
Single-Ended In/Differential Out
Single-Ended In/Differential Out
Headroom
G = +1, f = 1kHz, V = 3Vrms
O
R
= 600Ω
0.0003
%
%
%
%
L
R
= 2kΩ
0.000022
0.000059
0.000043
L
R
= 600Ω
L
R
= 2kΩ
L
G = +1, SMPTE/DIN, V = 2V
O
PP
R
= 600Ω
0.00008
0.00005
0.0001
0.0007
20.0
%
%
%
%
L
L
R
= 2kΩ
L
R
= 600Ω
R
= 2kΩ
L
THD < 0.01%, R = 2kΩ
V
PP
L
OUTPUT
Voltage Output Swing
R
= 2kΩ
= 800Ω
(V+) − 1.9
(V+) − 4.5
+50/−60
(V−) + 1.9
(V−) + 4.5
V
V
L
R
L
Short-Circuit Current
I
Sourcing/Sinking
85
mA
SC
Closed-Loop Output Impedance
G = +1, f = 100kHz
0.3
Ω
(1)
POWER-DOWN
Enable Voltage Threshold
Disable Voltage Threshold
Shutdown Current
Turn-On Delay
(V−) + 2
V
V
(V−) + 0.8
V
= −15V
0.85
2
1.5
mA
µs
µs
ENABLE
Time for I to Reach 50%
Q
Turn-Off Delay
Time for I to Reach 50%
2
Q
POWER SUPPLY
Specified Operating Voltage
Operating Voltage
Quiescent Current
TEMPERATURE RANGE
Specified Range
15
14
16
V
V
2.5
I
Per Channel
17.1
mA
Q
−40
−40
−65
+85
+125
+150
_C
_C
Operating Range
Storage Range
_C
Thermal Resistance
200
_C/W
q
JA
(1)
Amplifier has internal 50kΩ pull-up resistor to V
CC+
pin. This enables the amplifier with no connection to shutdown pin.
3
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
TYPICAL CHARACTERISTICS
At T = +25°C, V
=
15V, and R = 2kΩ, unless otherwise noted.
A
S
L
THD + NOISE vs FREQUENCY
THD + NOISE vs FREQUENCY
0.001
0.001
0.0001
Gain = +1
Gain = +1
Ω
RF = 348
VO = 3Vrms
Ω
RF = 348
VO = 3Vrms
Differential I/O
Single−Ended Input
Differential Output
0.0001
Ω
RL = 600
Ω
RL = 600
Ω
RL = 2k
Ω
RL = 2k
0.00001
0.00001
10
100
1k
10k
100k
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
THD + NOISE vs OUTPUT VOLTAGE
Gain = +1
THD + NOISE vs OUTPUT VOLTAGE
0.1
0.01
0.01
0.001
Ω
RF = 348
f = 1kHz
Differential I/O
Ω
RL = 600
Ω
RL = 600
0.001
0.0001
Gain = +1
Ω
RL = 2k
Ω
RL = 2k
Ω
RF = 348
0.0001
0.00001
f = 1kHz
Single−Ended Input
Differential Output
0.00001
0.01
0.1
1
10
100
0.01
0.1
1
10
100
Differential Output Voltage (Vrms)
Differential Output Voltage (Vrms)
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
INTERMODULATION DISTORTION
vs OUTPUT VOLTAGE
0.1
0.1
0.01
0.001
0.01
0.001
Ω
Ω
RL = 600
RL = 600
Gain = +1
Gain = +1
Ω
RF = 348
Ω
RL = 2k
Ω
RF = 348
Single−Ended Input
Differential Output
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
0.0001
0.00001
0.0001
0.00001
Differential I/O
SMPTE 4:1; 60Hz, 7kHz
DIN 4:1; 250Hz, 8kHz
Ω
RL = 2k
0.01
0.1
1
10
100
0.01
0.1
1
10
100
Differential Output Voltage (VPP
)
Differential Output Voltage (VPP
)
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
TYPICAL CHARACTERISTICS (Cont.)
At T = +25°C, V
=
15V, and R = 2kΩ, unless otherwise noted.
A
S
L
VOLTAGE NOISE vs FREQUENCY
CURRENT NOISE vs FREQUENCY
10
10
1
1
0.1
10
100
1k
10k
100k
10
100
1k
10k
100k
Frequency (Hz)
Frequency (Hz)
OUTPUT VOLTAGE
vs DIFFERENTIAL LOAD RESISTANCE
OUTPUT IMPEDANCE
vs FREQUENCY
15
100
10
1
Ω
RF = 1k
G = +2
VCC
= 5V
VCC
=
15V
5V
10
5
VCC
=
0
VCC
=
5V
−
5
−
−
10
VCC
=
15V
15
0.1
100
1k
10k
100k
100k
1M
10M
100M
1G
Ω
( )
RL
Frequency (Hz)
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
changing the values of R1 and R2. The feedback resistor
values (R3 and R4) should be kept relatively low, as
indicated, for best noise performance.
APPLICATIONS INFORMATION
Figure 1 shows the OPA1632 used as a differential-output
driver for the PCM1804 high-performance audio ADC.
R5, R6, and C3 provide an input filter and charge glitch
reservoir for the ADC. The values shown are generally
satisfactory. Some adjustment of the values may help
optimize performance with different ADCs.
Supply voltages of 15V are commonly used for the
OPA1632. The relatively low input voltage swing required
by the ADC allows use of lower power-supply voltage, if
desired. Power supplies as low as 8V can be used in this
application with excellent performance. This reduces
power dissipation and heat rise. Power supplies should be
bypassed with 10µF tantalum capacitors in parallel with
0.1µF ceramic capacitors to avoid possible oscillations
and instability.
It is important to maintain accurate resistor matching on
R1/R2 and R3/R4 to achieve good differential signal
balance. Use 1% resistors for highest performance. When
connected for single-ended inputs (inverting input
grounded, as shown in Figure 1), the source impedance
must be low. Differential input sources must have
well-balanced or low source impedance.
The VCOM reference voltage output on the PCM1804 ADC
provides the proper input common-mode reference
voltage (2.5V). This VCOM voltage is buffered with op amp
A2 and drives the output common-mode voltage pin of the
OPA1632. This biases the average output voltage of the
OPA1632 to 2.5V.
Capacitors C1, C2, and C3 should be chosen carefully for
good distortion performance. Polystyrene, polypropylene,
NPO ceramic, and mica types are generally excellent.
Polyester and high-K ceramic types such as Z5U can
create distortion.
The signal gain of the circuit is generally set to
approximately 0.25 to be compatible with commonly-used
audio line levels. Gain can be adjusted, if necessary, by
V+
+8V to +16V
µ
10 F
+
µ
0.1 F
R3
Ω
270
C1
1nF
R1
R5
Ω
1k
3
Ω
40
8
2
1
5
+
Balanced or
Single−Ended
Input
VOCM
C3
2.7nF
1/2
PCM1804
R2
OPA1632
Ω
1k
−
4
6
R6
VCOM
(2.5V)
C2
1nF
7
Ω
40
R4
Ω
270
Enable(1)
OPA134
Ω
1k
µ
0.1 F
NOTE: (1) Leave open to enable.
µ
0.1 F
−
Logic signals referenced to V supply.
µ
10 F
See the Shutdown Function section.
+
−
−
−
8V to 16V
V
Figure 1. ADC Driver for Professional Audio
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
Quiescent current is reduced to approximately 0.85mA
when the amplifier is disabled. When disabled, the
output stage is not in a high-impedance state. Thus, the
shutdown function cannot be used to create a
multiplexed switching function in series with multiple
amplifiers.
FULLY-DIFFERENTIAL AMPLIFIERS
Differential signal processing offers a number of
performance advantages in high-speed analog signal
processing systems, including immunity to external
common-mode noise, suppression of even-order
nonlinearities, and increased dynamic range. Fully-dif-
ferential amplifiers not only serve as the primary means
of providing gain to a differential signal chain, but also
provide a monolithic solution for converting single-en-
ded signals into differential signals allowing for easy,
high-performance processing.
OUTPUT COMMON-MODE VOLTAGE
The output common-mode voltage pin sets the DC
output voltage of the OPA1632. A voltage applied to the
V
pin from a low-impedance source can be used to
OCM
directly set the output common-mode voltage. For a
A standard configuration for the device is shown in
Figure 2. The functionality of a fully differential amplifier
can be imagined as two inverting amplifiers that share
a common noninverting terminal (though the voltage is
not necessarily fixed). For more information on the
basic theory of operation for fully differential amplifiers,
refer to the Texas Instruments application note
SLOA054, Fully Differential Amplifiers, available for
download from the TI web site (www.ti.com).
V
V
voltage at mid-supply, make no connection to the
pin.
OCM
OCM
Depending on the intended application, a decoupling
capacitor is recommended on the V node to filter
any high-frequency noise that could couple into the
signal path through the V
OCM
circuitry. A 0.1µF or 1µF
OCM
capacitor is generally adequate.
Output common-mode voltage causes additional
current to flow in the feedback resistor network. Since
this current is supplied by the output stage of the
amplifier, this creates additional power dissipation. For
commonly-used feedback resistance values, this
current is easily supplied by the amplifier. The additional
internal power dissipation created by this current may
be significant in some applications and may dictate use
of the MSOP PowerPAD package to effectively control
self-heating.
+15V
Digital
Output
VIN+
AIN
VOCM
VIN
AIN
−
VREF
PowerPAD DESIGN CONSIDERATIONS
−
15V
The OPA1632 is available in a thermally-enhanced
PowerPAD family of packages. These packages are
constructed using a downset leadframe upon which the
die is mounted (see Figure 3[a] and Figure 3[b]). This
arrangement results in the lead frame being exposed as
a thermal pad on the underside of the package (see
Figure 3[c]). Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad.
Figure 2. Typical ADC Circuit
SHUTDOWN FUNCTION
The shutdown (enable) function of the OPA1632 is
referenced to the negative supply of the operational
amplifier. A valid logic low (< 0.8V above negative
supply) applied to the enable pin (pin 7) disables the
amplifier output. Voltages applied to pin 7 that are
greater than 2V above the negative supply place the
amplifier output in an active state, and the device is
enabled. If pin 7 is left disconnected, an internal pull-up
resistor enables the device. Turn-on and turn-off times
are approximately 2µs each.
DIE
Thermal
Pad
(a) Side View
DIE
(b) End View
(c) Bottom View
Figure 3. Views of the Thermally-Enhanced Package.
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SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
The PowerPAD package allows for both assembly and
thermal management in one manufacturing operation.
During the surface-mount solder operation (when the
leads are being soldered), the thermal pad must be
soldered to a copper area underneath the package.
Through the use of thermal paths within this copper
area, heat can be conducted away from the package
into either a ground plane or other heat-dissipating
device. Soldering the PowerPAD to the printed circuit
board (PCB) is always required, even with applications
that have low power dissipation. It provides the
necessary thermal and mechanical connection
between the lead frame die pad and the PCB.
These vias help dissipate the heat generated by the
OPA1632 IC, and may be larger than the 13mil
diameter vias directly under the thermal pad. They
can be larger because they are not in the thermal
pad area to be soldered so that wicking is not a
problem.
5. Connect all holes to the internal power plane that is
at the same voltage potential as V−.
6. When connecting these holes to the plane, do not
use the typical web or spoke via connection
methodology. Web connections have a high
thermal resistance connection that is useful for
slowing the heat transfer during soldering
operations. This makes the soldering of vias that
have plane connections easier. In this application,
however, low thermal resistance is desired for the
most efficient heat transfer. Therefore, the holes
under the OPA1632 PowerPAD package should
make their connection to the internal plane with a
PowerPAD PCB LAYOUT CONSIDERATIONS
1. The thermal pad must be connected to the most
negative supply voltage on the device, V−.
2. Prepare the PCB with a top-side etch pattern, as
shown in Figure 4. There should be etch for the
leads as well as etch for the thermal pad.
complete
connection
around
the
entire
circumference of the plated-through hole.
7. The top-side solder mask should leave the terminals
of the package and the thermal pad area with its five
holes exposed. The bottom-side solder mask should
cover the five holes of the thermal pad area. This
prevents solder from being pulled away from the
thermal pad area during the reflow process.
Single or Dual
68mils x 70mils
(via diameter = 13mils)
8. Apply solder paste to the exposed thermal-pad
area and all of the IC terminals.
Figure 4. PowerPAD PCB Etch and Via Pattern.
9. With these preparatory steps in place, the IC is
simply placed in position and runs through the
solder reflow operation as any standard
surface-mount component. This results in a part
that is properly installed.
3. Place five holes in the area of the thermal pad.
These holes should be 13mils in diameter. Keep
them small so that solder wicking through the holes
is not a problem during reflow.
4. Additional vias may be placed anywhere along the
thermal plane outside of the thermal pad area.
8
ꢂ ꢀꢉ ꢠꢡꢢ ꢣ
www.ti.com
SBOS286A − DECEMBER 2003 − REVISED SEPTEMBER 2006
For systems where heat dissipation is more critical, the
OPA1632 is offered in an MSOP-8 with PowerPAD.
The thermal coefficient for the MSOP PowerPAD
(DGN) package is substantially improved over the
traditional SO package. Maximum power dissipation
levels are depicted in Figure 5 for the two packages.
The data for the DGN package assumes a board layout
that follows the PowerPAD layout guidelines.
POWER DISSIPATION AND THERMAL
CONSIDERATIONS
The OPA1632 does not have thermal shutdown
protection. Take care to assure that the maximum
junction temperature is not exceeded. Excessive
junction temperature can degrade performance or
cause permanent damage. For best performance and
reliability, assure that the junction temperature does not
exceed +125°C.
The thermal characteristics of the device are dictated
by the package and the circuit board. Maximum power
dissipation for a given package can be calculated using
the following formula:
MAXIMUM POWER DISSIPATION
vs AMBIENT TEMPERATURE
3.5
θ
θ
_
JA = 170 C/W for SO−8 (D)
_
JA = 58.4 C/W for MSOP−8 (DGN)
3.0
2.5
2.0
1.5
1.0
0.5
0
_
TJ = 150
No Airflow
C
Tmax * TA
PDmax
+
MSOP−8 (DGN) Package
qJA
(1)
Where:
P
is the maximum power dissipation in the
Dmax
amplifier (W).
SO−8 (D) Package
T
is the absolute maximum junction
max
temperature (_C).
−
−
15
40
10
35
60
85
T is the ambient temperature (_C).
A
_
Ambient Temperature ( C)
q
= q + q
JC CA.
JA
q
is the thermal coefficient from the silicon
JC
Figure 5. Maximum Power Dissipation vs Ambient
Temperature
junctions to the case (_C/W).
q
is the thermal coefficient from the case to
CA
ambient air (_C/W).
9
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2006
PACKAGING INFORMATION
Orderable Device
OPA1632D
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DG4
OPA1632DGN
SOIC
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
DGN
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DGNG4
OPA1632DGNR
ACTIVE
ACTIVE
ACTIVE
MSOP-
Power
PAD
DGN
DGN
DGN
8
8
8
80 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DGNRG4
MSOP-
Power
PAD
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DR
ACTIVE
ACTIVE
SOIC
D
D
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
OPA1632DRG4
SOIC
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
12
OPA1632DGNR
OPA1632DR
DGN
D
8
8
SITE 40
SITE 60
5.2
6.4
3.3
5.2
1.6
2.1
8
8
12
12
Q1
Q1
330
12
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
OPA1632DGNR
OPA1632DR
DGN
D
8
8
SITE 40
SITE 60
338.1
346.0
340.5
346.0
21.1
29.0
Pack Materials-Page 2
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