OPA600BM [BB]
Fast-Settling Wideband OPERATIONAL AMPLIFIER; 快速建立宽带运算放大器
| 型号： | OPA600BM |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | Fast-Settling Wideband OPERATIONAL AMPLIFIER |
| 文件： | 总9页 (文件大小：107K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPA600
Fast-Settling Wideband
OPERATIONAL AMPLIFIER
FEATURES
APPLICATIONS
● FAST SETTLING: 80ns to ±0.1%
100ns to ±0.01%
● VOLTAGE CONTROLLED OSCILLATOR
DRIVER
● FULL DIFFERENTIAL FET INPUT
● –25°C to +85°C AND
–55°C to +125°C TEMPERATURE
RANGES
● ±10V OUTPUT: 200mA
● GAIN BANDWIDTH PRODUCT: 5GHz
● LARGE SIGNAL, WIDEBAND DRIVERS
● HIGH SPEED D/A CONVERTER OUTPUT
AMPLIFIER
● VIDEO PULSE AMPLIFIER
the settling time for various gains and load conditions.
DESCRIPTION
The OPA600 is useful in a broad range of video, high
speed test circuits and ECM applications. It is particu-
larly well suited to operate as a voltage controlled oscil-
lator (VCO) driver. It makes an excellent digital-to-ana-
log converter output amplifier. It is a workhorse in test
equipment where fast pulses, large signals,
and 50Ω drive are important. It is a good choice for
sample/holds, integrators, fast waveform generators, and
multiplexers.
The OPA600 is a wideband operational amplifier specifi-
cally designed for fast settling to ±0.01% accuracy. It is
stable, easy to use, has good phase margin with minimum
overshoot, and it has excellent DC performance. It uti-
lizes an FET input stage to give low input bias current.
Its DC stability over temperature is outstanding. The slew
rate exceeds 400V/µs. All of this combines to form an
outstanding amplifier for large and small signals.
High accuracy with fast settling time is achieved by using
a high open-loop gain which provides the accuracy at
high frequencies. The thermally balanced design main-
tains this accuracy without droop or thermal tail. Exter-
nal frequency compensation allows the user to optimize
The OPA600 is specified over the industrial temperature
range (OPA600BM, CM) and military temperature range
(OPA600SM, TM). The OPA600 is housed in a welded,
hermetic metal package.
Common
+VCC
Offset Frequency
Fequency
Compensation
Fequency
Compensation
11
Offset
15
Frequency
Compensation
13
(Case)
Compensation
2
5
12
14
4
50Ω
Current
Boost
9
+Input
16
Output
8
100kΩ
100kΩ
–Input
3
100kΩ
Current
Boost
7
50Ω
6
1
Common
–VCC
International Airport Industrial Park
Tel: (602) 746-1111 Twx: 910-952-1111
©1986 Burr-Brown Corporation
•
Mailing Address: PO Box 11400
Cable: BBRCORP
•
Tucson, AZ 85734
Telex: 066-6491
•
Street Address: 6730 S. Tucson Blvd.
• Tucson, AZ 85706
•
•
•
•
FAX: (602) 889-1510
•
Immediate Product Info: (800) 548-6132
PDS-672
Printed in U.S.A. March, 1992
SPECIFICATIONS
ELECTRICAL
At VCC = ±15VDC and TA = +25°C unless otherwise noted.
OPA600CM,TM(1)
OPA600BM,SM
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
OUTPUT
Voltage
RL = 2kΩ
RL = 50Ω(2)
±10
±9
±180
±180
*
*
*
*
V
V
mA
mA
Ω
Current
Current Pulse
Resistance
RL = 50Ω(2)
±200
±200
75
*
*
*
*
RL = 50Ω(3)
Open Loop DC
To COMMON Only, tMAX = 1s(4)
Short-Circuit Current
250
300
*
mA
DYNAMIC RESPONSE
Settling Time(5): to ±0.01% (±1mV)
to ±0.1% (±10mV)
∆VOUT = 10V
∆VOUT = 10V
∆VOUT = 10V
100
80
70
125
105
95
*
*
*
*
*
*
ns
ns
ns
to ±1% (±100mV)
Gain-Bandwidth Product (open-loop)
C
C
C
C = 0pF, G = 1V/V
C = 0pF, G = 10V/V
C = 0pF, G = 100V/V
C = 0pF, G = 1000V/V
150
500
1.5
5
*
*
*
*
*
MHz
MHz
GHz
GHz
GHz
C
C
C = 0pF, G = 10,000V/V
10
Bandwidth (–3dB small signal)(6)
G = +1V/V
G = –1V/V
G = –10V/V
G = –100V/V
G = –1000V/V
125
90
95
20
6
*
*
*
*
*
*
MHz
MHz
MHz
MHz
MHz
MHz
Full Power Bandwidth
Slew Rate
V
OUT = ±5V, G = –1V/V, CC = 3.3pF, RL = 100Ω
OUT = ±5V, G = –1000V/V, CC = 0pF, RL = 100Ω
OUT = ±5V,G = –1V/V(4)
16
V
500
440
*
*
V/µs
V/µs
V
400
86
*
*
Phase Margin
GAIN
G = –1V/V, CC = 3.3pF
f = DC, RL = 2kΩ, TA = +25°C
TA = +25°C
40
94
±1
*
Degrees
Open-Loop Voltage Gain
INPUT
*
dB
Offset Voltage(7)
±4
±5
±6
±2
±5
±10
±15
mV
mV
mV
T
A = –25°C to +85°C
A = –55°C to +125°C
T
T
T
T
Offset Voltage Drift
Bias Current
T
A = –25°C to +85°C
A = –55°C to +125°C
±20
±20
±80
±100
µV/°C
µV/°C
T
A = +25°C
A = –25°C to +125°C
A = +25°C
A = –55°C to +125°C
CC = ±15V, ±1V
–20
–20
–100
–100
*
*
*
*
pA
nA
Offset Current
T
20
20
*
*
pA
nA
Power Supply Rejection Ratio
Common-Mode Voltage Range
Common-Mode Rejection Ratio
Impedance
V
200
500
+7
*
*
*
µV/V
V
dB
Ω || pF
nV√Hz
–10
60
*
*
V
CM = –5V to +5V
Differential and Common-Mode
10kHz Bandwidth
80
1011 || 2
20
*
*
*
Voltage Noise
POWER SUPPLY
Rated (VCC
Operating Range
Quiescent Current
)
±15
±30
*
*
VDC
VDC
mA
±9
±16
±38
*
*
*
TEMPERATURE RANGE (Ambient)
Operating: BM, CM
SM, TM
Storage
–25
–55
–65
+85
+125
+150
*
*
*
*
*
*
°C
°C
°C
θJC ,(junction-to-case)
θCA , (case-to-ambient)
30
35
*
*
°C/W
°C/W
*Specification same as OPA600CM, TM.
NOTES:(1)BM, CMgrades:–25°Cto+85°C. SM, TMgrades:–55°Cto+125°C. (2)Pin9connectedto+VCC, pin7connectedto–VCC. Observepowerdissipationratings.
(3) Pin 9 and 7 open. Single pulse t = 100ns. Observe power dissipation ratings. (4) Pin 9 and 7 open. See section on Current Boost. (5) G = –1V/V. Optimum settling
time and slew rate achieved by individually compensating each device. Refer to section on Compensation. (6) Frequency compensation as discussed in section on
Compensation. (7) Adjustable to zero.
MECHANICAL
M Package — 16-Pin
NOTE: Leads in true
position within 0.01"
(0.25mm) R at MMC at
seating plane.
Pin numbers shown
for reference only.
A
INCHES
DIM MIN MAX MIN
MILLIMETERS
MAX
A
B
C
D
G
H
K
L
.963
.760
.175
.014
.980 24.46 24.89
.805 19.30 20.45
.190
.022
B
4.45
0.36
4.83
0.56
.100 BASIC
2.54 BASIC
.135
.230
.155
.270
3.43
5.84
3.94
6.86
Denotes Pin 1
.600 BASIC
.095 .115
15.24 BASIC
2.41 2.92
R
C
Seating
Plane
L
G
D
K
H
1
8
9
R
16
CONNECTION DIAGRAM
ABSOLUTE MAXIMUM RATINGS(1)
+VCC
Supply Voltage, +VCC to –VCC ............................................................. ±17V
Power Dissipation, At TCASE +125°C(2) ................................................ 1.6W
Input Voltage: Differential.................................................................... ±VCC
Common-Mode ............................................................ ±VCC
Output Short Circuit Duration to Common ........................................... <5s
Temperature: pin (soldering, 20s) .................................................. +300°C
Junction(1) ,TJ ........................................................... +175°C
Offset Error
Null (optional)
Frequency
Compensation(1)
10kΩ
(3)
+VCC
5kΩ
5kΩ
C1
–Input
15
3
Temperature Range: Storage ......................................... –65°C to +150°C
Operating (case) ........................... –55°C to +125°C
–
Current Boost(2)
2
11
NOTES: (1) Stresses above those listed under “Absolute Maximum Ratings”
may cause permanent damage to the device. Exposure to absolute maximum
conditions for extended periods may affect device reliability. (2) Long term
operationatthemaximumjunctiontemperaturewillresultinreducedproductlife.
Derate internal power dissipation to achieve high MTTF.
14
12
9
Output
8
OPA600
7
ORDERING INFORMATION
6
5
VOLTAGE
TEMPERATURE
RANGE (°C)
OFFSET
DRIFT (µV/°C)
4
MODEL
Current Boost(2)
+Input
C2
13
+
OPA600BM
OPA600CM
OPA600SM
OPA600TM
–25 to +85
–25 to +85
–55 to +125
–25 to +125
±80
±20
±100
±20
16
1
Common
(Case)
(3)
–VCC
NOTES: (1) Refer to Figure 4 for recommended frequency compensation.
(2) connect pin 9 to pin 12 and connect pin 7 to pin 6 for maximum output
current. See Application Information for further information. (3) Bypass
each power supply lead as close as possible to the amplifier pins. A 1µF
CS13 tantalum capacitor is recommended. (4)There is no internal conenction.
An external connection may be made. (5) It is recommended that the
amplifier be mounted with the case in contact with a ground plane for good
thermal transfer and optimum AC performance.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject
to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not
authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
TYPICAL PERFORMANCE CURVES
Typical at TA = +25°C and ±VCC = 15VDC, unless otherwise specified.
BODE PLOT
CC = 0pF
COMPENSATION AND SLEW RATE vs GAIN
100
90
80
70
60
50
40
30
20
10
0
10
8
700
600
500
400
300
200
CC = 1pF
CC = 3.3pF
6
Slew Rate
+100
+50
0
–50
–100
–150
4
CC = 1pF
CC = 0pF
CC = 3.3pF
–10
–20
–30
–40
2
CC = 3.3pF
Compensation
CC = 1pF
100k
0
10k
1M
10M
100M
1000M
1
0
0
10
100
Frequency (Hz)
Closed-Loop Gain (V/V) = 1 + RF/RIN
SETTLING TIME
vs OUTPUT VOLTAGE CHANGE
SETTLING TIME vs GAIN
300
250
200
150
100
50
200
150
100
50
∆V = 20V
G = 1V/V
0.01%
0.1%
0.01%
1%
0.1%
1%
0
0
1
10
100
1000
5
10
15
20
Output Voltage Change (V)
Closed-Loop Gain (V/V) = 1 + RF/RIN
SETTLING TIME AND
SLEW RATE vs TEMPERATURE
OUTPUT VOLTAGE vs OUTPUT CURRENT
1.2
1.1
1.0
0.9
0.8
30
25
20
15
10
5
tS (0.01%)
tS
VCC = 15
SR
VCC = ±12
0
–75
–50
–25
0
25
50
75
100
125
50
100
150
200
250
300
Output Current (mA)
Temperature (°C)
TYPICAL PERFORMANCE CURVES (CONT)
Typical at TA = +25°C, ±VCC = 15VDC unless otherwise specified.
OPEN-LOOP GAIN AND QUIESCENT
CURRENT vs TEMPERATURE
BANDWIDTH
1.4
1.2
1.0
0.8
0.6
1.2
1.1
1.0
0.9
0.8
G = –10V/V
IQ
IQ
AVS
–75
–50
–25
0
25
50
75
100
125
–75
–50
–25
0
25
50
75
100
125
Temperature (°C)
Temperature (°C)
INSTALLATION
AND OPERATION
WIRING PRECAUTIONS
be used. The input signal return, the load signal return and
the power supply common should all be connected at the
same physical point. This eliminates common current paths
or ground loops which can cause unwanted feedback.
The OPA600 is a wideband, high frequency operational
amplifier with a gain-bandwidth product exceeding 5GHz.
This capability can be realized by observing a few wiring
precautions and using high frequency layout techniques. In
general, all printed circuit board conductors should be wide
to provide low resistance, low impedance signal paths and
should be as short as possible. The entire physical circuit
should be as small as is practical. Stray capacitances should
be minimized, especially at high impedance nodes, such as
the input terminals of the amplifier and compensation pins.
Stray signal coupling from the output to the input should be
minimized. All circuit element leads should be as short as
possible and low values of resistance should be used. This
will give the best circuit performance as it will minimize the
time constants formed with the circuit capacitances and will
eliminate stray, unwanted tuned circuits.
Each power supply lead should be bypassed to ground as
near as possible to the amplifier pins. A 1µF CS13 tantalum
capacitor is recommended. A parallel 0.01µF ceramic may
be added if desired. This is especially important when
driving high current loads. Properly bypassed and modula-
tion-free power supply lines allow full amplifier output and
optimum settling time performance.
OPA600 circuit common is connected to pins 1 and 13; these
pins should be connected to the ground plane. The input
signal return, load return, and power supply common should
also be connected to the ground plane.
The case of the OPA600 is internally connected to circuit
common, and as indicated above, pins 1 and 13 should be
connected to the ground plane. Ideally, the case should be
mechanically connected to the ground plane for good ther-
mal transfer, but because this is difficult in practice, the
OPA600 should be fully inserted into the printed circuit
board with the case very close to the ground plane to make
the best possible thermal connection. If the case and ground
plane are physically connected or are in close thermal
proximity, the ground plane will provide heat sinking which
will reduce the case temperature rise. The minimum OPA600
pin length will minimize lead inductance, thereby maximiz-
ing performance.
Grounding is the most important application consideration
for the OPA600, as it is with all high frequency circuits.
Ultra-high frequency transistors are used in the design of the
OPA600 and oscillations at frequencies of 500MHz and
above can be stimulated if good grounding techniques are
not used. A ground plane is highly recommended. It should
connect all areas of the pattern side of the printed circuit that
are not otherwise used. The ground plane provides a low
resistance, low inductance common return path for all signal
and power returns. The ground plane also reduces stray
signal pickup.
Point-to-point wiring is not recommended. However, if
point-to-point wiring is used, a single-point ground should
COMPENSATION
The flat high frequency response of the OPA600 is pre-
served and high frequency peaking is minimized by connect-
ing a small capacitor in parallel with the feedback resistor
(see Figure 1). This capacitor compensates for the closed-
loop, high frequency, transfer function zero that results from
the time constant formed by the input capacitance of the
amplifier, typically 2pF, and the input and feedback resis-
tors. The selected compensation capacitor may be a trimmer,
a fixed capacitor, or a planned PC board capacitance. The
capacitance value is strongly dependent on circuit layout and
closed-loop gain. It will typically be 2pF for a clean layout
using low resistances (1kΩ) and up to 10pF for circuits using
larger resistances. Using small resistor values will preserve
the phase margin and avoid peaking by keeping the break
frequency of this zero sufficiently high. When high closed-
loop gains are required, a three-resistor attenuator is recom-
mended to avoid using a large value resistor with its long
time constant.
The OPA600 uses external frequency compensation so that
the user may optimize the bandwidth or settling time for his
particular application. Several performance curves aid in the
selection of the correct compensation’s capacitance value.
The Bode plot shows amplitude and phase versus frequency
for several values of compensation. A related curve shows
the recommended compensation capacitance versus closed-
loop gain.
Figure 1 shows a recommended circuit schematic. Compo-
nent values and compensation for amplifiers with several
different closed-loop gains are shown. This circuit will yield
the specified settling time. Because each device is unique
and slightly different, as is each user’s circuit, optimum
settling time will be achieved by individually compensating
each device in its own circuit, if desired. A 10% to 20%
improvement in settling time has been experienced from the
values indicated in the Electrical Specifications table.
CAPACITIVE LOADS
C4
The OPA600 will drive large capacitive loads (up to 100pF)
when properly compensated and settling times of under
150ns are achievable. The effect of a capacitive load is to
decrease the phase margin of the amplifier, which may cause
high frequency peaking or oscillations. A solution is to
increase the compensation capacitance, somewhat slowing
the amplifier’s ability to respond. The recommended com-
pensation capacitance value as a function of load capaci-
tance is shown in Figure 2. (Use two capacitors, each with
the value indicated.) Alternately, without increasing the
OPA600’s compensation capacitance, the capacitive load
may be buffered by connecting a small resistance, usually
5Ω to 50Ω, in series with the Output, pin 8.
C3
R3
R2
+
+15VDC
R4
C1
–
3
12
–
4
1
R1
R5
5
8
13
OPA600
14
11
16 +
6
51Ω
C2
1µF
+
–15VDC
Closed
Loop
Gain
For very-large capacitive loads, greater than 100pF, it will
be necessary to use doublet compensation. Refer to Figure 3
and discussion on slew rate. This places the dominant pole
at the input stage. Settling time will be approximately 50%
slower; slew rate should increase. Load capacitance should
be minimized for optimum high frequency performance.
R1
R2
R3
R4
C1 C2
C3
C4
R5
+1
–1
–10
–100 100
–1000 100
open 100 short open
620
100
6.8
3.3
1
0
0
0
0
0
0
0
–
56
100
100
100
620 short open
1k
3.3k
3.3k
4.7
2.2
1
short open
3.3k
3.3k
3.2k
116
0
4.7
Because of its large output capability, the OPA600 is par-
ticularly well suited for driving loads via coaxial cables.
Note that the capacitance of coaxial cable (29pF/foot of
length for RG-58) will not load the amplifier when the
coaxial cable or transmission line is terminated in its char-
acteristic impedance.
FIGURE 1. Recommended Amplifier Circuits and Frequency
Compensation.
The primary compensation capacitors are C1 and C2 (see
Figure 1). They are connected between pins 4 and 5 and
between pins 11 and 14. Both C1 and C2 should be the same
value. As Figure 1 and the performance curves show, larger
closed-loop configurations require less capacitance, and
improved gain-bandwidth product can be realized. Note that
no compensation capacitor is required for closed-loop gains
equal to or above 100V/V. If upon initial application the
user’s circuit is unstable, and remains so after checking for
proper bypassing, grounding, etc., it may be necessary to
increase the compensation slightly to eliminate oscillations.
Do not over compensate. It should not be necessary to
increase C1 and C2 beyond 10pF to 15pF. It may also be
necessary to individually optimize C1 and C2 for improved
performance.
SETTLING TIME
Settling time is defined as the total time required, from the
input signal step, for the output to settle within the specified
error band around the final value. This error band is ex-
pressed as a percentage of the magnitude of the output
transition, a 10V step.
Settling time is a complete dynamic measure of the OPA600’s
total performance. It includes the slew rate time, a large
signal dynamic parameter, and the time to accurately reach
the final value, a small signal parameter that is a function of
bandwidth and open-loop gain. Performance curves show
125
100
75
250
200
150
100
50
≈3pF(1)
600Ω
GCLOSED LOOP = –1V/V
Compensation
Capacitors
600Ω
Load
Capacitance
–
+
Settling
Time
eIN
50
eOUT
300Ω
25
Load
Capacitance
0
0
2
4
6
8
10
NOTE: (1) 3pF typ. should match stray capacitance between pin 3
and common.
Compensation Capacitance (pF)
FIGURE 2. Capacitive Load Compensation and Response.
≈3pF(1)
the OPA600 settling time to ±1%, ±0.1%, and ±0.01%. The
best settling time is achieved in low closed-loop gain cir-
cuits.
600Ω
3
600Ω
–
+
–15VDC
Settling time is dependent upon compensation. Under-com-
pensation will result in small phase margin, overshoot or
instability. Over-compensation will result in poor settling
time.
0.001µF
12
8
4
OPA600
22Ω
14
6
13
–15VDC
1
16
Figure 1 shows the recommended compensation to yield the
specified settling time. Improved or optimum settling time
may be achieved by individually compensating each device
in the user’s circuit since individual devices vary slightly
from one to another, as do user’s circuits.
NOTE: (1) 3pF typ. should match stray capacitance bewteen pin 3 and
common.
FIGURE 3. Amplifier Circuit for Increased Slew Rate.
OFFSET ADJUSTMENT
The offset voltage of the OPA600 may be adjusted to zero
by connecting a 5kΩ resistor in series with a 10kΩ linear
potentiometer in series with another 5kΩ resistor between
pins 2 and 15, as shown in Figure 4. It is important that one
end of each of the two resistors be located very close to pins
2 and 15 to isolate and avoid loading these sensitive termi-
nals. The potentiometer should be a small noninductive type
with the wiper connected to the positive supply. The leads
connecting these components should be short, no longer
than 0.5-inch, to avoid stray capacitance and stray signal
pick-up. If the potentiometer must be located away from the
immediate vicinity of the OPA600, extreme care must be
observed with the sensitive leads. Locate the two 5kΩ
resistors very close to pins 2 and 15.
SLEW RATE
Slew rate is primarily an output, large signal parameter. It
has virtually no dependence upon the closed-loop gain or
small signal bandwidth. Slew rate is dependent upon com-
pensation and decreasing the compensation capacitor value
will increase the available slew rate as shown in the perfor-
mance curve.
The OPA600 slew rate may be increased by using an
alternate compensation as shown in Figure 3. The slew rate
will increase between 700 and 800V/µs typical, with 0.01%
settling time increasing to between 175 and 190ns typical,
and 0.1% settling time increasing to between 110 and 120ns
typical.
For alternate doublet compensation refer to Figure 3. For a
closed-loop gain equal to –1, delete C1 and C2 and add a
series RC circuit (R = 22Ω, C = 0.01µF) Between pins 14
and 4. Make no connections to pins 11 and 5. Absolutely
minimize the capacitance to these pins. If a connector is used
for the OPA600, it is recommended that sockets for pins 11
and 5 be removed. For a PC board mount, it is recommended
that the PC board holes be overdrilled for pins 11 and 5 and
adjacent ground plane copper be removed. Effectively, this
compensation places the dominant pole at the input stage,
allowing the output stage to have no compensation and to
slew as fast as possible. Bandwidth and settling time are
impaired only slightly. For closed-loop gains other than –1,
different values of R and C may be required.
Never connect +VCC directly to pin 2 or 15. Do not attempt
to eliminate the 5kΩ resistors because at extreme rotation,
+VCC
10kΩ
5kΩ
5kΩ
3
–
15
2
8
OPA600
16
+
FIGURE 4. Offset Null Circuit.
the potentiometer will directly connect +VCC to pin 2 or 15
and permanent damage will result.
The OPA600 is not short-circuit-protected when the current
boost is activated. The large output current capability of the
OPA600 will cause excessive power dissipation and perma-
nent damage will result even for momentary shorts to ground.
Offset voltage adjustment is optional. The potentiometer and
two resistors are omitted when the offset voltage is consid-
ered sufficiently low for the particular application. For each
microvolt of offset voltage adjusted, the offset voltage tem-
perature sensitivity will change by ±0.004µV/°C.
Output shorts to either supply will destroy the OPA600
whether the current boost is activated or not.
HEAT SINKING AND POWER DISSIPATION
CURRENT BOOST
The OPA600 is intended as a printed circuit board mounted
device, and as such does not require a heat sink. It is
specified for ambient temperature operation from –55°C to
+125°C. However, the power dissipation must be kept within
safe limits. At extreme temperature and under full load
conditions, some form of heat sinking will be necessary. The
use of a heat sink, or other heat dissipating means such as
proximity to the ground plane, will result in cooler operating
temperatures, better temperature performance, and improved
reliability.
External ability to bypass the internal current limiting resis-
tors has been provided in the OPA600. This is referred to as
current boost. Current boost enables the OPA600 to deliver
large currents into heavy loads (±200mA at ±10V). To
bypass the resistors and activate the current boost, connect
pin 7 to –VCC at pin 6 with a short lead to minimize lead
inductance and connect pin 9 to +VCC at pin 12 with a short
lead.
CAUTION—Activating current boost by bypassing the in-
ternal current limiting resistors can permanently damage the
OPA600 under fault conditions. See section on short circuit
protection.
It may be necessary to physically connect the OPA600 to the
printed circuit board ground plane, attach fins, tabs, etc., to
dissipate the generated heat. Because of the wide variety of
possibilities, this task is left to the user. For all applications
it is recommended that the OPA600 be fully inserted into the
printed circuit board and that the pin length be short. Heat
will be dissipated through the ground plane and the AC
performance will be its best.
Not activating current boost is especially useful for initial
breadboarding. The 50Ω (±5%) current limiting resistor in
the collector circuit of each of the output transistors causes
the output transistors to saturate; this limits the power
dissipation in the output stage in case of a fault. Operating
with the current boost not activated may also be desirable
with small-signal outputs (i.e., ±1V) or when the load
current is small.
With a maximum case temperature of +125°C and not
exceeding the maximum junction of +175°C, a maximum
power dissipation of 600mW is allowed in either output
transistor.
Each resistor is internally capacitively-bypassed (0.01µF,
±20%) to allow the amplifier to deliver large pulses of
current, such as to charge diode junctions or circuit capaci-
tance and still respond quickly. The length of time that the
OPA600 can deliver these current pulses is limited by the
RC time constant.
TESTING
For static and low frequency dynamic measurements, the
OPA600 may be tested in conventional operational ampli-
fier test circuits, provided proper ground techniques are
observed, excessive lead lengths are avoided, and care is
maintained to avoid parasitic oscillations. The circuit in
Figure 3 is recommended for low frequency functional
testing, incoming inspection, etc. This circuit is less suscep-
tible to stray capacitance, excessive lead length, parasitic
tuned circuits, changing capacitive loads, etc. It does not
yield optimum settling time. We recommend placing a
resistor (approximately 300Ω) in series with each piece of
test equipment, such as a DVM, to isolate loading effects on
the OPA600.
The internal voltage drops, output voltage available, power
dissipation, and maximum output current can be determined
for the user’s application by knowing the load resistance and
computing:
VOUT = 14 [RLOAD ÷ (50 + RLOAD)]
This applies for RLOAD less than 100Ω and the current boost
not activated. When RLOAD is large, the peak output voltage
is typically ±11V, which is determined by other factors
within the OPA600.
To realize the full performance capabilities of the OPA600,
high frequency techniques must be employed and the test
fixture must not limit the amplifier. Settling time is the most
critical dynamic test and Figure 5 shows a recommended
OPA600 settling time test circuit schematic. Good ground-
ing, truly square drive signals, minimum stray coupling, and
small physical size are important.
SHORT-CIRCUIT PROTECTION
The OPA600 is short-circuit-protected for momentary short
to common (<5s), typical of those encountered when prob-
ing a circuit during experimental breadboarding or trouble-
shooting. This is true only if pins 7 and 9 are open (current
boost not activated.) An internal 50Ω resistor is in series
with the collector of each of the output transistors, which
under fault conditions will cause the output transistors to
saturate and limit the power dissipation in the output stage.
Extended application of an output short can damage the
amplifier due to excessive power dissipation.
The input pulse generator must have a flat topped, fast
settling pulse to measure the true settling time of the ampli-
fier. A circuit that generates a ±5V flat topped pulse is
shown in Figure 6.
(2) HP2835
619Ω(1)
619Ω(1)
(2)
C2
+15VDC
1µF
+
619Ω
+15VDC
+15VDC
619Ω
1µF
1µF
10kΩ
+
5kΩ
5kΩ
+
(2)
C1
2
–
Pulse In
619Ω(2)
51Ω(3)
11
1/2 2N5564
Error Out
14
3
15
12
6
9
7
1/2 2N5564
8
OPA600
1µF
5
16
RL
Output
4
+
+
13
1µF
1
(2)
C3
–15VDC
619Ω
+
1µF
+
Input = ±5V
Output = ±5V
Error Output ±0.5mV (±0.01%)
–15VDC
NOTES: (1) 0.02Ω Matched (2) With C2 = C3 = 3.3pF typical, C1 optimized for circuit layout, and
RL = 50Ω. tS < 100ns. (3) Use 510Ω with generator of Figure 6.
FIGURE 5. Settling Time and Slew Rate Test Circuit.
+15VDC
+15VDC
100µF
+
15Ω
1kΩ
640Ω
1/2W
10µF
+
100µF
IN4148
220Ω
+
2N5943
+15VDC
2N5943
2N5583
6.2V
Pulse Out
220Ω
47Ω
IN4148
640Ω
IN4148
Trigger In
MPS-H81*
2N2369
68Ω
10µF
+
Input = TTL
Output = ±5V
IN4148
220Ω
100µF
+
15Ω
1.8kΩ
100µF
+
* ALT 2N3906
2N2907
–15VDC
+15VDC
–15VDC
FIGURE 6. Flat Top Pulse Generator.
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