OPA735AIDG4 [BB]
0.05uV/ⅹC max, SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIERS; 最大漂移0.05uV / ΣC最大，单电源CMOS运算放大器
| 型号： | OPA735AIDG4 |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | 0.05uV/ⅹC max, SINGLE-SUPPLY CMOS OPERATIONAL AMPLIFIERS |
| 文件： | 总23页 (文件大小：608K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPA734, OPA2734
OPA735, OPA2735
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
0.05µV/°C max, SINGLE-SUPPLY CMOS
OPERATIONAL AMPLIFIERS
Zer∅-Drift Series
FD EATURES
DESCRIPTION
The OPA734 and OPA735 series of CMOS operational
amplifiers use auto-zeroing techniques to simultaneously
provide low offset voltage (5µV max) and near-zero drift
over time and temperature. These miniature, high-preci-
sion, low quiescent current amplifiers offer high input
impedance and rail-to-rail output swing within 50mV of the
rails. Either single or bipolar supplies can be used in the
range of +2.7V to +12V ( 1.35V to 6V). They are
optimized for low-voltage, single-supply operation.
LOW OFFSET VOLTAGE: 5µV (max)
ZERO DRIFT: 0.05µV/°C max
QUIESCENT CURRENT: 750µA (max)
SINGLE-SUPPLY OPERATION
LOW BIAS CURRENT: 200pA (max)
SHUTDOWN
D
D
D
D
D
D
D
MicroSIZE PACKAGES
WIDE SUPPLY RANGE: 2.7V to 12V
The OPA734 family includes a shutdown mode. Under
logic control, the amplifiers can be switched from normal
operation to a standby current that is 9µA (max) and the
output placed in a high-impedance state.
AD PPLICATIONS
TRANSDUCER APPLICATIONS
D
D
D
D
D
TEMPERATURE MEASUREMENTS
ELECTRONIC SCALES
MEDICAL INSTRUMENTATION
BATTERY-POWERED INSTRUMENTS
HANDHELD TEST EQUIPMENT
The single version is available in the MicroSIZE SOT23-5
(SOT23-6 for shutdown version) and the SO-8 packages.
The dual version is available in the MSOP-8 and SO-8
packages (MSOP-10 only for the shutdown version). All
versions are specified for operation from −40°C to +85°C.
VREF = 15V
R3
G = 1 + 2
RG
REF102
10V
R1
1kΩ
C1
1nF
1/2
OPA2735
R3
10kΩ
C4
1nF
C2
10nF
C4
1nF
RG
R3
10kΩ
R2
1k
1/2
Ω
OPA2735
C3
1nF
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
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Copyright 2003-2005, Texas Instruments Incorporated
www.ti.com
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handledwith appropriate precautions. Failure to observe
(1)
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +13.2V
(2)
Signal Input Terminals, Voltage
Current
. . . . . . . . . . . (V−) − 0.5V to (V+) + 0.5V
. . . . . . . . . . . . . . . . . . . . . . . . . . . 10mA
proper handling and installation procedures can cause damage.
(2)
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
(3)
Output Short Circuit
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Operating Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300°C
ESD Rating (Human Body Model), OPA734 . . . . . . . . . . . . . . . . . . . . 1000V
ESD Rating (Human Body Model), OPA735, OPA2734, OPA2735 . . . . 2000V
(1)
Stresses above these ratings may cause permanent damage. Exposure
to absolute maximum conditions for extended periods may degrade
device reliability. These are stress ratings only, and functional operation of
the device at these or any other conditions beyond those specified is not
implied.
(2)
(3)
Input terminals are diode-clamped to the power-supply rails. Input signals
that can swing more than 0.5V beyond the supply rails should be current
limited to 10mA or less.
Short-circuit to ground, one amplifier per package.
(1)
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESIGNATOR
PACKAGE
MARKING
ORDERING
NUMBER
TRANSPORT MEDIA,
QUANTITY
PRODUCT
PACKAGE-LEAD
Shutdown Version
OPA734
SOT23-6
DBV
−40°C to +85°C
NSB
OPA734AIDBVT
OPA734AIDBVR
OPA734AID
Tape and Reel, 250
Tape and Reel, 3000
Rails, 100
″
″
″
D
″
″
OPA734
SO-8
−40°C to +85°C
OPA734A
″
″
″
DGS
″
″
″
BGO
″
OPA734AIDR
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
OPA2734
MSOP-10
−40°C to +85°C
OPA2734AIDGST
OPA2734AIDGSR
″
″
″
Non-Shutdown Version
OPA735
SOT23-5
DBV
−40°C to +85°C
NSC
OPA735AIDBVT
OPA735AIDBVR
OPA735AID
Tape and Reel, 250
Tape and Reel, 3000
Rails, 100
″
″
″
D
″
″
OPA735
SO-8
−40°C to +85°C
OPA735A
″
″
″
D
″
″
OPA735AIDR
Tape and Reel, 2500
Rails, 100
OPA2735
SO-8
−40°C to +85°C
OPA2735A
OPA2735AID
″
″
″
DGK
″
″
″
BGN
″
OPA2735AIDR
OPA2735AIDGKT
OPA2735AIDGKR
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
OPA2735
MSOP-8
−40°C to +85°C
″
″
″
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com.
2
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
ELECTRICAL CHARACTERISTICS: V = 5V (V = +10V)
S
S
Boldface limits apply over the specified temperature range, T = −40°C to +85°C.
A
At T = +25°C, R = 10kΩ connected to V /2, and V
= V /2, unless otherwise noted.
A
L
S
OUT
S
OPA734, OPA2734, OPA735, OPA2735
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
OFFSET VOLTAGE
Input Offset Voltage
vs Temperature
V
1
0.01
0.2
5
µV
µV/°C
µV/V
OS
dV /dT
0.05
1.8
OS
vs Power Supply
Long-Term Stability
Channel Separation, dc
PSRR
V
= 2.7V to 12V, V = 0V
CM
S
Note (1)
0.1
µV/V
INPUT BIAS CURRENT
Input Bias Current
I
V
V
= V /2
100
200
pA
pA
pA
B
CM
S
over Temperature
Input Offset Current
See Typical Characteristics
I
= V /2
200
300
OS
CM
S
NOISE
Input Voltage Noise, f = 0.01Hz to 1Hz
Input Voltage Noise, f = 0.1Hz to 10Hz
Input Voltage Noise Density, f = 1kHz
Input Current Noise Density, f = 1kHz
e
e
e
i
0.8
2.5
135
40
µV
µV
nV/√Hz
fA/√Hz
n
n
n
n
PP
PP
INPUT VOLTAGE RANGE
Common-Mode Voltage Range
Common-Mode Rejection Ratio
V
(V−) − 0.1
115
(V+) − 1.5
V
CM
CMRR
(V−) − 0.1V < V
CM
< (V+) − 1.5V
130
dB
INPUT CAPACITANCE
Differential
2
pF
pF
Common-Mode
10
OPEN-LOOP GAIN
Open-Loop Voltage Gain
A
(V−) + 100mV < V < (V+) − 100mV
O
115
130
dB
OL
FREQUENCY RESPONSE
Gain-Bandwidth Product
Slew Rate
GBW
SR
1.6
1.5
MHz
G = +1
V/µs
OUTPUT
Voltage Output Swing from Rail
Short-Circuit Current
R
= 10kΩ
20
20
50
mV
mA
Ω
L
I
SC
Open-Loop Output Impedance
Capacitive Load Drive
f = 1MHz, I = 0
125
O
C
See Typical Characteristics
LOAD
ENABLE/SHUTDOWN
t
t
1.5
µs
µs
V
OFF
(2)
ON
150
V
(amplifier is shutdown)
V−
(V−) + 0.8
L
V
(amplifier is active)
(V−) + 2
V+
9
V
H
I
(per amplifier)
4
3
µA
µA
QSD
Input Bias Current of Enable Pin
POWER SUPPLY
2.7 to 12
( 1.35 to 6)
Operating Voltage Range
V
V
S
Quiescent Current (per amplifier)
I
I
= 0
0.6
0.75
mA
Q
O
TEMPERATURE RANGE
Specified Range
−40
−40
−65
+85
+150
+150
°C
°C
°C
Operating Range
Storage Range
Thermal Resistance
SOT23-5, SOT23-6
MSOP-8, MSOP-10, SO-8
q
°C/W
°C/W
°C/W
JA
200
150
(1)
(2)
300-hour life test at 150°C demonstrated randomly distributed variation in the range of measurement limits—approximately 1µV.
Device requires one complete auto-zero cycle to return to V
accuracy.
OS
3
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
PIN CONFIGURATIONS
OPA2735
OPA735
OPA735
OUT A
1
2
3
4
8
7
6
5
V+
NC(1)
V+
NC(1)
1
2
3
4
8
7
6
5
Out
1
2
3
5
4
V+
−
IN A
OUT B
−
IN
−
V
−
+IN A
IN B
+IN B
OUT
NC(1)
+IN
−
+IN
IN
−
V
−
V
SOT23−5
SO−8, MSOP−8
SO−8
OPA2734
OPA734
OPA734
OUT A
1
2
3
4
5
10 V+
NC(1)
1
8
Enable
V+
Out
1
2
3
6
5
4
V+
−
IN A
+IN A
9
8
7
6
OUT B
−
IN
2
3
4
7
6
5
−
V
Enable
−
IN B
OUT
NC(1)
+IN
−
+IN
IN
−
V
+IN B
−
V
Enable A
Enable B
SOT23−6(2)
SO−8
MSOP−10
(1)
(2)
NC = No Connection
Pin 1 of the SOT23-6 is determined by orienting the package marking as shown in the diagram.
4
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS
At T = +25°C, V
= 5V (same as +10V).
A
S
OUTPUT VOLTAGE DRIFT PRODUCTION DISTRIBUTION
OUTPUT VOLTAGE PRODUCTION DISTRIBUTION
Absolute Value;
Centered Around Zero
µ
Offset Voltage ( V)
µ
_
Offset Voltage Drift ( V/ C)
OUTPUT VOLTAGE SWING TO RAIL
vs OUTPUT CURRENT
INPUT BIAS CURRENT vs TEMPERATURE
6
4
2
0
1000
0
−
−
−
−
−
−
−
−
−
1000
2000
3000
4000
5000
6000
7000
8000
9000
−
IB
+
IB
_
−
_
+85 C
40 C
_
+25 C
10 Representative Units
−
2
4
6
−
−
−
VCM = V
−
10000
−
−
25
0
5
10
15
20
25
30
35
50
0
25
50
75 85 100
125
_
Output Current (mA)
Temperature ( C)
INPUT BIAS CURRENT vs TEMPERATURE
VCM = VS/2
SUPPLY CURRENT vs TEMPERATURE
1000
800
600
400
200
0
800
600
400
200
0
6V
+
IB
1.35V
−
−
−
−
200
400
600
800
−
IB
10 Representative Units
−
1000
−
−
25
50
0
25
50
75 85 100
125
−
−
25
50
0
25
50
75
100
125
_
Temperature ( C)
_
Temperature ( C)
5
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, V
= 5V (same as +10V).
A
S
OPEN−LOOP GAIN AND PHASE MARGIN
vs FREQUENCY
LARGE−SIGNAL RESPONSE
180
160
140
120
100
80
180
160
140
120
100
80
60
60
40
40
20
20
0
0
−
−
−
−
20
40
20
40
µ
Time (5 s/div)
0.1
1
10
100
1k
10k 100k
1M
10M
Frequency (Hz)
SMALL−SIGNAL RESPONSE
POSITIVE OVERVOLTAGE RECOVERY
Output
Ω
10k
+5V
Ω
10k
OPA735
Input
−
5V
Time (250ns/div)
µ
Time (2.5 s/div)
COMMON−MODE REJECTION RATIO vs FREQUENCY
NEGATIVE OVERVOLTAGE RECOVERY
140
120
100
80
Ω
10k
+5V
Ω
10k
OPA735
−
5V
Input
60
Output
40
20
0
1
10
100
1k
10k
100k
1M
10M
µ
Time (2.5 s/div)
Frequency (Hz)
6
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SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
TYPICAL CHARACTERISTICS (continued)
At T = +25°C, V
= 5V (same as +10V).
A
S
VOLTAGE NOISE vs FREQUENCY
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
+PSRR
1k
100
10
160
140
120
100
80
−
PSRR
60
40
20
0
1
10
100
1k
10k
100k
1
10
100
1k
Frequency (Hz)
10k
100k
1M
Frequency (Hz)
SAMPLING FREQUENCY vs TEMPERATURE
0.1Hz TO 10Hz NOISE
20.0
19.5
19.0
18.5
18.0
17.5
17.0
16.5
16.0
VS = 12V
VS = 2.7V
−
−
25
50
0
25
50
75
100
125
150
1s/div
_
Temperature ( C)
SMALL−SIGNAL OVERSHOOT vs CAPACITIVE LOAD
50
40
30
20
10
0
1
10
100
1000
Capacitance (pF)
7
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The logic input is a CMOS input. Separate logic inputs are
provided for each op amp on the dual version. For
battery-operated applications, this feature can be used to
greatly reduce the average current and extend battery life.
APPLICATIONS INFORMATION
The OPA734 and OPA735 series of op amps are
unity-gain stable and free from unexpected output phase
reversal. They use auto-zeroing techniques to provide low
offset voltage and demonstrate very low drift over time and
temperature.
The enable time is 150µs, which includes one full
auto-zero cycle required by the amplifier to return to VOS
accuracy. Prior to returning to full accuracy, the amplifier
may function properly, but with unspecified offset voltage.
Good layout practice mandates the use of a 0.1µF
capacitor placed closely across the supply pins.
Disable time is 1.5µs. When disabled, the output assumes
a high-impedance state. The disable state allows the
OPA734 to be operated as a gated amplifier, or to have the
output multiplexed onto a common analog output bus.
For lowest offset voltage and precision performance,
circuit layout and mechanical conditions should be
optimized. Avoid temperature gradients that create
thermoelectric (Seebeck) effects in thermocouple
junctions formed from connecting dissimilar conductors.
These thermally-generated potentials can be made to
cancel by assuring that they are equal on both input
terminals:
INPUT VOLTAGE
The input common-mode range extends from (V−) − 0.1V
to (V+) − 1.5V. For normal operation, the inputs must be
limited to this range. The common-mode rejection ratio is
only valid within the specified input common-mode range.
A lower supply voltage results in lower input common-
mode range; therefore, attention to these values must be
given when selecting the input bias voltage. For example,
when operating on a single 3V power supply, common-
mode range is from 0.1V below ground to half the
power-supply voltage.
1. Use low thermoelectric-coefficient connections
(avoid dissimilar metals).
2. Thermally isolate components from power supplies
or other heat sources.
3. Shield op amp and input circuitry from air currents
such as cooling fans.
Normally, input bias current is approximately 100pA;
however, input voltages exceeding the power supplies can
cause excessive current to flow in or out of the input pins.
Momentary voltages greater than the power supply can be
tolerated if the input current is limited to 10mA. This is
easily accomplished with an input resistor, as shown in
Figure 1.
Following these guidelines will reduce the likelihood of
junctions being at different temperatures, which can cause
thermoelectric voltages of 0.1µV/°C or higher, depending
on the materials used.
OPERATING VOLTAGE
Current−limited resistor required
if input voltage exceeds supply
The OPA734 and OPA735 op amp family operates with a
power-supply range of +2.7V to +12V ( 1.35V to 6V).
Supply voltages higher than +13.2V (absolute maximum)
can permanently damage the amplifier. Parameters that
vary over supply voltage or temperature are shown in the
Typical Characteristics section of this data sheet.
≥
rails by 0.5V.
+5V
IOVERLOAD
10mA max
VOUT
OPA735
Ω
50
VIN
OPA734 ENABLE FUNCTION
Figure 1. Input Current Protection
The enable/shutdown digital input is referenced to the V−
supply voltage of the op amp. A logic HIGH enables the op
amp. A valid logic HIGH is defined as > (V−) + 2V. The valid
logic HIGH signal can be up to the positive supply,
independent of the negative power supply voltage. A valid
logic LOW is defined as < 0.8V above the V− supply pin.
If dual or split power supplies are used, be sure that logic
input signals are properly referred to the negative supply
voltage. The Enable pin is connected to internal pull-up
circuitry and will enable the device if this pin is left open
circuit.
INTERNAL OFFSET CORRECTION
The OPA734 and OPA735 series of op amps use an
auto-zero topology with a time-continuous 1.6MHz op amp
in the signal path. This amplifier is zero-corrected every
100µs using a proprietary technique. Upon power-up, the
amplifier requires one full auto-zero cycle of approximately
100µs in addition to the start-up time for the bias circuitry
to achieve specified VOS accuracy. Prior to this time, the
amplifier may function properly but with unspecified offset
voltage.
8
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www.ti.com
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
Low-gain (< 20) operation demands that the auto-zero
circuitry correct for common-mode rejection errors of the
main amplifier. Because these errors can be larger than
0.1% of a full-scale input step change, one calibration
cycle (100µs) can be required to achieve full accuracy.
1nF
VEX
R1
The term clock feedthrough describes the presence of the
clock frequency in the output spectrum. In auto-zeroed op
amps, clock feedthrough may result from the settling of the
internal sampling capacitor, or from the small amount of
charge injection that occurs during the sample-and-hold of
the op amp offset voltage. Feedthrough can be minimized
by keeping the source impedance relatively low (< 1kΩ)
and matching the source impedance on both input
terminals. If the source resistance is high (> 1kΩ)
feedthrough can generally be reduced with a capacitor of
1nF or greater in parallel with the source or feedback
resistors. See the circuit application examples.
+10V
R
R
R
R
VOUT
OPA734
R1
VREF
1nF
Figure 2. Single Op Amp Bridge Amplifier Circuit
LAYOUT GUIDELINES
VREF = 15V
Attention to good layout practices is always recom-
mended. Keep traces short. When possible, use a PCB
ground plane with surface-mount components placed as
close to the device pins as possible. Place a 0.1µF
capacitor closely across the supply pins. These guidelines
should be applied throughout the analog circuit to improve
performance and provide benefits such as reducing the
electromagnetic-interference (EMI) susceptibility.
2
R3
G = 1 + 2
REF102
10V
RG
6
4
(1)
C1
1nF
R1
Ω
1k
R
R
R
R
1/2
OPA2735
R3
Ω
10k
C4
1nF
(1)
C2
C4
1nF
RG
10nF
R3
Ω
10k
R2
1/2
Ω
1k
OPA2735
(1)
C3
1nF
NOTE: (1) Place close to input pins.
Figure 3. Differential Output Bridge Amplifier
9
ꢂꢀꢉꢠ ꢡꢢ ꢣ ꢂꢀꢉ ꢤꢠꢡ ꢢ
ꢂꢀꢉ ꢠꢡ ꢥ ꢣ ꢂꢀꢉ ꢤꢠꢡ ꢥ
www.ti.com
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
C2 = 1nF
Ω
R4 = 10k
+5V
R1
R2
RF
VIN
Ω
300
ADS8342
ADS8325
ADS1100
OPA735
CF
500pF
0.1V to 4.9V
VREF
C1
1nF
R3
10k
Optional filter for use
with SAR−type
converters
Ω
operating at
sampling rates of
50kHz and below.
V
IN
V
REF
R
1
R
2
10V
5V
0V to 10V
0V to 5V
5V
5V
5V
5V
42.2kΩ
20.8kΩ
20.8kΩ
10.5kΩ
14.7kΩ
19.6kΩ
5.11kΩ
10kΩ
Figure 4. Driving ADC
R4
Ω
10k
C4
µ
1 F
C3
µ
1 F
R9
Ω
10k
+5V
1/2
R5
1.5M
Ω
R2
+5V
Ω
1k
R7
V
Ω
10k
OUT
OPA2703
OPA735
C2
100nF
−
5V
−
5V
R6
Ω
11k
REF1112
TPS434 Thermopile
R3
+5V
Ω
6.8k
R8
Ω
10k
1/2
R1
OPA2703
Ω
22k
−
5V
−
5V
NOTE: The TPS434, by Perkin Elmer Optoelectronics, is a thermopile detector
with integrated thermistor for cold−junction reference.
Figure 5. Thermopile Non-Contact Surface Temperature Measurement
10
ꢂ ꢀꢉꢠ ꢡ ꢢ ꢣ ꢂ ꢀꢉ ꢤꢠꢡ ꢢ
ꢂ ꢀꢉꢠ ꢡ ꢥꢣ ꢂ ꢀꢉ ꢤꢠꢡ ꢥ
www.ti.com
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
+5V
R1
536k
R1
536k
VOUT
OPA735
Ω
Ω
C3
10nF
−
5V
R3
Ω
268k
R = R1 = R2 = 2R3
; where
1
=
fn
C = C1 = C2 = C3/2
C1
5nF
C2
5nF
π
2
RC
(fn = 60Hz for values shown)
Figure 6. Twin-T Notch Filter
C2
68.0nF
R2
R3
Ω
2.64k
Ω
20.8k
R1
10.6k
1/2
OPA2735
Ω
1/2
VIN
VOUT
OPA2735
C3
C1
15.0nF
6.80nF
Cutoff frequency = 2kHz for values shown.
NOTE: FilterPro is a low-pass filter design program available for download at no cost from TI’s web site (www.ti.com).
The program can be used to easily determine component values for other cutoff frequencies or filter types.
Figure 7. High DC Accuracy, 3-Pole Low-Pass Filter
C1
1nF
R2
10 k
Ω
R1 = 10 k
Ω
R3
1/2
VOUT
Ω
10 k
OPA2735
VIN
C1
1nF
NOTE: Dynamic range of the circuit is not reduced by
the diode voltage drop since the diode is not in the signal path.
Application Bulletin Precision Absolute Value Circuits (SBOA068)
is available at www.ti.com and provides further information about rectifier circuits.
D1
1/2
OPA2735
Figure 8. Precision Full-Wave Rectifier with Full Dynamic Range
11
ꢂꢀꢉꢠ ꢡꢢ ꢣ ꢂꢀꢉ ꢤꢠꢡ ꢢ
ꢂꢀꢉ ꢠꢡ ꢥ ꢣ ꢂꢀꢉ ꢤꢠꢡ ꢥ
www.ti.com
SBOS282B − DECEMBER 2003 − REVISED FEBRUARY 2005
1nF
Ω
Ω
1k
49k
Enable A
G = 50
VIN A
OPA734
VOUT
Enable B
G = 1
VIN B
OPA734
Enable inputs are CMOS logic compatible.
Figure 9. High-Precision 2-Input MUX for Programmable Gain
+VS
2.7V to 12V
Load
VOUT = 1V/A
(referred to ground)
OPA735
Shunt
RS
IL
Ω
10m
R1
R2
Ω
100
Ω
10k
C1
1nF
Figure 10. Low-Side Power-Supply Current Sensing
12
PACKAGE OPTION ADDENDUM
www.ti.com
8-Feb-2007
PACKAGING INFORMATION
Orderable Device
OPA2734AIDGSR
OPA2734AIDGSRG4
OPA2734AIDGST
OPA2734AIDGSTG4
OPA2735AID
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
MSOP
DGS
10
10
10
10
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP
MSOP
MSOP
SOIC
DGS
DGS
DGS
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA2735AIDG4
OPA2735AIDGKR
OPA2735AIDGKRG4
OPA2735AIDGKT
OPA2735AIDGKTG4
OPA2735AIDR
SOIC
D
8
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
MSOP
MSOP
MSOP
MSOP
SOIC
DGK
DGK
DGK
DGK
D
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA2735AIDRG4
OPA734AID
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOIC
D
8
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA734AIDBVR
OPA734AIDBVRG4
OPA734AIDBVT
OPA734AIDBVTG4
OPA734AIDG4
SOT-23
SOT-23
SOT-23
SOT-23
SOIC
DBV
DBV
DBV
DBV
D
6
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
6
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
6
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
6
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
8
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA734AIDR
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA734AIDRG4
OPA735AID
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOIC
D
8
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA735AIDBVR
OPA735AIDBVRG4
OPA735AIDBVT
OPA735AIDBVTG4
SOT-23
SOT-23
SOT-23
SOT-23
DBV
DBV
DBV
DBV
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
5
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
8-Feb-2007
Orderable Device
OPA735AIDG4
OPA735AIDR
Status (1)
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
100 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
SOIC
SOIC
D
D
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
OPA735AIDRG4
2500 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
Device
Package Pins
Site
MLA
MLA
MLA
MLA
MLA
Reel
Diameter Width
(mm)
Reel
A0 (mm)
5.3
B0 (mm)
3.4
K0 (mm)
1.4
P1
W
Pin1
(mm) (mm) Quadrant
(mm)
OPA2734AIDGST
OPA734AIDBVR
OPA734AIDBVT
OPA735AIDBVR
OPA735AIDBVT
DGS
DBV
DBV
DBV
DBV
10
6
330
12
8
8
8
8
8
12 PKGORN
T1TR-MS
P
180
180
180
180
8
8
8
8
6.83
7.42
1.88
12 PKGORN
T3TR-MS
P
6
6.83
7.42
1.88
12 PKGORN
T3TR-MS
P
5
6.83
7.42
1.88
12 PKGORN
T3TR-MS
P
5
6.83
7.42
1.88
12 PKGORN
T3TR-MS
P
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
OPA2734AIDGST
OPA734AIDBVR
OPA734AIDBVT
OPA735AIDBVR
OPA735AIDBVT
DGS
DBV
DBV
DBV
DBV
10
6
MLA
MLA
MLA
MLA
MLA
346.0
0.0
346.0
0.0
61.0
0.0
6
190.0
190.0
190.0
212.7
212.7
212.7
31.75
31.75
31.75
5
5
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-May-2007
Pack Materials-Page 3
IMPORTANT NOTICE
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Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
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Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
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