SHC615AP [BB]
Wide-Bandwidth, DC RESTORATION CIRCUIT; 宽带宽，直流恢复电路
| 型号： | SHC615AP |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | Wide-Bandwidth, DC RESTORATION CIRCUIT |
| 文件： | 总19页 (文件大小：301K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SHC615
®
SHC615
SHC615
Wide-Bandwidth,
DC RESTORATION CIRCUIT
FEATURES
● PROPAGATION DELAY: 2.2ns
APPLICATIONS
● BROADCAST/HDTV EQUIPMENT
● BANDWIDTH: OTA: 750MHz
● TELECOMMUNICATIONS EQUIPMENT
● HIGH-SPEED DATA ACQUISITION
Comparator: 280MHz
● LOW INPUT BIAS CURRENT: –0.3µA
● CAD MONITORS/CCD IMAGE
● SAMPLE/HOLD
PROCESSING
SWITCHING TRANSIENTS: +1/–7mV
● NANO SECOND PULSE INTEGRATOR/
● SAMPLE/HOLD
PEAK DETECTORS
FEEDTHROUGH REJECTION: 100dB
● PULSE CODE MODULATOR/
● CHARGE INJECTION: 40fC
DEMODULATOR
● HOLD COMMAND DELAY TIME: 3.8ns
● TTL/CMOS HOLD CONTROL
● COMPLETE VIDEO DC LEVEL
RESTORATION
● SAMPLE/HOLD AMPLIFIER
DESCRIPTION
The SHC615 is a complete subsystem for very fast
and precise DC restoration, offset clamping, and low
frequency hum suppression of wideband amplifiers or
buffers. Designed to stabilize the performance of
video signals, it can also be used as a sample/hold
amplifier, high-speed integrator, or peak detector for
nanosecond pulses. A wideband Operational
Transconductance Amplifier (OTA) with a high-im-
pedance cascode current source output and fast sam-
pling comparator set a new standard for high-speed
applications. Both can be used as stand-alone circuits
or combined to form a more complex signal process-
ing stage. The self-biased, bipolar OTA can be viewed
as an ideal voltage-controlled current source and is
optimized for low input bias current. The sampling
comparator has two identical high-impedance inputs
and a current source output optimized for low output
bias current and offset voltage; it can be controlled by
a TTL-compatible switching stage within a few
nanoseconds. The transconductance of the OTA and
sampling comparator can be adjusted by an external
resistor, allowing bandwidth, quiescent current, and
gain tradeoffs to be optimized.
The SHC615 is available in SO-14 surface mount and
14-pin plastic DIPs, and is specified over the ex-
tended temperature range of –40°C to +85°C.
CHOLD
Ground
Base
3
9
4
2
Emitter
7
Switching
Stage
Hold Control
OTA
12
Sampling
Collector (IOUT
)
Comparator (SC)
10
11
S/H
In+
1
∞
Biasing
5
IQ Adjust
SOTA
S/H
In–
SHC615
13
+VCC –VCC
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
FAXLine: (800) 548-6133 (US/Canada Only)
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
©1994 Burr-Brown Corporation
PDS-1214C
Printed in the U.S.A. May, 1995
DC SPECIFICATIONS
At VCC = ±5V, RLOAD = 100Ω, RQ = 300Ω, RIN = 150Ω and TA = +25°C, unless otherwise specified.
SHC615AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
OFFSET VOLTAGE, VE at VB = 0
Initial
vs Temperature
8
40
55
±40
mV
µV/°C
dB
vs Supply (tracking)
VCC = ±4.5V to ±5.5V
50
B-INPUT BIAS CURRENT
Initial
vs Temperature
–0.3
1
±0.9
µA
nA/°C
C-OUTPUT BIAS CURRENT, IC at VB = 0
Initial
–200
–77
4.4
+100
µA
B-INPUT IMPEDANCE
MΩ
INPUT NOISE
Voltage Noise Density, B-to-E
Voltage Noise Density, B-to-C
f
f
OUT = 100kHz to 100MHz
OUT = 100kHz to 100MHz
2.2
4.5
nV/√Hz
nV/√Hz
INPUT VOLTAGE RANGE
±3.4
V
OUTPUT
Output Voltage Compliance
C-Current Output
E-Current Output
C-Output Impedance
E-Output Impedance
Open-Loop Gain
±3.2
±20
±20
0.5
12
V
±18
±18
mA
mA
MΩ
Ω
96
dB
TRANSCONDUCTANCE
Small Signal, <200mV
70
mA/V
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN
assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are
subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN
does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
®
2
SHC615
DC SPECIFICATIONS (CONT)
At VCC = ±5V, RLOAD = 1kΩ, RQ = 300Ω, and TA = +25°C, unless otherwise specified.
SHC615AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
COMPARATOR
INPUT BIAS CURRENT
Initial
1.0
±5
µA
vs Temperature
–2.3
nA/°C
C-OUTPUT BIAS CURRENT
Initial
vs Temperature
±10
±13
±50
µA
nA/°C
INPUT IMPEDANCE
Input Impedance
0.2
5
MΩ
INPUT NOISE
Voltage Noise Density
f
OUT = 100kHz to 100MHz
nV/√Hz
INPUT VOLTAGE RANGE
Input Voltage Range
Common-Mode Input Range
±3.0
±3.2
V
V
OUTPUT
Output Voltage Compliance
C-Current Output
C-Output Impedance
Open-Loop Gain
±3.5
±3.2
620 || 2
83
V
mA
kΩ || pF
dB
±2.5
TRANSCONDUCTANCE
Transconductance
22
mA/V
HOLD CONTROL
Logic 1 Voltage
Logic 0 Voltage
Logic 1 Current
Logic 0 Current
+2
0
+VCC +0.6
0.8
V
V
µA
µA
V Hold Control = 5.0V
V Hold Control = 0.8V
1
0.05
TRANSFER CHARACTERISTICS
Charge Injection
Feedthrough Rejection
Track-To-Hold
Hold Mode
40
–100
fC
dB
COMPLETE SHC615
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
Quiescent Current Range
±5
V
V
mA
mA
±4.5
±12
±5.5
±18
R
Q = 300Ω
±15
±3 to ±36
Programmable (Useful Range)
TEMPERATURE RANGE
Operating
Storage
–40
–40
+85
+125
°C
°C
®
3
SHC615
AC SPECIFICATIONS
At VCC = ±5V, RLOAD = 100Ω, RSOURCE = 50Ω, RQ = 300Ω, and TA = +25°C, unless otherwise specified.
SHC615AP, AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
FREQUENCY DOMAIN
OTA
LARGE-SIGNAL BANDWIDTH
(–3dB), (B-to-E)
VOUT = 5.0Vp-p
430
540
620
MHz
MHz
MHz
VOUT = 2.8Vp-p
OUT = 1.4Vp-p
V
SMALL-SIGNAL BANDWIDTH B-TO-E
DIFFERENTIAL GAIN (B-TO-E)
VOUT = 0.2Vp-p
520
MHz
f = 4.43MHz, VOUT = 0.7Vp-p,
R
L = 150Ω
1.8
0.1
%
%
RL = 500Ω
DIFFERENTIAL PHASE
f = 4.43MHz, VOUT = 0.7Vp-p,
L = 150Ω
L = 500Ω
R
R
0.07
0.01
°
°
(B-to-E)
HARMONIC DISTORTION (B-TO-E)
Second Harmonic
Third Harmonic
f = 30MHz, VOUT = 1.4Vp-p
–50
–46
dBc
dBc
LARGE SIGNAL BANDWIDTH
(–3dB), (B-to-C)
VOUT = 5.0Vp-p
VOUT = 2.8Vp-p
VOUT = 1.4Vp-p
250
580
750
MHz
MHz
MHz
SMALL SIGNAL BANDWIDTH
B-to-C
VOUT = 0.2Vp-p
680
MHz
COMPARATOR
Sample Mode
IOUT = 4mAp-p
BANDWIDTH
240
270
280
MHz
MHz
MHz
(–3dB)
I
I
OUT = 2mAp-p
OUT = 1mAp-p
TIME DOMAIN
OTA
RISE TIME
2Vp-p Step, 10% to 90%
B-to-E
B-to-C
1.1
1.2
ns
ns
SLEW RATE
2Vp-p,B-to-E
B-to-C
5Vp-p,B-to-E
B-to-C
1800
1700
3300
3000
V/µs
V/µs
V/µs
V/µs
COMPARATOR
RISE TIME
10% to 90%, RL = 50Ω, IOUT = ±2mA
(Sample Mode)
CLOAD = 1pF
2.5
ns
SLEW RATE
10% to 90%, RL = 50Ω, IOUT = ±2mA
(Sample Mode)
CLOAD = 1pF
0.95
mA/ns
DYNAMIC CHARACTERISTICS
Propagation Delay Time
Propagation Delay Time
Delay Time
tPDH, VOD = 200mV
2.2
2.15
3.8
ns
ns
ns
ns
t
PDL, VOD = 200mV
Sample-to-Hold
Hold-to-Sample
3.0
®
4
SHC615
PIN CONFIGURATION
BLOCK DIAGRAM
Top View
DIP, SO-14
CHOLD
4
Ground
9
Base
3
2
Emitter
IQ Adjust
Emitter, E
Base, B
CHOLD
1
2
3
4
5
6
7
14 NC
•
7
Hold
Control
Switching
Stage
13 +VCC
12 IOUT, Collector, C
11 S/H In–
OTA
12
1
Collector
Sampling
Comparator (SC)
SHC615
(IOUT
)
10
11
S/H
In+
–VCC
10 S/H In+
∞
Biasing
IQ Adjust
SOTA
S/H
In–
NC
9
8
Ground
NC
SHC615
Hold Control
13
5
+VCC –VCC
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
Any integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with ap-
propriate precautions. Failure to observe proper handling and
installation procedures can cause damage.
Power Supply Voltage (±VCC) .............................................................. ±6V
Input Voltage(1) ........................................................................ ±VCC ±0.7V
Operating Temperature .................................................... –40°C to +85°C
Storage Temperature...................................................... –40°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s) ............................................... +300°C
Hold Control .............................................................. –0.5V to +VCC +0.7V
NOTE: (1) Inputs are internally diode-clamped to ±VCC
.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet published speci-
fications.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING TEMPERATURE
PRODUCT
PACKAGE
NUMBER(1)
RANGE
SHC615AP
SHC615AU SO 14-Lead Surface-Mount
Plastic 14-Pin DIP
010
235
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
®
5
SHC615
TYPICAL PERFORMANCE CURVES
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
TOTAL QUIESCENT CURRENT vs TEMPERATURE
SHC615 TOTAL QUIESCENT CURRENT vs RQ
100
1.50
1.40
1.30
1.20
1.10
1.00
0.90
0.80
0.70
0.60
0.50
10
1
–25
0
25
50
75
100
10
100
1000
10000
Temperature (C°)
RQ (Ω)
OPERATIONAL TRANSCONDUCTANCE AMPLIFIER
OTA B-INPUT BIAS CURRENT vs TEMPERATURE
OTA-B INPUT OFFSET VOLTAGE vs TEMPERATURE
0.0
–0.1
–0.2
–0.3
–0.4
–0.5
–0.6
–0.7
–0.8
–0.9
–1.0
12
10
8
6
4
2
RE = 100Ω
0
–25
0
25
50
75
100
–25
0
25
50
75
100
Temperature (C°)
Temperature (C°)
OTA-B INPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
OTA-E OUTPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
18
16
14
12
10
8
45
40
35
30
25
20
15
10
5
6
4
2
0
0
4
9
14
19
24
29
34
39
5
10
15
20
25
30
35
40
Total Quiescent Current, IQ (mA)
Total Quiescent Current, IQ (mA)
®
6
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-C OUTPUT RESISTANCE vs
TOTAL QUIESCENT CURRENT
OTA-C OUTPUT BIAS CURRENT vs TEMPERATURE
1.8
1.6
1.4
1.2
1
–60
–65
–70
–75
–80
–85
–90
–95
–100
0.8
0.6
0.4
0.2
0
–40
–20
0
20
40
60
80
100
5
10
15
20
25
30
35
40
Total Quiescent Current, IQ (mA)
Temperature (°C)
OTA TRANSFER CHARACTERISTICS
vs INPUT VOLTAGE
OTA TRANSFER CHARACTERISTIC vs INPUT VOLTAGE
IQ = ±25mA
25
20
25
20
IQ = ±25mA
IQ = ±14mA
15
15
IQ = ±14mA
VOUT
100Ω
RC
150Ω
10
10
OTA
IQ = ±5mA
VIN
5
5
IQ = ±5mA
100Ω
RE
0
0
–5
–5
VOUT
–10
–15
–20
–25
–10
–15
–20
–25
150Ω
OTA
100Ω
RC
VIN
–3.5 –3 –2.5 –2 –1.5 –1 –0.5
0
0.5
1
1.5
2
2.5
3
3.5
–0.2 –0.15 –0.1 –0.05
0
0.05
0.1
0.15
0.2
OTA-B Input Voltage (V)
OTA-B Input Voltage (V)
OTA TRANSCONDUCTANCE vs
TOTAL QUIESCENT CURRENT
OTA-TRANSCONDUCTANCE vs FREQUENCY
100
90
80
70
60
50
40
30
20
10
0
100
80
60
40
20
0
IQ = ±25mA
IQ = ±5mA
IQ = ±14mA
Small Signal
(<200mV)
Large Signal
(>200mV)
0
±5
±10
±15
±20
±25
±30
1.0
10k
100k
1M
10M
100M
1G
Total Quiescent Current, IQ (mA)
Frequency (Hz)
®
7
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-E FREQUENCY RESPONSE
OTA-E VOLTAGE NOISE SPECTRAL DENSITY
20
10
45
40
35
30
25
20
15
10
5
5Vp-p
2.8Vp-p
1.4Vp-p
0.6Vp-p
0
0.2Vp-p
12
–10
–20
–30
150Ω
3
VIN
OTA
2.2nV/√Hz
50Ω
2
VOUT
0
300k
1M
10M
Frequency (Hz)
100M
1G
100
1G
100
1k
10k
100k
Frequency (Hz)
OTA-E SMALL SIGNAL PULSE RESPONSE
OTA-E LARGE SIGNAL PULSE RESPONSE
150
100
50
3
2
1
0
0
–50
–100
–150
–1
–2
–3
RIN = 150Ω, RL = 100Ω, VIN = 4Vp-p,
RIN = 150Ω, RL = 100Ω, VIN = 200mVp-p,
tRISE = tFALL = 1.5ns (Generator)
tRISE = tFALL = 1.5ns (Generator)
0
20
40
Time (ns)
60
80
100
0
20
40
60
80
Time (ns)
OTA-C FREQUENCY RESPONSE
5Vp-p
OTA-C VOLTAGE NOISE SPECTRAL DENSITY
20
10
90
80
70
60
50
40
30
20
10
0
2.8Vp-p
1.4Vp-p
0
0.6Vp-p
0.2Vp-p
–10
–20
–30
–40
VOUT
12
2
100Ω
150Ω
3
VIN
OTA
50Ω
4.5nV/√Hz
100Ω
100
1k
10k
100k
300k
1M
10M
Frequency (Hz)
100M
Frequency (Hz)
®
8
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
OTA-C SMALL SIGNAL PULSE RESPONSE
OTA-C LARGE SIGNAL PULSE RESPONSE
3
2
150
100
50
1
0
0
–1
–2
–3
–50
–100
–150
RIN = 150Ω, RE = 100Ω, R C = 100Ω,
VIN = 4Vp-p, tRISE = tFALL = 1.5ns (Generator)
RIN = 150Ω, RE = 100Ω, R C = 100Ω,
VIN = 200mVp-p, tRISE = tFALL = 1.5ns (Generator)
0
20
40
60
80
100
0
20
40
60
80
100
Time (ns)
Time (ns)
OTA-C HARMONIC DISTORTION vs FREQUENCY
OTA-E HARMONIC DISTORTION vs FREQUENCY
RE = 100Ω
–45
–46
–47
–48
–49
–50
–51
–52
–53
0
–5
VOUT = 1.4Vp
RE = RC = 100Ω
–10
–15
–20
–25
–30
–35
–40
–45
–50
2f
2f
3f
3f
1M
10M
Frequency (Hz)
100M
1M
10M
100M
Frequency (Hz)
SAMPLING COMPARATOR
OUTPUT BIAS CURRENT vs TEMPERATURE
INPUT BIAS CURRENT vs TEMPERATURE
S/H In+
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
20
15
10
5
S/H In–
0
0
5
–10
–40
–20
0
20
40
60
80
100
100
–40
–20
0
20
40
60
80
Temperature (°C)
Temperature (C°)
®
9
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
TRANSCONDUCTANCE vs
TOTAL QUIESCENT CURRENT
INPUT RESISTANCE vs TOTAL QUIESCENT CURRENT
0.7
40
0.6
30
0.5
0.4
20
0.3
0.2
10
0.1
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
Total Quiescent Current, IQ (mA)
Total Quiescent Current, IQ (mA)
TRANSFER CHARACTERISTICS
IQ = ±25mA
TRANSCONDUCTANCE vs INPUT VOLTAGE
IQ = ±25mA
6
4
50
40
30
20
10
0
IQ = ±14mA
2
IQ = ±14mA
0
IQ = ±5mA
–2
–4
–6
IQ = ±5mA
–10
–0.2 –0.15 –0.1 –0.05
0
0.05
0.1
0.15
0.2
–0.2 –0.15 –0.1 –0.05
0
0.05
0.1
0.15
0.2
Input Voltage (V)
Input Voltage (V)
COMMON-MODE REJECTION vs FREQUENCY
PROPAGATION DELAY vs TOTAL QUIESCENT CURRENT
0
–20
4
3.5
3
–40
Pos
2.5
2
–60
–80
1.5
1
Neg
–100
300k
1M
10M
100M
1G
3
8
13
18
21
28
33
38
Frequency (Hz)
Total Quiescent Current, IQ (mA)
®
10
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
PROPAGATION DELAY vs OVERDRIVE
PROPAGATION DELAY TIME vs TEMPERATURE
3
2.5
2
3
2.8
2.6
2.4
2.2
2
Pos
Neg
Pos
Neg
1.5
1
100Ω
100Ω
10
11
VOD
VOD
GND
4
SC
VOD
0.5
0
1.8
1.6
0
0
0
200
400
600
800
100
1200
–40
–20
0
20
40
60
80
100
120
∆ Input Voltage (mV)
Temperature (°C)
PROPAGATION DELAY vs LOAD CAPACITANCE
Pos
PROPAGATION DELAY vs SLEW RATE
Pos
4
3.5
3
40
35
30
25
20
15
10
5
VIN = 1.2Vpp
Neg
Neg
2.5
2
10
4
SC
11
+0.6V
–0.6V
CLOAD
1.5
1
VREF
VOD = 1.2Vp-p
0
500 250 160 120 96
80
68
60
53
48
100 200 300 400 500 600 700 800 900 1000
Capacitive Load, CL (pF)
(0) (2) (4) (6) (8) (10) (12) (14) (16) (18) (20)
Slew Rate (V/µs)
(Rise Time (ns))
COMPARATOR RESPONSE TO A
2ns ANALOG INPUT PULSE
COMPARATOR RESPONSE TO A
10ns ANALOG INPUT PULSE
150
100
50
150
100
50
IOUT = 4mAp-p
RL = 50Ω
IOUT = 4mAp-p
RL = 50Ω
0
0
–50
–100
–150
–50
–100
–150
20
40
60
80
100
0
20
40
60
80
100
Time (ns)
Time (ns)
®
11
SHC615
TYPICAL PERFORMANCE CURVES (CONT)
At RQ = 300Ω, TA = +25°C, VCC = ±5V, unless otherwise noted.
SWITCHING TRANSIENTS
5
SWITCHING TRANSIENTS TEST CIRCUITS
CD74HCT
100Ω
100Ω
150Ω
TTL
Off-On
On-Off
0
–5
Comparator
200Ω
200Ω
50Ω
4
10
11
SC
–10
–15
50Ω
7
TTL
0
20
40
60
Time (ns)
80
100
FEEDTHROUGH REJECTION vs FREQUENCY
(Off-Isolation)
BANDWIDTH vs OUTPUT CURRENT SWING
0
–20
0
–10
–20
–30
–40
±2mA
±1mA
–40
±0.5mA
–60
100Ω
7
VIN
10
11
–80
4
VOUT
50Ω
SC
50Ω
–100
100Ω
–120
100k
1M
10M
100M
1G
300k
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
HOLD COMMAND DELAY TIME
SLEW RATE vs TOTAL QUIESCENT CURRENT
4
2
0
3.5
3
2.5
2
100
IOUT = 2mA
Pos
Neg
1.5
1
0
IOUT = –2mA
0.5
0
–100
0
5
10
15
20
25
30
35
40
0
10
20
30
40
50
Time (ns)
Total Quiescent Current, IQ (mA)
®
12
SHC615
output (emitter), and the high-impedance current output
(collector).
DISCUSSION OF
PERFORMANCE
The SHC615, which contains a wideband Operational
Transconductance Amplifier and a fast sampling compara-
tor, represents a complete subsystem for very fast and
precise DC restoration, offset clamping and correction to
GND or to an adjustable reference voltage, and low fre-
quency hum suppression of wideband operational or buffer
amplifiers.
The OTA consists of a complementary buffer amplifier and
a subsequent complementary current mirror. The buffer
amplifier features a Darlington output stage and the current
mirror has a cascoded output. The addition of this cascode
circuitry increases the current source output resistance to
1MΩ and the open-loop gain to typically 96dB. Both fea-
tures improve the OTAs linearity and drive capabilities. Any
bipolar input voltage at the high impedance base has the
same polarity and signal level at the low impedance buffer
or emitter output. For the open-loop diagrams the emitter is
connected to GND and then the collector current is deter-
mined by the product voltage between base and emitter
times the transconductance. In application circuits (Figure
2b.), a resistor RE between emitter and GND is used to set
the OTA transfer characteristics. The following formulas
describe the most important relationships. rE is the output
impedance of the buffer amplifier (emitter) or the reciprocal
of the OTA transconductance. Above ±5mA, collector cur-
rent, IC, will be slightly less than indicated by the formula.
Although the IC was designed to improve or stabilize the
performance of complex, wideband video signals, it can also
be used as a sample and hold amplifier, high-speed integra-
tor, peak detector for nanosecond pulses, or demodulator or
modulator for pulse code transmission systems. A wideband
Operational Transconductance Amplifier (OTA) with a high-
impedance cascode current source output and a fast and
precise sampling comparator set a new standard for high-
speed sampling applications.
Both can be used as stand-alone circuits or combined to
create more complex signal processing stages like sample
and hold amplifiers. The SHC615 simplifies the design of
input amplifiers with high hum suppression, clamping or
DC-restoration stages in professional broadcast equipment,
high-resolution CAD monitors and information terminals,
signal processing stages for the energy and peak value of
small and fast nanoseconds pulses, and eases the design of
high-speed data acquisition systems behind a CCD sensor or
in front of an analog-to-digital converter.
VIN
VIN
IC
IC
=
RE
=
– rE
rE + RE
The RE resistor may be bypassed by a relatively large
capacitor to maintain high AC gain. The parallel combina-
tion of RE and this large capacitor form a high pass filter
enhancing the high frequency gain. Other cases may require
a RC compensation network parallel to RE to optimize the
high-frequency response. The full power bandwidth mea-
sured at the emitter achieves 620MHz. The frequency re-
sponse of the collector is directly related to the resistor’s
value between collector and GND; it decreases with increas-
ing resistor values, because it forms a low-pass network with
the OTA C-output capacitance.
An external resistor, RQ, allows the user to set the quiescent
current. RQ is connected from Pin 1 (IQ adjust) to –VCC. It
determines the operating currents of both the OTA and
comparator sections and controls the bandwidth and AC
behavior as well as the transconductance of both sections.
Besides the quiescent current setting feature, the Propor-
tional-to-Absolute-Temperature (PTAT) supply increases the
quiescent current vs temperature and keeps it constant over
a wide range of input voltages. This variation holds the
transconductance gm of the OTA and comparator relatively
constant vs temperature. The circuit parameters listed in the
specification table are measured with RQ set to 300Ω, giving
a nominal quiescent current at ±15mA. The circuit can be
totally switched-off with a current flowing into Pin 1.
Figure 1 shows a simplified block and circuit diagram of
the SHC615 OTA. Both the emitter and the collector
outputs offer a drive capability of ±20mA for driving low
impedance lines or inputs. Connecting the collector to the
emitter in a direct-feedback buffer configuration increases
the drive capability to ±40mA. The emitter output is not
current-limited or protected. Momentary shorts to GND
should be avoided, but are unlikely to cause permanent
damage.
While the OTA’s function and labeling looks similar to
that of transistors, it offers essential distinctive differences
and improvements: 1) The collector current flows out of
the C terminal for a positive B-to-E input voltage and into
it for negative voltages; 2) A common emitter amplifier
operates in non-inverting mode while the common base
operates in inverting mode; 3) The OTA is far more linear
than a bipolar transistor; 4) The transconductance can be
adjusted with an external resistor; 5) Due to the PTAT
biasing characteristic the quiescent current increases as
shown in the typical performance curve vs temperature
and keeps the AC performance constant; 6) The OTA is
self-biased and bipolar; and, 7) The output current is zero
for zero differential input voltages. AC inputs centered at
zero produce an output current centered at zero.
OPERATIONAL
TRANSCONDUCTANCE
AMPLIFIER (OTA)
SECTION AND OVERVIEW
The symbol for the OTA section is similar to that of a
bipolar transistor, and the self-based OTA can be viewed as
a quasi-ideal transistor or as a voltage-controlled current
source. Application circuits for the OTA look and operate
much like transistor circuits—the bipolar transistor, also, is
a voltage-controlled current source. Like a transistor, it has
three terminals: a high-impedance input (base) optimized for
a low input bias current of 0.3µA, a low-impedance input/
®
13
SHC615
+VCC
(13)
+VCC
(13)
Biasing
Biasing
B
(3)
E
(2)
C
(12)
E
(2)
C
(12)
+1
B
(3)
Biasing
Biasing
+VCC
(5)
–VCC
(5)
(a)
(b)
FIGURE 1. a) Simplified Block; and, b) Circuit Diagram of the OTA Section.
V+
RB
RL
12
C
VO
VO
100Ω
Non-InvertingGain
VOS
3
B
VI
OTA
≈
0
RL
Inverting Gain
VOS several volts
VI
E
2
≈
RE
RB
RE
V–
(a) Common Emitter Amplifier
Transconductance varies over temperature.
(b) Common-E Amplifier
Transconductance remains constant over temperature.
FIGURE 2. a) Common Emitter Amplifier Using a Discrete Transistor; b) Common-E Amplifier Using the OTA Portion of the
SHC615.
BASIC APPLICATIONS CIRCUITS
a Common-E amplifier which is equivalent to a common
emitter transistor amplifier. Input and output can be ground
referenced without any biasing. Due to the sense of the
output current, the amplifier is non-inverting.
Most application circuits for the OTA section consist of a
few basic types which are best understood by analogy to
discrete transistor circuits. Just as the transistor has three
basic operating modes—common emitter, common base,
and common collector—the OTA has three equivalent oper-
ating modes common-E, common-B, and common-C (See
Figures 2, 3 and 4). Figure 2 shows the OTA connected as
Figure 4 shows the common-B amplifier. This configuration
produces an inverting gain, and the input is low-impedance.
When a high impedance input is needed, it can be created by
inserting a buffer amplifier like BUF600 in series.
®
14
SHC615
V+
RL
+
RL
RE
12
C
V+
G = –
≈ –
1
gm
RL
RE
100Ω
G
VOS
1
≈
≈
3 B
VI
OTA
0
VO
Non-Inverting Gain
E
2
VI
VO
VOS several volts
≈
VO
Inverting Gain
OS ≈ 0
12
RE
VO
C
100Ω
G
VOS
1
≈
B
3
(b) Common-C Amplifier
(Buffer)
RE
V
OTA
RE
0.7V
≈
RL
E
2
VI
1
G =
≈ 1
1
V–
(a) Common-Base
Amplifier
1 +
RE
gm • RE
(a) Common Collector Amplifier
(Emitter Follower)
1
gm
VI
RO
=
(b) Common-B Amplifier
FIGURE 3. a) Common Collector Amplifier Using a Discrete
Transistor; b) Common-C Amplifier Using the
OTA Portion of the SHC615.
FIGURE 4. a) Common Base Amplifier Using a Discrete
Transistor; b) Common-B Amplifier Using the
OTA Portion of the SHC615.
SAMPLING COMPARATOR
The additional offset voltage or switching transient induced
on a capacitor at the current source output by the switching
charge can be determined by the following formula:
The SHC615 sampling comparator features a very short
2.2ns propagation delay and utilizes a new switching circuit
architecture to achieve excellent speed and precision.
Charge(pC)
Offset(V) =
It provides high impedance inverting and non-inverting
inputs, a high-impedance current source output and a TTL-
CMOS-compatible Hold Control Input.
CH Total(pF)
The switching stage input is insensitive to the low slew rate
performance of the hold control command and compatible
with TTL/CMOS logic levels. With a TTL logic high, the
comparator is active, comparing the two input voltages and
varying the output current accordingly. With a TTL logic
low, the comparator output is switched off.
The sampling comparator consists of an operational transcon-
ductance amplifier (OTA), a buffer amplifier, and a subse-
quent switching circuit. The OTA and buffer amplifier are
directly tied together at the buffer outputs to provide the two
identical high-impedance inputs and high open-loop transcon-
ductance. Even a small differential input voltage multiplied
with the high transconductance results in an output cur-
rent—positive or negative—depending upon the input polar-
ity. This is similar to the low or high status of a conventional
comparator. The current source output features high output
impedance, output bias compensation, and is optimized for
charging a capacitor in DC restoration, nanosecond integra-
tors, peak detectors and S/H circuits. The typical comparator
output current is ±3.2mA and the output bias current is
minimized to typically ±10µA in the sampling mode.
APPLICATION INFORMATION
The SHC615 operates from ±5V power supplies (±6V maxi-
mum). Do not attempt to operate with larger power supply
voltages or permanent damage may occur.
Inputs of the SHC615 are protected with internal diode
clamps as shown in Figure 1. These protection diodes can
safely conduct 10mA continuously (30mA peak). If input
voltages can exceed the power supply voltages by 0.7V, the
input signal current must be limited.
This innovative circuit achieves the slew rate representatives
of an open-loop design. In addition, the acquisition slew
current for a hold or storage capacitor is higher than standard
diode bridge and switch configurations, removing a main
contributor to the limits of maximum sampling rate and
input frequency.
BASIC CONNECTIONS
Figure 6 shows the basic connections required for operation.
These connections are not shown in subsequent circuit
diagrams. Power supply bypass capacitors should be located
as close as possible to the device pins. Solid tantalum
capacitors are generally best. See “Circuit Layout” at the end
of the applications discussion for further suggestions on
layout.
The switching circuits in the SHC615 use current steering
(versus voltage switching) to provide improved isolation
between the switch and analog sections. This results in low
aperture time sensitivity to the analog input signal, reduced
power supply and analog switching noise. Sample-to-hold
peak switching is 40fC.
®
15
SHC615
If the high speed TTL-hold command signal goes negative
due to reflections for AC-coupling, the hold control input
must be protected by an external reverse bias diode to
ground as shown in Figure 6.
plague high-speed components when they are used incor-
rectly.
• Bypass power supplies very close to the device pins.
Use tantalum chip capacitors (approximately 2.2µF);
parallel 470pF and/or 10nF ceramic chip capacitors
may be added if desired. Surface mount types are
recommended because of their low lead inductance.
Supply bypassing is extremely critical at high frequen-
cies and when driving high current loads.
CIRCUIT LAYOUT
The high-frequency performance of the SHC615 can be
greatly affected by the physical layout of the printed circuit
board. The following tips are offered as suggestions, not as
absolute requirements. Oscillations, ringing, poor bandwidth,
poor settling, and peaking are all typical problems that
• PC board traces for power lines should be wide to reduce
impedance.
+VCC
(13)
OTA
Biasing
CHOLD
(4)
In+
(10)
Switching
Stage
Biasing
Hold Control
(7)
GND TTL
(9)
–VCC
(5)
+VCC
(13)
Biasing
Comparator
(10)
Switching Stage
In+
In–
∞
CHOLD
(4)
SOTA
(11)
In–
(11)
Hold Control
(7)
(a)
BUFFER
Biasing
AMPLIFIER
–VCC
(5)
(b)
FIGURE 5. a) Simplified Block Diagram; and, b) Circuit Diagram of the Sampling Comparator which Includes the Sampling
Operational Transconductance Amplifier (SOTA) and the Switching Stage.
®
16
SHC615
• Make short, low-inductance traces. The entire physical
circuit should be as small as possible.
• A resistor of 100 to 250Ω in series with the high-imped-
ance inputs is recommended to reduce peaking.
• Use a low-impedance ground plane on the component side
to ensure that a low-impedance ground is available through-
out the layout.
• Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential—there are no shortcuts.
• Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances such as the amplifier’s
input terminals.
• Terminate transmission line loads. Unterminated lines,
such as box cables, can appear to the amplifier to be a
capacitive or inductive load. By terminating a transmission
line with its characteristic impedance, the amplifier’s load
then appears purely resistive.
• Sockets are not recommended since they add significant
inductance and parasitic capacitance. If sockets are re-
quired, use zero-profile sockets.
• Protect the hold control input with an external diode if
necessary.
• Use low-inductance, surface-mount components. Surface-
mount components offer the best AC performance.
RB
(25Ω to 200Ω)
CHOLD
9
GND
4
3
Base
2
Emitter
Switching Stage
OTA
7
Hold
Control
(20Ω
to
12
Collector
200Ω)
Sampling Comparator
(SC)
S/H In+
S/H In–
IQ Adjust
10
11
Biasing
1
SOTA
RQ = 300Ω sets roughly
IQ = ±14mA
RQ
13
+VCC
5
–VCC
–5V(1)
+5V(1)
10nF
+
2.2µF
470pF
470pF
10nF
2.2µF
+
Solid Tanatlum
NOTE: (1) ±VCC = ±6V absolute max.
FIGURE 6. Basic Connections
®
17
SHC615
TYPICAL APPLICATIONS
HCL
HCL
100Ω
100Ω
10
7
100Ω
100Ω
4
10
11
7
SC
R2
R1
11
G = +
SC
4
SHC615
12
CHOLD
100Ω
12
OTA
3
SHC615
OTA
2
CHOLD
100Ω
3
VOUT
VIN
VOUT
2
VIN
R1
R2
FIGURE 7. Complete DC Restoration System.
FIGURE 8. DC Restoration of a Buffer Amplifier.
CHOLD
HCL
100Ω
RE
7
Hold /Track
2
100Ω
11
10
VREF
4
100Ω
SC
OTA
12
IOUT
3
12
150Ω
50Ω
SHC615
SHC615
10
11
7
VIN
100Ω
4
OTA
2
SC
R1
R2
3
CHOLD
100Ω
50Ω
300Ω
300Ω
VOUT
300Ω
VOUT
OPA623
150Ω
300Ω
• Current Control
• Non-Inverting
• DC Coupling
VIN
FIGURE 10. Sample/Hold Amplifier.
FIGURE 9. Clamped Video/RF Amplifier.
®
18
SHC615
Hold Control
Hold Control
50Ω
100Ω
–VOUT
+1
IOUT
8
4
150Ω
50Ω
12
OTA
2
10
11
7
27pF
VIN
BUF600
100Ω
100Ω
4
SC
3
12
150Ω
27pF
10
11
7
VIN
100Ω
4
50Ω
SC
OTA
2
3
50Ω
VOUT
50Ω
27pF
SHC615
300Ω
620Ω
820Ω
+VOUT
1µF
FIGURE 11. Integrator for ns-Pulses.
FIGURE 12. Fast Pulse Peak Detector.
12
SHC615
11
fREF
100Ω
OTA
SC
10
4
3
fIN
HCL
7
75Ω
RE
CINT
2
VOUT
2
CHOLD
4
100Ω
7
Video
ADC
75Ω
75Ω
• Level Shifting
• Black Level Control
• Gain
11
10
–1V
100Ω
+5V
SC
OTA
12
3
SHC615
R1
R2
100Ω
fIN
÷N
25Ω
fOUT
VIN = 0 to –2V
OPA621
Sample
/Hold
CCD
Buffer
fREF
fIN
VCO
VOUT
IOUT
Timing
Control
Phase
fREF
VOUT
fOUT = fREF x N
FIGURE 13. CCD Analog Front-End.
FIGURE 14. Phase Detector For Fast PLL-Systems.
®
19
SHC615
相关型号：
SHC702JM
Sample and Hold Circuit, 1 Func, Sample, 0.6us Acquisition Time, Hybrid, MDIP24, METAL, 24 PIN
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