ZM7332 [BEL]
Power Supply Management Circuit, Fixed, 1 Channel, PQCC64, 9 X 9 MM, MO-220, QFN-64;
| 型号： | ZM7332 |
| 厂家： | 
BEL FUSE INC. |
| 描述： | Power Supply Management Circuit, Fixed, 1 Channel, PQCC64, 9 X 9 MM, MO-220, QFN-64 |
| 文件： | 总12页 (文件大小：835K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
Member of the
Family
Features
•
•
Programs, controls, and manages up to 32
independent Z-series POL converters via an industry
standard I2C interface (both 100kHz and 400kHz)
Programs output voltage, protections, optimal voltage
positioning, turn-on and turn-off delays and slew
rates, switching frequency, interleave (phase shift),
and feedback loop compensation of the Z-series POL
converters
User friendly ZIOSTM GUI interface for programming,
monitoring, and performance simulation
Applications
•
•
•
Low voltage, high density systems utilizing
•
•
•
•
•
Z-OneTM Digital Intermediate Bus Architectures
Broadband, networking, optical, and
communications systems
Four independent outputs for control of external
power and other devices (power supplies, fans, etc)
Desktops, servers, and portable computing
Four Power Good inputs for monitoring of
independent power supplies
Benefits
Four independent OK lines for flexible fault
management and fast fault propagation
•
•
•
Eliminates the need for external power
management components
Up to four interrupt inputs with programmable hot
swap support capabilities
Communicates with the customer system via the
industry standard I2C communication bus
•
•
•
Intermediate bus voltage monitoring and protection
AC Fail input
Reduces board space, system cost, complexity,
and time to market
Non-volatile memory to store system configuration
information and status data
•
•
•
1 kByte of user accessible non-volatile memory
Control of industry standard DC-DC front ends
Crowbar output to trigger the optional crowbar
protection
•
•
•
•
Run-time counter
JTAG IEEE 1149.1 compliant interface
Hardware and software locks for data protection
Small footprint semiconductor industry standard
QFN64 package: 9x9mm
•
•
Compatible with conventional pick-and-place
equipment
Wide operating temperature range
Description
The ZM7300 is a fully programmable digital power manager that utilizes the industry-standard I2C communication
bus interface to control, manage, program and monitor up to 32 Z-series POL converters and 4 independent
power devices. The ZM7300 completely eliminates the need for external components for power management and
POL converters programming, monitoring, and reporting. Parameters of the ZM7300 are programmable via the
I2C bus and can be changed by a user at any time during product development and service.
REV. X11 JAN 22, 2006
www.power-one.com
Page 1 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
1. Selection Chart
Part
Number
Total number of Z-OneTM
POLs and Auxiliary devices
that can be controlled
Active
Addresses
Number of
Groups
Number of
Interrupts
Number of
Parallel
Buses
Number of
Auxiliary
Devices
ZM7304
ZM7308
ZM7316
ZM7332
4
8
00…03
00…07
00…15
00…31
2
2
3
4
2
2
3
4
2
4
4
8
4
4
4
4
16
32
Note: DPMs with other combinations of parameters are available upon request. Contact factory for more details.
2. Reference Documents
•
•
•
ZY7XXX Point of Load Regulator. Data Sheet
Digital Power Manager. Programming Manual
ZIOSTM Graphical User Interface
3. Absolute Maximum Ratings
Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only
therefore exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameter
Ambient Temperature Range
Storage Temperature (Ts)
Junction Temperature (TJ)
Lead Temperature
Conditions/Description
Min
-40
-55
Max
85
Units
°C
150
°C
125
°C
Reflow Soldering, 10s exposure
VDD pin
300
°C
Input Voltage
-0.3
-0.5
3.6
VDC
VDC
Input Voltage
Any pin other than VDD
VDD+0.5
4. Mechanical and Reliability Specifications
Parameter
Conditions/Description
Min
Nom
Max
Units
Weight
TBD
grams
Calculated Per Telcordia Technologies
SR-332
MTBF
TBD
MHrs
Read-
Write
cycles
-40°C to 85°C ambient
25°C ambient
Non-Volatile Memory Endurance
Data Retention
10,000
TBD
years
REV. X11 JAN 22, 2006
www.power-one.com
Page 2 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
5. Electrical Specifications
5.1 Power Specifications
Parameter
Conditions/Description
Min
Nom
Max
Units
Input Supply Voltage
VDD pin
3.0
3.6
VDC
Hardware reset is triggered below this
threshold
Undervoltage Lockout
2.3
2.5
2.7
VDC
Input Supply Current
VREF voltage
VDD pin=3.3V
12
mA
VDC
VDC
MΩ
Properly decoupled
2.3
2.56
2.7
IBVS input voltage range
IBVS input resistance
GND
VREF
100
5.2 Feature Specifications
Parameter
Conditions/Description
Min
Nom
Max
Units
Intermediate Voltage Bus Protections
Overvoltage Protection
Threshold
Undervoltage Protection
Threshold
Turns off all POLs, the Front End and
triggers Crowbar
Programmable
Programmable
Turns off all POLs
Front End Enable (FE_EN) 1
Front End logic level enabled
Front End logic level disabled
VFE_EN
VFE_EN
Isrc
High
Low
Source Current, VFE_EN=VDD-0.5V
Sink Current, VFE_EN=0.5V
Crowbar (CB) 1
5
mA
mA
Isink
5
VCB
VCB
Isrc
Isink
TCB
Crowbar Enable
High
Low
Crowbar Disable
Source Current, VCB=VDD-0.5V
Sink Current, VCB=0.5V
Duration of Enabling Pulse
5
5
mA
mA
ms
1
________________________
1
At start-up of the DPM, the output is in the high impedance state. To avoid pulling the pin high due to capacitive coupling, it is recommended
to connect a 3.3kOhm resistor between the pin and the VSS pin.
REV. X11 JAN 22, 2006
www.power-one.com
Page 3 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
5.3 Signal Specifications
Parameter
Conditions/Description
SYNC/DATA Line
Min
Nom
Max
Units
SDpu
SDthrL
SDthrH
SDhys
SDsink
Freq_sd
SD pull up resistor
SD input low voltage threshold
SD input high voltage threshold
SD input hysteresis
SD sink capability (VSD=0.5V)
Clock frequency
5
kΩ
V
0.31·VDD
0.45·VDD
0.37
0.52·VDD
0.81·VDD
1.1
V
V
30
mA
kHz
% of clock
cycle
% of clock
cycle
450
22
550
Tsynq
T0
Sync pulse duration
28
78
Data=0 pulse duration
72
Interrupt Inputs (INT0_N, INT1_N, INT2_N, INT3_N)
Rpu3
VthrL3
VthrH3
Vhys3
Pull up resistor
Input low voltage threshold
Input high voltage threshold
Input hysteresis
30
kΩ
V
0.31·VDD
0.45·VDD
0.37
0.52·VDD
0.81·VDD
1.1
V
V
ADDR[3:0], ACFAIL_N, RES_N, LCK_N, PG[3:0] Inputs
Rpu1
VthrL1
VthrH1
Vhys1
Pull up resistor
Input low voltage
Input high voltage
Input hysteresis
20
-0.5
50
kΩ
V
0.2·VDD
VDD+0.5
0.6·VDD
V
TBD
V
HRES_N Input
Rpu2
VthrL2
VthrH2
Vhys2
HRES_N pull up resistor
HRES_N input low voltage
HRES_N input high voltage
HRES_N input hysteresis
30
-0.5
60
kΩ
V
0.2·VDD
VDD+0.5
0.9·VDD
V
TBD
5
V
Inputs/Outputs (OK_A, OK_B, OK_C, OK_D)
OKpu
OKthrL
OKthrH
OKhys
OKsink
OK pull up resistor
kΩ
V
OK input low voltage threshold
OK input high voltage threshold
OK input hysteresis
0.31·VDD
0.45·VDD
0.37
0.52·VDD
0.81·VDD
1.1
V
V
OK sink capability (VOK=0.5V)
30
mA
Enable Outputs (EN[3:0])
VEN
VEN
EN logic level enabled
EN logic level disabled
High
Low
ENsrc
ENsink
EN source current, VEN=VDD-0.5V
EN sink current, VEN=0.5V
5
5
mA
mA
REV. X11 JAN 22, 2006
www.power-one.com
Page 4 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
6. Typical Application
Figure 1. Block Diagram of Typical Multiple Output Application with Digital Power Manager and I2C Interface
The block diagram of a typical application of a ZM7300 digital power manager (DPM) is shown in Figure 1. The
system includes four groups of Z-One Point Of Load converters (POLs). A group is defined as one or more POL
converter interconnected via OK pins. Grouping of POLs enables users to program advanced fault management
schemes and define margining functions, monitoring, startup behavior, and reporting conventions.
All Z-One POL converters are connected to the DPM and to each other via a single-wire synchronization/data (SD)
line. The line provides synchronization of all POL converters to the master clock generated by the DPM and
simultaneously carries bidirectional data transfer between POL converters and the DPM. The DPM communicates
via the I2C bus with the host system and/or ZIOSTM Graphical User Interface.
In this application, besides Z-One POL converters, the DPM also controls and monitors two auxiliary devices – a
Voltage Regulation Module (VRM) and a Low Dropout Regulator (LDO). While these devices are not Z-One
compliant and may not even be manufactured by Power-One, they are integrated into the system by
communicating with the DPM via their Enable pins connected to ENX outputs of the DPM. In addition, the DPM
monitors status of the auxiliary devices via its PGX inputs connected to Power Good and Error Flag outputs of the
auxiliary devices. The DPM can control and monitor four or more independent auxiliary devices.
The DPM can also trigger an optional crowbar circuit and provide undervoltage and overvoltage protections of the
intermediate bus voltage. In addition, the DPM can be controlled by a host system via the interrupt inputs, RES_N
input and the AC-Fail input. The interrupts can also be configured as a hot swap trigger for a group of POLs.
REV. X11 JAN 22, 2006
www.power-one.com
Page 5 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
7. Auxiliary Devices
The ZM7300 Digital Power Manager includes all necessary circuitry to control and monitor four Auxiliary Devices.
Auxiliary Devices can be any device which requires an on/off control and which should be monitored for faults.
Typical Auxiliary Devices include analog POLs, linear regulators, fans. Auxiliary devices are controlled and
monitored via the ZIOSTM Graphical User Interface.
Internally to the ZM7300 Auxiliary Devices are treated as Z-One™ POL converters: each Auxiliary Device has an
address and is assigned to one of the groups as shown in Figure 2 (devices at address 04 through 07)
Figure 2. System Configuration Window
Four enable outputs EN0…EN3 control the Auxiliary Devices. The fault propagation from POL converters to the
auxiliary devices can be programmed as shown in Figure 3.
REV. X11 JAN 22, 2006
www.power-one.com
Page 6 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
Figure 3. Auxiliary Device Type and Fault Management Windows
Turn-on and turn-off delays can be programmed for each Auxiliary Device as shown in Figure 4. Timing of turn-on
and turn-off events can be synchronized between Auxiliary Devices and Z-One POL converters by programming
appropriate delays for each specific type of devices.
Figure 4. Sequencing Tracking Window
Four monitoring inputs PG0…PG3 read status of the Auxiliary Devices and report it in the IBS Monitoring window
as shown in Figure 5.
REV. X11 JAN 22, 2006
www.power-one.com
Page 7 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
Figure 5. IBS Monitoring Window
REV. X11 JAN 22, 2006
www.power-one.com
Page 8 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
8. Pinout Table
Pin Name
Pin No.
Pin Type
Buffer Type
Pin Description
Notes
6, 25,
42, 57, 60
VDD
Supply
---
Positive Supply
8, 9, 26
38, 43, 58
VSS
SD
Supply
I/O
---
Ground
56
ST/OC
Sync-Data Line
OKA
OKB
OKC
OKD
11
13
20
53
I/O
ST/OC
OK Lines
FE_EN
CB
17
23
30
27
O
O
CMOS
CMOS
ST/OC
ST/OC
Front-End Enable
Crowbar Trigger
I2C Interface
SDA
SCL
I/O
I/O
I2C Interface
ADDR0
ADDR1
ADDR2
IN0_N
IN1_N
IN2_N
IN3_N
TCK
TMS
TDO
TDI
EN0
47
46
45
41
40
37
36
31
32
33
34
5
I
I
STPU
STPU
I2C Interface Address
Interrupts
JTAG Interface
(IEEE 1149.1 compliant)
EN1
EN2
EN3
PG0
PG1
PG2
PG3
7
O
I
CMOS
STPU
Auxiliary Device Enables
55
50
54
52
51
49
Auxiliary Device Power Good
RES_N
ACFAIL_N
LCK_N
18
16
61
4
I
I
I
I
STPU
STPU
STPU
STPU
System Soft Reset
AC-Fail Trigger
Write Protect Lock
Cold Reset
HRES_N
Intermediate Bus Voltage
Sense
IBVS
48
I
A
A
AREF
IR
44
63
-
Analog Reference
Internal Reset
Connect to VSS via 10k
Leave floating
1, 2, 3, 10, 12,
14, 15, 19, 21,
22, 24, 28, 29,
35, 39, 59, 62, 64
nc
-
-
No Connect
Legend: I=input, O=output, I/O=input/output, P=power, ST=Schmitt-trigger, OCPU=open collector with pull-up, CMOS=cmos output stage,
STPU=Schmitt-trigger with pull-up, A=analog
REV. X11 JAN 22, 2006
www.power-one.com
Page 9 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
9. Pins Description
ACFAIL_N, AC Fail Input (Pin 16): Schmitt-Trigger
input with internal pull-up resistor (active low).
Pulling low the input indicates to the DPM that an
AC-DC front-end has lost the mains and that a
system shut down should immediately be initiated.
input triggers the programming of a group. When
released, POLs are assumed to be disconnected
from the DPM.
IR, Internal Reset (Pin 63): Connect to VSS via a
10kOhm resistor.
ADDR[0:2], I2C Address Inputs (Pins 47, 46, 45):
Inputs with internal pull-up resistor. The 3 bit
encoded address determines the Digital Power
Manager communication address for the I2C
interface.
LCK_N, Memory Lock (Pin 61): Active low input
with internal pull-up. When LCK_N is pulled low, all
memory within the DPM is write-protected. The write
protection cannot be disabled by software.
AREF, Analog Reference (Pin 44): An analog
reference which is used internally. A 10nF capacitor
should be connected as close as possible to the
package between AREF and VSS.
OKA, OKB, OKC, OKD, Group OK Signals (Pins
11, 13, 20, 53): An open drain input/output with
internal pull-up resistor. Pulling low the OK input will
indicate to the DPM a fault in a Group, the DPM can
also pull an OK line low to disable a Group.
CB, Crowbar Output (Pin 23): A CMOS output
which is used to trigger a crowbar (SCR) in case of
overvoltage on the Intermediate Voltage Bus.
PG[0:3], Power Good (Pins 54, 52, 51, 49): Input
with internal pull-up resistor. The pin is used to read
the status of an Auxiliary Device.
EN[0:3], Enable Outputs for Auxiliary Devices
(Pins 5, 7, 55, 50): CMOS outputs to control
Auxiliary Devices like linear regulators, analog POLs,
fans or other devices.
RES_N, Active Low Reset In/Out (Pin 18): Input
with internal pull-up resistor. When pulled low a soft
reset of the system (sequenced turned off of all
POLs and Auxiliary Devices) is initiated. When
released the whole system is reprogrammed and
started if necessary.
.
FE_EN, Front-End Enable (Pin 17): A CMOS
output which is used to turn-on/off the DC/DC
converter generating the IBV.
SD, Sync Data Line (Pin 56): An open drain input /
output with internal pull-up resistor. Communication
line to distribute a master clock to all converters and
at the same time to communicate with all POLs.
HRES_N, Hardware Reset (Pin 4): Input with
internal pull-up resistor. When pulled low a cold start
of the Digital Power Manager is initiated. This
function should not be used to initiate normal system
shut-down or turn-on.
JTAG Interface (Pins 34, 33, 32, 31): Programming
interface according to IEEE 1149.1 standard.
IBVS, Intermediate Voltage Bus Sense (Pin 48):
Analog input to an internal ADC circuit to measure
the Intermediate Bus Voltage. The full scale range
of the input is 2.56V and the IBV should be scaled
down by a factor of 5.7 for proper reporting of the
IBV with the Z-ONE™ GUI.
VDD, Positive Supply (Pins 6, 25, 42, 57, 60):
Supply voltage.
At least 4x100nF decoupling
capacitors should be connected between VDD and
VSS pins. All VDD pins must be connected.
VSS, Ground (Pins 8, 9, 26, 38, 43, 58): Ground.
Decoupling capacitors need to be connected as
close as possible to the pins. All VSS pins must be
connected.
INT[0:3], Interrupts (Pins 41, 40, 37, 36): Four
active low inputs with internal pull-ups. Each of the
inputs can be configured for two functions: first, the
interrupt input acts on the OK line(s) to stop
momentarily the operation of group of POLs and
Auxiliary Devices, second the interrupt can be used
as a hot swap trigger. In this function the interrupt
nc, No Connect (Pin 1, 2, 3, 10, 12, 14, 15, 19, 21,
22, 24, 28, 29, 35, 39, 59, 62, 64): All nc pins must
remain floating.
REV. X11 JAN 22, 2006
www.power-one.com
Page 10 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
10. Mechanical Drawings
Figure 7. ZM7300 Terminals
mm
inch
MIN NOM MAX MIN NOM MAX
A
J
-
0.85 0.90
-
0.033 0.035
0.002
0.0 0.01 0.05
0.20 ref
A1
0.008 ref
D/E
D1/E1
9.00 BSC
0.354 BSC
0.344 BSC
8.75 BSC
D2/E2 6.95 7.10 7.25 0.274 0.279 0.285
N
P
e
L
b
64
0.24 0.42 0.60 0.009 0.016 0.024
0.30 0.40 0.50 0.012 0.016 0.020
0.18 0.23 0.30 0.007 0.009 0.012
Notes
1. Dimensioning & tolerances conform to ASME-Y 14.5m. -
1994.
2. Dimension b applies to plated terminal and is measured
between 0.20 and 0.25mm from terminal tip.
3. The pin #1 identifier must be existed on the top surface of the
package by using indentation mark or other feature of
package body.
Figure 6. ZM7300 Mechanical Drawing – Top View
REV. X11 JAN 22, 2006
www.power-one.com
Page 11 of 12
ZM7300 Series Digital Power Manager
Preliminary Data Sheet
Advanced Product Release
Figure 8. ZM7300 Mechanical Drawing – Top View
1. NUCLEAR AND MEDICAL APPLICATIONS - Power-One products are not designed, intended for use in, or authorized for use as critical
components in life support systems, equipment used in hazardous environments, or nuclear control systems without the express written
consent of the respective divisional president of Power-One, Inc.
2. TECHNICAL REVISIONS - The appearance of products, including safety agency certifications pictured on labels, may change depending on
the date manufactured. Specifications are subject to change without notice.
I2C is a trademark of Philips Corporation.
REV. X11 JAN 22, 2006
www.power-one.com
Page 12 of 12
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