AFBR-5205ATZ [BOARDCOM]

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style;
AFBR-5205ATZ
型号: AFBR-5205ATZ
厂家: Broadcom Corporation.    Broadcom Corporation.
描述:

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style

ATM 异步传输模式 光纤
文件: 总19页 (文件大小:559K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AFBR-5205Z  
ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1  
in Low Cost 1x9 Package Style  
Data Sheet  
Description  
Features  
The AFBR-5200Z family of transceivers from Avago Tech- Full compliance with ATM Forum UNI SONET OC-3  
nologies provide the system designer with products  
to implement a range of solutions for multimode fiber  
SONET OC-3 (SDH STM-1) physical layers for ATM and  
other services.  
Multimode Fiber Physical Layer Specification  
Multisourced 1x9 package style with choice of duplex  
SC or duplex ST* receptacle  
Wave solder and aqueous wash process compatibility  
RoHS Compliance  
These transceivers are all supplied in the new industry  
standard 1x9 SIP package style with either a duplex SC or  
a duplex ST* connector interface.  
Applications  
ATM 2000 m Backbone Links  
Multimode fiber ATM backbone links  
Multimode fiber ATM wiring closet to desktop links  
The AFBR-5205Z/-5205TZ are 1300nm products with  
optical performance compliant with the SONET STS-3c  
(OC-3) Physical Layer Interface Specification. This physical  
layer is defined in the ATM Forum User-Network Interface  
(UNI) Specification Version 3.0. This document references  
the ANSIT1E1.2 specification for the details of the interface  
for 2000 meter multimode fiber backbone links.  
ATM 155 Mbps/194 MBd encoded links (available upon  
special request)  
Part Numbers  
AFBR-5205Z, AFBR-5205AZ, AFBR-5205APZ,  
AFBR-5205ATZ, AFBR-5205PZ, AFBR-5205TZ,  
AFBR-5205PEZ 1300 nm 2 km  
Selected versions of these transceivers may be used to  
implement the ATM Forum UNI Physical Layer Interface at  
the 155 Mbps/194 MBd rate.  
The ATM 100 Mbps/125 MBd Physical Layer interface is  
best implemented with the AFBR-5100Z family of FDDI  
Transceivers which are specified for use in this 4B/5B  
encoded physical layer per the FDDI PMD standard.  
Transmitter Sections  
The transmitter sections of the AFBR-5205Z series utilize  
1300 nm InGaAsP LEDs. These LEDs are packaged in the  
optical subassembly portion of the transmitter section.  
They are driven by a custom silicon IC which converts  
differential PECL logic signals, ECL referenced (shifted) to a  
+5 Volt supply, into an analog LED drive current.  
*ST is a registered trademark of AT&T Lightguide Cable Connectors.  
Receiver Sections  
The receiver sections of the AFBR-5205Z series utilize  
The electrical subassembly consists of a high volume  
InGaAs PIN photodiodes coupled to a custom silicon tran- multilayer printed circuit board on which the IC chips  
simpedance preamplifier IC. These are packaged in the and various surface-mounted passive circuit elements are  
optical subassembly portion of the receiver.  
attached.  
These PIN/preamplifier combinations are coupled to a The package includes internal shields for the electrical  
custom quantizer IC which provides the final pulse shaping and optical subassemblies to insure low EMI emissions  
for the logic output and the Signal Detect function.  
The data output is differential. The signal detect output  
is single-ended. Both data and signal detect outputs are  
PECL compatible, ECL referenced (shifted) to a +5 volt  
power supply.  
and high immunity to external EMI fields.  
The outer housing including the duplex SC connector or  
the duplex ST ports is molded of filled non-conductive  
plastic to provide mechanical strength and electrical  
isolation. The solder posts of the Avago design are isolated  
from the circuit design of the transceiver and do not  
require connection to a ground plane on the circuit board.  
Package  
The overall package concept for the Avago transceivers  
consists of three basic elements; the two optical sub-  
assemblies, an electrical subassembly, and the housing as  
illustrated in the block diagrams in Figure1 and Figure1a.  
The transceiver is attached to a printed circuit board with  
the nine signal pins and the two solder posts which exit  
the bottom of the housing. The two solder posts provide  
the primary mechanical strength to withstand the loads  
imposed on the transceiver by mating with the duplex or  
simplex SC or ST connectored fiber cables.  
Note: The “T” in the product numbers indicates a transceiver with a  
duplex ST connector receptacle. Product numbers without a “T” indicate  
transceivers with a duplex SC connector receptacle.  
The package outline drawing and pin out are shown in  
Figures 2, 2a, and 3. The details of this package outline  
and pin out are compliant with the multisource definition  
of the 1x9 SIP. The low profile of the Avago transceiver  
design complies with the maximum height allowed for  
the duplex SC connector over the entire length of the  
package.  
Application Information  
The Applications Engineering group in the Avago Optical  
Communication Division is available to assist you with the  
technical understanding and design trade-offs associated  
with these transceivers. You can contact them through  
your Avago sales representative.  
Figures 2b and 2c show the outline drawings for options  
that include mezzanine height and extended and flush  
shields respectively.  
The optical subassemblies utilize a high volume assembly  
process together with low cost lens elements which result  
in a cost effective building block.  
ELECTRICAL SUBASSEMBLY  
DUPLEX SC  
RECEPTACLE  
DIFFERENTIAL  
DATA OUT  
PIN PHOTODIODE  
SINGLE-ENDED  
SIGNAL  
DETECT OUT  
QUANTIZER IC  
PREAMP IC  
OPTICAL  
SUBASSEMBLIES  
DIFFERENTIAL  
DATA IN  
LED  
DRIVER IC  
TOP VIEW  
Figure 1. SC block diagram.  
2
ELECTRICAL SUBASSEMBLY  
QUANTIZER IC  
DUPLEX ST  
RECEPTACLE  
DIFFERENTIAL  
DATA OUT  
PIN PHOTODIODE  
SINGLE-ENDED  
SIGNAL  
DETECT OUT  
PREAMP IC  
OPTICAL  
SUBASSEMBLIES  
DIFFERENTIAL  
DATA IN  
LED  
DRIVER IC  
TOP VIEW  
Figure 1a. ST block diagram.  
39.12  
(1.540)  
12.70  
(0.500)  
6.35  
(0.250)  
MAX.  
AREA  
RESERVED  
FOR  
PROCESS  
PLUG  
25.40  
MAX.  
12.70  
(0.500)  
(1.000)  
AFBR-5xxxZ  
DATE CODE (YYWW)  
A
5.93 0.1  
(0.233 0.004)  
SINGAPORE  
+ 0.0ꢀ  
0.75  
- 0.05  
+ 0.003  
- 0.002  
3.30 0.3ꢀ  
(0.130 0.015)  
10.35  
(0.407)  
)
(0.030  
MAX.  
2.92  
1ꢀ.52  
+ 0.25  
- 0.05  
(0.115)  
1.27  
(0.729)  
φ
0.46  
+ 0.010  
- 0.002  
4.14  
(0.163)  
)
(9x)  
(0.050  
(0.01ꢀ)  
NOTE 1  
NOTE 1  
23.55  
(0.927)  
20.32  
(0.ꢀ00)  
16.70  
(0.657)  
17.32 20.32 23.32  
(0.6ꢀ2) (0.ꢀ00) (0.91ꢀ)  
[ꢀx(2.54/.100)]  
0.ꢀ7  
(0.034)  
Note 1: Posphor bronse is the base material for the  
posts & pins.  
23.24  
(0.915)  
15.ꢀꢀ  
(0.625)  
For lead-free soldering, the solder posts have tin  
copper over  
nickel plating, and the electrical pins have pure tin  
over nickel plating.  
Figure 2. SC package outline drawing with standard height.  
Dimensions are in millimeters (inches).  
3
42  
(1.654)  
MAX.  
5.99  
(0.236)  
24.ꢀ  
(0.976)  
12.7  
(0.500)  
25.4  
(1.000)  
MAX.  
AFBR-5103TZ  
DATE CODE (YYWW)  
SINGAPORE  
+ 0.0ꢀ  
- 0.05  
+ 0.003  
- 0.002  
0.5  
(0.020)  
(
(
12.0  
(0.471)  
MAX.  
2.6 0.4  
(0.102 0.016)  
3.3 0.3ꢀ  
(0.130) ( 0.015)  
0.3ꢀ  
0.015)  
20.32  
(
0.46  
(0.01ꢀ)  
NOTE 1  
φ
2.6  
φ
+ 0.25  
- 0.05  
1.27  
(0.102)  
+ 0.010  
- 0.002  
0.050  
(
(
20.32  
17.4  
(0.6ꢀ5)  
[(ꢀx (2.54/0.100)]  
20.32  
(0.ꢀ00)  
(0.ꢀ00)  
22.ꢀ6  
(0.900)  
21.4  
(0.ꢀ43)  
3.6  
(0.142)  
1.3  
(0.051)  
23.3ꢀ  
(0.921)  
1ꢀ.62  
(0.733)  
Note 1: Posphor bronse is the base material for the posts & pins.  
For lead-free soldering, the solder posts have tin copper over  
nickel plating, and the electrical pins have pure tin over nickel plating.  
Dimensions are in millimeters (inches).  
Figure 2a. ST package outline drawing with standard height.  
4
29.6  
(1.16)  
UNCOMPRESSED  
39.6  
(1.56)  
12.70  
(0.50)  
4.7  
(0.1ꢀ5)  
MAX.  
AREA  
RESERVED  
FOR  
25.4  
(1.00)  
12.7  
(0.50)  
MAX.  
PROCESS  
PLUG  
2.0 0.1  
(0.079 0.004)  
0.51  
(0.02)  
SLOT WIDTH  
SLOT DEPTH  
+0.1  
-0.05  
+0.004  
-0.002  
0.25  
2.09  
(0.0ꢀ)  
10.2  
(0.40)  
9.ꢀ  
(0.3ꢀ6)  
UNCOMPRESSED  
MAX.  
MAX.  
(0.010  
)
1.3  
(0.05)  
3.3 0.3ꢀ  
(0.130 0.015)  
20.32  
(0.ꢀ0)  
15.ꢀ 0.15  
(0.622 0.006)  
+0.25  
-0.05  
+0.010  
0.46  
+0.25  
1.27  
9X φ  
-0.05  
2X φ  
(0.01ꢀ  
)
+0.010  
-0.002  
-0.002  
(0.050  
)
2.54  
(0.100)  
ꢀX  
20.32  
(0.ꢀ00)  
23.ꢀ  
(0.937)  
20.32  
(0.ꢀ00)  
1.3  
(0.051)  
2X φ  
Dimensions are in millimeters (inches).  
All dimensions are 0.025mm unless otherwise specified.  
Figure 2b. Package outline drawing with mezzanine height and extended shield.  
5
39.6  
(1.56)  
12.7  
(0.50)  
MAX.  
4.7  
(0.1ꢀ5)  
1.01  
(0.40)  
AREA  
RESERVED  
FOR  
PROCESS  
PLUG  
25.4  
(1.00)  
29.7  
(1.17)  
12.7  
(0.50)  
MAX.  
2.0 0.1  
(0.079 0.004)  
25.ꢀ  
(1.02)  
2.2  
(0.09)  
SLOT WIDTH  
MAX.  
SLOT DEPTH  
+0.1  
-0.05  
+0.004  
-0.002  
10.2  
(0.40)  
0.25  
MAX.  
(0.010  
)
14.4  
(0.57)  
9.ꢀ  
(0.3ꢀ6)  
MAX.  
22.0  
(0.ꢀ7)  
3.3 0.3ꢀ  
(0.130 0.015)  
20.32  
(0.ꢀ00)  
15.ꢀ 0.15  
+0.25  
(0.622 0.006)  
0.46  
-0.05  
+0.25  
-0.05  
+0.010  
-0.002  
9x φ  
1.27  
+0.010  
-0.002  
2x φ  
(0.01ꢀ  
)
(0.050  
)
AREA  
RESERVED  
FOR  
PROCESS  
PLUG  
20.32  
(0.ꢀ00)  
23.ꢀ  
(0.937)  
20.32  
(0.ꢀ00)  
2.54  
(0.100)  
ꢀx  
Dimensions are in millimeters (inches).  
All dimensions are 0.025mm unless  
otherwise specified.  
1.3  
(0.051)  
2x φ  
Figure 2c. Package outline drawing with mezzanine height and flush shield.  
1 = VEE  
N/C  
2 = RD  
3 = RD  
4 = SD  
5 = VCC  
6 = VCC  
7 = TD  
ꢀ = TD  
9 = VEE  
Rx  
Tx  
N/C  
TOP VIEW  
Figure 3. Pin out diagram.  
6
The following information is provided to answer some of  
the most common questions about the use of these parts.  
Premises per DIS 11801 document and the EIA/TIA-568-A  
Commercial Building Telecommunications Cabling  
Standard per SP-2840.  
Transceiver Optical Power Budget versus Link Length  
Transceiver Signaling Operating Rate Range and  
BER Performance  
Optical Power Budget (OPB) is the available optical power  
for a fiber optic link to accommodate fiber cable losses plus  
losses due to in-line connectors, splices, optical switches,  
and to provide margin for link aging and unplanned losses  
due to cable plant reconfiguration or repair.  
For purposes of definition, the symbol (Baud) rate, also  
called signaling rate, is the reciprocal of the symbol time.  
Data rate (bits/sec) is the symbol rate divided by the  
encoding factor used to encode the data (symbols/bit).  
Figure 4 illustrates the predicted OPB associated with the  
three transceivers series specified in this data sheet at  
the Beginning of Life (BOL). These curves represent the  
attenuation and chromatic plus modal dispersion losses  
associated with the 62.5/125 m and 50/125 m fiber  
cables only. The area under the curves represents the  
remaining OPB at any link length, which is available for  
overcoming non-fiber cable losses.  
When used in 155 Mbps SONET OC-3 applications the  
performance of the 1300 nm transceivers, AFBR-5205Z  
is guaranteed to the full conditions listed in individual  
product specification tables.  
12  
Avago LED technology has produced 1300 nm LED  
devices with lower aging characteristics than normally  
associated with these technologies in the industry. The  
industry convention is 1.5 dB aging for 1300 nm LEDs. The  
1300nm Avago LEDs are specified to experience less than  
1 dB of aging over normal commercial equipment mission  
life periods. Contact your Avago sales representative for  
additional details.  
AFBR-5205Z, 62.5/125 μm  
10  
AFBR-5205Z,  
50/125 μm  
6
Figure 4 was generated for the 1300 nm transceivers with  
an Avago fiber optic link model containing the current  
industry conventions for fiber cable specifications and the  
draft ANSI T1E1.2. These optical parameters are reflected  
in the guaranteed performance of the transceiver specifi-  
cations in this data sheet. This same model has been used  
extensively in the ANSI and IEEE committees, including  
the ANSI T1E1.2 committee, to establish the optical per-  
formance requirements for various fiber optic interface  
standards. The cable parameters used come from the  
ISO/IEC JTC1/SC 25/WG3 Generic Cabling for Customer  
4
2
0
0.3 0.5  
1.0  
1.5  
2.0  
2.5  
FIBER OPTIC CABLE LENGTH (km)  
Figure 4. Optical power budget vs. fiber optic cable length.  
7
The transceivers may be used for other applications The jitter specifications stated in the following 1300 nm  
at signaling rates different than 155 Mbps with some transceiver specification tables are derived from the values  
variation in the link optical power budget. Figure 5 gives in Table B1 of Annex B. They represent the worst case jitter  
an indication of the typical performance of these products  
at different rates.  
contribution that the transceivers are allowed to make  
to the overall system jitter without violating the Annex B  
allocation example. In practice, the typical contribution  
of the Avago transceivers is well below these maximum  
allowed amounts.  
These transceivers can also be used for applications which  
require different Bit Error Rate (BER) performance. Figure  
6 illustrates the typical trade-off between link BER and the  
receivers input optical power level.  
Recommended Handling Precautions  
Transceiver Jitter Performance  
Avago recommends that normal static precautions be  
taken in the handling and assembly of these transceivers  
to prevent damage which may be induced by electrostatic  
discharge (ESD). The AFBR-5205Z series of transceivers  
meet MIL-STD-883C Method 3015.4 Class 2 products.  
The Avago 1300 nm transceivers are designed to operate  
per the system jitter allocations stated inTable B1 of Annex  
B of the draft ANSI T1E1.2 Revision 3 standard.  
The Avago 1300 nm transmitters will tolerate the worst  
case input electrical jitter allowed in Annex B without  
violating the worst case output optical jitter requirements.  
Care should be used to avoid shorting the receiver data or  
signal detect outputs directly to ground without proper  
current limiting impedance.  
The Avago 1300 nm receivers will tolerate the worst case  
input optical jitter allowed in Annex B without violating  
the worst case output electrical jitter allowed.  
2.5  
1 x 10-2  
1 x 10-3  
2.0  
1.5  
1.0  
1 x 10-4  
AFBR-5205Z  
1 x 10-5  
1 x 10-6  
CENTER OF SYMBOL  
1 x 10-7  
0.5  
0
1 x 10-ꢀ  
1 x 10-9  
1 x 10-10  
1 x 10-11  
1 x 10-12  
0.5  
0
25  
50  
75 100 125 150 175 200  
SIGNAL RATE (MBd)  
-6  
-4  
-2  
0
2
4
RELATIVE INPUT OPTICAL POWER – dB  
CONDITIONS:  
CONDITIONS:  
1. PRBS 27-1  
1. 155 MBd  
2. PRBS 27-1  
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.  
3. BER = 10-6  
3. CENTER OF SYMBOL SAMPLING.  
4. TA = 25°C  
4. TA = 25° C  
5. VCC = 5 Vdc  
5. VCC = 5 Vdc  
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
6. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
Figure 5. Transceiver relative optical power budget at constant BER vs.  
signaling rate.  
Figure 6. Bit error rate vs. relative receiver input optical power.  
8
Solder and Wash Process Compatibility  
Shipping Container  
The transceivers are delivered with protective process The transceiver is packaged in a shipping container  
plugs inserted into the duplex SC or duplex ST connector designed to protect it from mechanical and ESD damage  
receptacle. This process plug protects the optical subas- during shipment or storage.  
semblies during wave solder and aqueous wash process-  
ing and acts as a dust cover during shipping.  
These transceivers are compatible with either industry  
standard wave or hand solder processes.  
Rx  
Tx  
NO INTERNAL CONNECTION  
NO INTERNAL CONNECTION  
AFBR-520xZ  
TOP VIEW  
Rx  
VEE  
1
Rx  
Tx  
Tx  
VEE  
9
RD  
2
RD  
3
SD  
4
VCC  
VCC  
TD  
7
TD  
5
6
C1  
C2  
VCC  
R2  
R3  
C5  
L1  
C3  
L2  
C4  
TERMINATION  
AT PHY  
DEVICE  
R1  
R4  
VCC  
INPUTS  
R5  
R7  
V
CC FILTER  
AT VCC PINS  
TRANSCEIVER  
TERMINATION  
AT TRANSCEIVER  
INPUTS  
C6  
R9  
R6  
Rꢀ  
R10  
RD  
RD  
SD  
VCC  
TD  
TD  
Notes:  
The split-load terminations for ECL signals need to be located at the input of devices receiving those ECL signals.  
Recommend 4-layer printed circuit board with 50 Ohm microstrip signal paths be used.  
R1 = R4 = R6 = R8 = R10 = 130 Ohms.  
R2 = R3 = R5 = R7 = R9 = 82 Ohms.  
C1 = C2 = C3 = C5 = C6 = 0.1F.  
C4 = 10 F.  
L1 = L2 = 1 H coil or ferrite inductor.  
Figure 7. Recommended decoupling and termination circuits.  
9
Board Layout – Decoupling Circuit and Ground Planes  
Board Layout – Hole Pattern  
It is important to take care in the layout of your circuit The Avago transceiver complies with the circuit board  
board to achieve optimum performance from these trans- “Common Transceiver Footprint” hole pattern defined in  
ceivers. Figure 7 provides a good example of a schematic the original multisource announcement which defined the  
for a power supply decoupling circuit that works well with 1x9 package style. This drawing is reproduced in Figure 8  
these parts. It is further recommended that a contiguous with the addition of ANSI Y14.5M compliant dimension-  
ground plane be provided in the circuit board directly ing to be used as a guide in the mechanical layout of your  
under the transceiver to provide a low inductance ground circuit board.  
for signal return current. This recommendation is in  
keeping with good high frequency board layout practices.  
1.9 0.1  
.075 .004  
φ
(2X)  
–A–  
20.32  
.ꢀ00  
M
φ0.000  
A
0.ꢀ 0.1  
.032 .004  
φ
20.32  
.ꢀ00  
(9X)  
M
φ0.000  
A
2.54  
.100  
(ꢀX)  
TOP VIEW  
Figure 8. Recommended board layout hole pattern.  
10  
Board Layout – Mechanical  
Electrostatic Discharge (ESD)  
For applications interested in providing a choice of either There are two design cases in which immunity to ESD  
a duplex SC or a duplex ST connector interface, while damage is important.  
utilizing the same pinout on the printed circuit board,  
The first case is during handling of the transceiver prior  
the ST port needs to protrude from the chassis panel a  
to mounting it on the circuit board. It is important to  
minimum of 9.53 nm for sufficient clearance to install the  
use normal ESD handling precautions for ESD sensitive  
ST connector.  
devices. These precautions include using grounded wrist  
Please refer to Figure 8a for a mechanical layout detailing straps, work benches, and floor mats in ESD controlled  
the recommended location of the duplex SC and duplex areas.  
ST transceiver packages in relation to the chassis panel.  
The second case to consider is static discharges to the  
For both shielded design options, Figures 8b and 8c exterior of the equipment chassis containing the trans-  
identify front panel aperture dimensions.  
ceiver parts. To the extent that the duplex SC connector is  
exposed to the outside of the equipment chassis it may be  
subject to whatever ESD system level test criteria that the  
equipment is intended to meet.  
Regulatory Compliance  
These transceiver products are intended to enable  
commercial system designers to develop equipment  
that complies with the various international regula-  
tions governing certification of Information Technol-  
ogy Equipment. See the Regulatory Compliance Table  
for details. Additional information is available from your  
Avago sales representative.  
42.0  
24.ꢀ  
9.53  
(NOTE 1)  
12.0  
0.51  
12.09  
25.4  
39.12  
11.1  
6.79  
0.75  
25.4  
Note 1: Minimum distance from front of  
connector to the panel face.  
Figure 8a. Recommended common mechanical layout for ST and ST 1x9 connectored transceivers.  
11  
0.ꢀ  
(0.032)  
2x  
0.ꢀ  
(0.032)  
2x  
+ 0.5  
– 0.25  
10.9  
+ 0.02  
– 0.01  
(
)
0.43  
6.35  
27.4 0.50  
(1.0ꢀ 0.02)  
9.4  
(0.374)  
(0.25)  
MODULE  
PROTRUSION  
Dimensions are in millimeters (inches).  
All dimensions are 0.025mm unless otherwise specified.  
PCB BOTTOM VIEW  
Figure 8b. Dimensions shown for mounting module with extended shield to panel.  
Electromagnetic Interference (EMI)  
Most equipment designs utilizing these high speed trans- In all well-designed chassis, the two 0.5" holes required  
ceivers from Avago will be required to meet the require- for ST connectors to protrude through, will provide  
ments of FCC in the United States, CENELEC EN55022 4.6 dB more shielding than one 1.2" duplex SC rect-  
(CISPR 22) in Europe and VCCI in Japan.  
angular cutout. Thus, in a well-designed chassis, the  
duplex ST 1x9 transceiver emissions will be identical to  
the duplex SC 1x9 transceiver emissions.  
These products are suitable for use in designs ranging  
from a desktop computer with a single transceiver to a  
concentrator or switch product with large number of  
transceivers.  
12  
200  
1ꢀ0  
160  
140  
120  
100  
5
4
3
2
1
0
3.0  
1.0  
1.5  
AFBR-5205Z SERIES  
2.0  
tr/f – TRANSMITTER  
OUTPUT OPTICAL  
RISE/FALL TIMES – ns  
2.5  
3.0  
1260  
12ꢀ0  
1300  
1320  
1340  
1360  
-3  
-2  
-1  
0
1
2
3
λC – TRANSMITTER OUTPUT OPTICAL  
EYE SAMPLING TIME POSITION (ns)  
CENTER WAVELENGTH –nm  
CONDITIONS:  
1. TA = 25°C  
2. VCC = 5 Vdc  
AFBR-5205Z TRANSMITTER TEST RESULTS OF λC, Δλ AND tr/f  
ARE CORRELATED AND COMPLY WITH THE ALLOWED SPECTRAL  
WIDTH AS A FUNCTION OF CENTER WAVELENGTH FOR VARIOUS  
RISE AND FALL TIMES.  
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
4. INPUT OPTICAL POWER IS NORMALIZED TO  
CENTER OF DATA SYMBOL.  
5. NOTE 16 AND 17 APPLY.  
Figure 9. Transmitter output optical spectral width (FWHM) vs. transmitter  
output optical center wavelength and rise/fall times.  
Figure 10. Relative input optical power vs. eye sampling time position.  
Regulatory Compliance Table  
Feature  
Test Method  
Performance  
Electrostatic Discharge  
(ESD) to the Electrical Pins  
MIL-STD-883C  
Method 3015.4  
Meets Class 2 (2000 to 3999 Volts)  
Withstand up to 2200 V applied between electrical pins.  
Electrostatic Discharge  
(ESD) to the Duplex SC  
Receptacle  
Variation of  
IEC 801-2  
Typically withstand at least 25 kV without damage  
when the Duplex SC Connector Receptacle  
is contacted by a Human Body Model probe.  
Electromagnetic  
Interference (EMI)  
FCC Class B  
Typically provide 13dB margin to the noted standards  
however, it should be noted that final margin depends  
on the customer's board and chasis design.  
CENELEC EN55022  
Class B (CISPR 22B)  
VCCI Class 2  
Immunity  
Variation of IEC 61000-4-3  
Typically show no measurable effect from a  
10 V/m field swept from 10 to 450 MHz applied  
to the transceiver when mounted to a circuit card  
without a chassis enclosure.  
13  
1.9ꢀ THICKER PANEL WILL RECESS MODULE.  
(0.07ꢀ) THINNER PANEL WILL PROTRUDE MODULE.  
1.27  
(0.05)  
OPTIONAL SEPTUM  
30.2  
(1.19)  
KEEP OUT ZONE  
0.36  
(0.014)  
10.ꢀ2  
(0.426)  
14.73  
(0.5ꢀ)  
13.ꢀ2  
(0.544)  
26.4  
(1.04)  
BOTTOM SIDE OF PCB  
12.0  
(0.47)  
Dimensions are in millimeters (inches).  
All dimensions are 0.025mm unless otherwise specified.  
Figure 8c. Dimensions shown for mounting module flush to panel.  
14  
Immunity  
Evaluation Kits  
Equipment utilizing these transceivers will be subject to Avago has available three evaluation kits for the 1x9  
radio-frequency electromagnetic fields in some environ- transceivers. The purpose of these kits is to provide the  
ments. These transceivers have a high immunity to such necessary materials to evaluate the performance of the  
fields.  
AFBR-520XZ family in a pre-existing 1x13 or 2x11 pinout  
system design configuration or when connectored to  
various test equipment.  
For additional information regarding EMI, susceptibility,  
ESD and conducted noise testing procedures and results  
on the 1x9 transceiver family, please refer to Applications 1. HFBR-0319 – Evaluation Test Fixture Board:  
Note 1075, Testing and Measuring Electromagnetic Com-  
patibility Performance of the AFBR-510XZ/-520XZ Fiber  
Optic Transceivers.  
This test fixture converts +5 V ECL 1x9 transceivers to  
–5 V ECL BNC Coax Connections so that direct con-  
nections to industry standard fiber optic test equip-  
ment can be accomplished.  
Transceiver Reliability and Performance  
Qualification Data  
Accessory Duplex SC Connectored Cable Assemblies  
Avago recommends for optimal coupling the use of  
flexible-body duplex SC connectored cable.  
The 1x9 transceivers have passed Avago reliability and  
performance qualification testing and are undergoing  
ongoing quality monitoring. Details are available from  
your Avago sales representative.  
Accessory Duplex ST Connectored Cable Assemblies  
Avago recommends the use of Duplex Push-Pull ST  
connectored cable for optimal repeatibility of the optical  
power coupling.  
These transceivers are manufactured at the Avago  
Singapore location which is an ISO 9002 certified facility.  
Applications Support Materials  
Contact your local Avago Component Field Sales Office  
for information on how to obtain Test Boards and demo  
boards for the 1x9 transceivers.  
15  
AFBR-5205Z Series  
Absolute Maximum Ratings  
Parameter  
Symbol  
TS  
Min.  
Typ.  
Max.  
100  
260  
10  
Unit  
°C  
Reference  
Storage Temperature  
Lead Soldering Temperature  
Lead Soldering Time  
Supply Voltage  
-40  
TSOLD  
tSOLD  
VCC  
°C  
sec.  
V
-0.5  
-0.5  
7.0  
VCC  
1.4  
50  
Data Input Voltage  
Differential Input Voltage  
Output Current  
V
I
V
VD  
IO  
V
Note 1  
mA  
AFBR-5205Z Series  
Recommended Operating Conditions  
Parameter  
Symbol  
TA  
Min.  
0
Typ.  
Max.  
70  
Unit  
°C  
V
Reference  
Ambient Operating Temperature*  
Supply Voltage  
VCC  
4.75  
-1.810  
-1.165  
5.25  
Data Input Voltage - Low  
Data Input Voltage - High  
Data and Signal Detect Output Load  
V - VCC  
IL  
-1.475  
-0.880  
V
V - VCC  
IH  
V
RL  
50  
Note 2  
*Applies to AFBR-5205Z Series except for AFBR-5205AZ and AFBR-5205ATZ. Ambient Operating Temp. for AFBR-5205AZ and AFBR-5205ATZ is  
Min. -40°C and Max. 85°C.  
AFBR-5205Z Series  
Transmitter Electrical Characteristics  
(T = 0°C to 70°C, V = 4.75 V to 5.25 V)*  
A
CC  
Parameter  
Symbol  
ICC  
Min.  
Typ.  
145  
0.76  
0
Max.  
185  
Unit  
mA  
W
Reference  
Supply Current  
Power Dissipation  
Note 3  
PDISS  
IIL  
0.97  
Data Input Current - Low  
Data Input Current - High  
-350  
A  
A  
IIH  
14  
350  
*Applies to AFBR-5205Z Series except for AFBR-5205AZ and AFBR-5205ATZ. TA for AFBR-5205AZ and AFBR-5205ATZ is -40°C and 85°C.  
16  
AFBR-5205Z Series  
Receiver Electrical Characteristics  
(T = 0°C to 70°C, V = 4.75 V to 5.25 V)*  
A
CC  
Parameter  
Symbol  
ICC  
Min.  
Typ.  
82  
Max.  
145  
0.5  
Unit  
mA  
W
V
Reference  
Note 4  
Note 5  
Note 6  
Note 6  
Note 7  
Note 7  
Note 6  
Note 6  
Note 7  
Note 7  
Supply Current  
Power Dissipation  
PDISS  
0.3  
Data Output Voltage - Low  
Data Output Voltage - High  
Data Output Rise Time  
VOL - VCC  
-1.83  
-1.085  
0.35  
-1.55  
-0.88  
2.2  
VOH - VCC  
V
tr  
tf  
ns  
ns  
V
Data Output Fall Time  
0.35  
2.2  
Signal Detect Output Voltage - Low  
Signal Detect Output Voltage - High  
Signal Detect Output Rise Time  
Signal Detect Output Fall Time  
VOL - VCC  
-1.83  
-1.085  
0.35  
-1.55  
-0.88  
2.2  
V
tr  
tf  
OH - VCC  
V
ns  
ns  
0.35  
2.2  
*Applies to AFBR-5205Z Series except for AFBR-5205AZ and AFBR-5205ATZ. TA for AFBR-5205AZ and AFBR-5205ATZ is -40°C and 85°C.  
AFBR-5205Z/-5205AZ/-5205ATZ/-5205PZ/-5205TZ/-5205PEZ  
Transmitter Optical Characteristics  
(T = 0°C to 70°C, V = 4.75 V to 5.25 V)*  
A
CC  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Output Optical Power  
62.5/125 μm, NA = 0.275 Fiber  
BOL  
EOL  
PO  
-19  
-20  
-14  
dBm avg. Note 8  
Output Optical Power  
50/125 m, NA = 0.20 Fiber  
BOL  
EOL  
PO  
-22.5  
-23.5  
-14  
dBm avg. Note 8  
Optical Extinction Ratio  
10  
dB  
Note 9  
Output Optical Power at  
Logic "0" State  
PO ("0")  
-45  
dBm avg. Note 10  
Center Wavelength  
C  
  
tr  
1270  
1310  
1380  
nm  
Note 23  
Figure 9  
Spectral Width – FWHM  
– nm RMS  
137  
58  
nm  
nm RMS  
Note 11, 23  
Figure 9  
Optical Rise Time  
0.6  
0.6  
1.0  
2.1  
0.04  
0
3.0  
ns  
Note 12, 23  
Figure 9  
Optical Fall Time  
tf  
3.0  
ns  
Note 12, 23  
Figure 9  
Systematic Jitter Contributed  
by the Transmitter  
SJ  
RJ  
1.2  
ns p-p  
ns p-p  
Note 13  
Random Jitter Contributed  
by the Transmitter  
0.52  
Note 14  
*Applies to 5205Z Series except for AFBR-5205AZ/-5205ATZ. TA for AFBR-5205AZ/-5205ATZ is -40°C and 85°C.  
17  
AFBR-5205Z/-5205AZ/-5205ATZ/-5205PZ/-5205TZ/-5205PEZ  
Receiver Optical and Electrical Characteristics  
(T = 0°C to 70°C, V = 4.75 V to 5.25 V)*  
A
CC  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Input Optical Power  
Minimum at Window Edge  
PIN Min. (W)  
-30  
dBm avg. Note 15  
Figure 10  
Input Optical Power  
Minimum at Eye Center  
PIN Min. (C)  
-31  
dBm avg. Note 16  
Figure 10  
Input Optical Power Maximum  
Operating Wavelength  
PIN Max.  
-14  
dBm avg. Note 15  
nm  
1270  
1380  
1.2  
Systematic Jitter Contributed  
by the Receiver  
SJ  
0.2  
1
ns p-p  
Note 17  
Random Jitter Contributed  
by the Receiver  
RJ  
1.91  
-31  
ns p-p  
Note 18  
Signal Detect - Asserted  
Signal Detect - Deasserted  
Signal Detect - Hysteresis  
P
A
PD + 1.5 dB  
dBm avg. Note 19  
dBm avg. Note 20  
dB  
PD  
-45  
1.5  
0
P - PD  
A
Signal Detect Assert Time  
(off to on)  
55  
100  
130  
350  
s  
s  
s  
Note 21  
Note 21  
Note 22  
Signal Detect Assert Time  
(off to on) for -40°C to 0°C  
Max  
0
0
55  
Signal Detect Deassert Time  
(on to o)  
110  
*Applies to 5205Z Series except for AFBR-5205AZ. T for AFBR-5205AZ is -40°C to 85°C.  
A
Notes:  
1. This is the maximum voltage that can be applied across the Differential Transmitter Data Inputs to prevent damage to the input ESD protection  
circuit.  
2. The outputs are terminated with 50connected to V -2 V.  
CC  
3. The power supply current needed to operate the transmitter is provided to differential ECL circuitry. This circuitry maintains a nearly constant  
current flow from the power supply. Constant current operation helps to prevent unwanted electrical noise from being generated and conducted  
or emitted to neighboring circuitry.  
4. This value is measured with the outputs terminated into 50connected to V -2 V and an Input Optical Power level of -14 dBm average.  
CC  
5. The power dissipation value is the power dissipated in the receiver itself. Power dissipation is calculated as the sum of the products of supply  
voltage and currents, minus the sum of the products of the output voltages and currents.  
6. This value is measured with respect to V with the output terminated into 50 connected to V -2 V.  
CC  
CC  
7. The output rise and fall times are measured between 20% and 80% levels with the output connected to V -2 V through 50 .  
CC  
8. These optical power values are measured with the following conditions:  
The Beginning of Life (BOL) to the End of Life (EOL) optical power degradation is typically 1.5dB per the industry convention for long wavelength  
LEDs. The actual degradation observed in Avago’s 1300 nm LED products is <1 dB, as specified in this datasheet.  
Over the specified operating voltage and temperature ranges.  
With 25 MBd (12.5 MHz square-wave) input signal.  
At the end of one meter of noted optical fiber with cladding modes removed. The average power value can be converted to a peak power value  
by adding 3 dB. Higher output optical power transmitters are available on special request.  
9. The Extinction Ratio is a measure of the modulation depth of the optical signal. The data1peak output optical power is compared to the data0”  
output optical power and expressed in decibels. With the transmitter driven by a 25 MBd (12.5 MHz square-wave) input signal, the average optical  
power is measured. The data “1” peak power is then calculated by adding 3dB to the measured average optical power. The data “0output optical  
power is found by measuring the optical power when the transmitter is driven by a logic “0” input. The extinction ratio is the ratio of the optical  
power at the “1level compared to the optical power at the “0level expressed in decibels.  
10. The transmitter will provide this low level of Output Optical Power when driven by a logic “0input. This can be useful in link trouble-shooting.  
11. The relationship between Full Width Half Maximum and RMS values for Spectral Width is derived from the assumption of a Gaussian shaped  
spectrum which results in a 2.35 X RMS = FWHM relationship.  
12. The optical rise and fall times are measured from 10% to 90% when the transmitter is driven by a 25 MBd (12.5 MHz square-wave) input signal.  
The ANSI T1E1.2 committee has designated the possibility of defining an eye pattern mask for the transmitter optical output as an item for further  
study. Avago will incorporate this requirement into the specifications for these products if it is defined. The AFBR-5205Z products typically comply  
with the template requirements of CCITT (now ITU-T) G.957 Section 3.2.5, Figure 2 for the STM-1 rate, excluding the optical receiver filter normally  
associated with single mode fiber measurements which is the likely source for the ANSI T1E1.2 committee to follow in this matter.  
13. Systematic Jitter contributed by the transmitter is defined as the combination of Duty Cycle Distortion and Data Dependent Jitter.  
7
Systematic Jitter is measured at 50% threshold using a 155.52 MBd (77.5 MHz square-wave), 2 - 1 psuedorandom data pattern input signal.  
14. Random Jitter contributed by the transmitter is specified with a 155.52 MBd (77.5 MHz square-wave) input signal.  
18  
15. This specification is intended to indicate the performance of the receiver section of the transceiver when Input Optical Power signal characteristics  
are present per the following definitions. The Input Optical Power dynamic range from the minimum level (with a window time-width) to the  
maximum level is the range over which the receiver is guaranteed to provide output data with a Bit Error Ratio (BER) better than or equal to 1 x  
-10  
10  
.
At the Beginning of Life (BOL)  
Over the specified operating temperature and voltage ranges  
Input is a 155.52 MBd, 223 - 1 PRBS data pattern with 72 “1”s and 72 “0”s inserted per the CCITT (now ITU-T)  
recommendation G.958 Appendix I.  
Receiver data window time-width is 1.23 ns or greater for the clock recovery circuit to operate in. The actual test data window time-width is set  
to simulate the effect of worst case optical input jitter based on the transmitter jitter values from the specification tables. The test window time-  
width is as follows: HFBR-5205 is 3.32 ns.  
Transmitter operating with a 155.52 MBd, 77.5 MHz square-wave, input signal to simulate any cross-talk present between the transmitter and  
receiver sections of the transceiver.  
16. All conditions of Note 15 apply except that the measurement is made at the center of the symbol with no window time-width.  
17. Systematic Jitter contributed by the receiver is defined as the combination of Duty Cycle Distortion and Data Dependent Jitter. Systematic  
7
Jitter is measured at 50% threshold using a 155.52 MBd (77.5 MHz square-wave), 2 - 1 psuedo-random data pattern input signal.  
18. Random Jitter contributed by the receiver is specified with a 155.52 MBd (77.5 MHz square-wave) input signal.  
19. This value is measured during the transition from low to high levels of input optical power.  
20. This value is measured during the transition from high to low levels of input optical power.  
21. The Signal Detect output shall be asserted within 100 μs after a step increase of the Input Optical Power (130 s for -40°C to 0°C).  
22. Signal detect output shall be de-asserted within 350 μs after a step decrease in the Input Optical Power.  
23. The AFBR-5205Z transceiver complies with the requirements for the tradeoffs between center wave-length, spectral width, and rise/fall times  
shown in Figure 9. This figure is derived from the FDDI PMD standard (ISO/IEC 9314-3 : 1990 and ANSI X3.166 - 1990) per the description in ANSI  
T1E1.2 Revision 3. The interpretation of this figure is that values of Center Wavelength and Spectral Width must lie along the appropriate Optical  
Rise/Fall Time curve.  
Ordering Information  
The following 1300 nm transceivers are available for production orders through the Avago Component Field Sales  
Offices and Authorized Distributors world wide.  
1300nm LED, ATM/SONET OC-3, 155MBd  
temperature range 0°C to +70°C  
1300nm LED, 155MBd  
temperature range -40°C to +85°C  
AFBR-5205Z  
AFBR-5205TZ  
AFBR-5205PZ  
DUPLEX SC Connector 1X9, 2KM  
AFBR-5205AZ ATM/SONET  
Connector 1X9  
OC-3  
DUPLEX  
SC  
Duplex ST Connector 1X9  
AFBR-5205ATZ ATM/SONET OC-3 DUPLEX ST  
Connector 1X9  
Duplex SC Connector 1x9,  
Mezzanine Height  
AFBR-5205PEZ Duplex SC Connector 1x9,  
Mezzanine Height with Extended Shield  
*For flush shield options, please contact Field Sales Offices and Authorized Distributors world wide.  
For product information and a complete list of distributors, please go to our web site: www.avagotech.com  
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.  
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes 5989-2296EN  
AV02-3673EN - June 22, 2012  

相关型号:

AFBR-5205AZ

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style
BOARDCOM

AFBR-5205PEZ

Multimode fi ber ATM backbone links
AVAGO

AFBR-5205PEZ

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style
BOARDCOM

AFBR-5205PZ

Multimode fi ber ATM backbone links
AVAGO

AFBR-5205PZ

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style
BOARDCOM

AFBR-5205TZ

Multimode fi ber ATM backbone links
AVAGO

AFBR-5205TZ

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style
BOARDCOM

AFBR-5205Z

Multimode fi ber ATM backbone links
AVAGO

AFBR-5205Z

ATM Multimode Fiber Transceivers for SONET OC-3/SDH STM-1 in Low Cost 1x9 Package Style
BOARDCOM

AFBR-53D3EZ

RoHS Compliant 850 nm VCSEL 1x9 Fiber Optic Transceivers for Fibre Channel
AVAGO

AFBR-53D3FZ

RoHS Compliant 850 nm VCSEL 1x9 Fiber Optic Transceivers for Fibre Channel
AVAGO

AFBR-53D3Z

RoHS Compliant 850 nm VCSEL 1x9 Fiber Optic Transceivers for Fibre Channel
AVAGO