J113 [CALOGIC]
N-Channel JFET Switch; N沟道JFET开关
| 型号： | J113 |
| 厂家： | 
CALOGIC, LLC |
| 描述： | N-Channel JFET Switch |
| 文件： | 总1页 (文件大小：25K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
N-Channel JFET Switch
CORPORATION
J111 - J113 / SST111 – SST113
FEATURES
APPLICATIONS
Low Cost
Automated Insertion Package
Low Insertion Loss
No Offset or Error Voltage Generated By Closed Switch
Analog Switches
Choppers
Commutators
•
•
•
•
•
•
•
ABSOLUTE MAXIMUM RATINGS
Purely Resistive
High Isolation Resistance From Driver
Fast Switching
-
(TA = 25oC unless otherwise specified)
-
Gate-Drain or Gate-Source Voltage . . . . . . . . . . . . . . . . -35V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50mA
Storage Temperature Range . . . . . . . . . . . . . -55oC to +150oC
Operating Temperature Range . . . . . . . . . . . -55oC to +135oC
Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . 360mW
Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . 3.3mW/oC
NOTE: Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
•
Short Sample and Hold Aperture Time
•
PIN CONFIGURATION
SOT-23
G
TO-92
D
ORDERING INFORMATION
S
Part
Package
Temperature Range
J111-113
Plastic SOT-23
-55oC to +135oC
-55oC to +135oC
PRODUCT MARKING (SOT-23)
SST111-113 Plastic SOT-23
G
S
D
For Sorted Chips in Carriers see 2N4391 series.
SST111
SST112
SST113
111
112
113
5001
ELECTRICAL CHARACTERISTICS (TA = 25oC unless otherwise specified)
111
112
113
SYMBOL
PARAMETER
UNITS
nA
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
IGSSR
VGS(off)
BVGSS
IDSS
Gate Reverse Current (Note 1)
Gate Source Cutoff Voltage
-1
-1
-5
-1
-3
VDS = 0V, VGS = -15V
VDS = 5V, ID = 1µA
VDS = 0V, IG = -1µA
VDS = 15V, VGS = 0V
VDS = 5V, VGS = -10V
VDS = 0.1V, VGS = 0V
-3
-35
20
-10
-1
-35
5
-0.5
-35
2
V
Gate Source Breakdown Voltage
Drain Saturation Current (Note 2)
Drain Cutoff Current (Note 1)
Drain Source ON Resistance
Drain Gate OFF Capacitance
mA
nA
Ω
ID(off)
1
30
5
1
50
5
1
100
5
rDS(on)
Cdg(off)
Csg(off)
Cdg(on)
VDS = 0,
VGS = -10V
Source Gate OFF Capacitance
5
5
5
(Note 3)
DS = VGS = 0
(Note 3)
pF
f = 1MHz
Drain Gate Plus Source Gate ON
V
28
28
28
+ Csg(on) Capacitance
td(on) Turn On Delay Time
tr
7
6
7
6
7
6
Switching Time Test
Conditions (Note 3)
Rise Time
J111
10V
J112
10V
-7V
J113
10V
-5V
ns
td(off)
Turn Off Delay Time
20
20
20
VDD
V
RL
GS(off)-12V
tf
Fall Time
15
15
15
0.8kΩ 1.6kΩ 3.2kΩ
NOTES: 1. Approximately doubles for every 10oC increase in TA.
2. Pulse test duration 300µs; duty cycle ≤3%.
3. For design reference only, not 100% tested.
CALOGIC CORPORATION, 237 Whitney Place, Fremont, California 94539, Telephone: 510-656-2900, FAX: 510-651-1076
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