SSTSD201 [CALOGIC]
High-Speed Analog N-Channel Enhancement-Mode DMOS FETS; 高速模拟N沟道增强型场效应管的DMOS
| 型号： | SSTSD201 |
| 厂家： | 
CALOGIC, LLC |
| 描述： | High-Speed Analog N-Channel Enhancement-Mode DMOS FETS |
| 文件： | 总2页 (文件大小：33K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High-Speed Analog
N-Channel Enhancement-Mode
DMOS FETS
CORPORATION
SD200 / SD201 / SD202 / SD203 / SSTSD201 / SSTSD203
FEATURES
DESCRIPTION
High gain . . . . . . . . . . . . . . . . . . . . . 8.0 dB min @ 1 GHz
Low Noise. . . . . . . . . . . . . . . . . . . . . 5.0 dB max @ 1 GHz
(SD202, SD203, SSTSD203)
The SD200 series is manufactured utilizing Calogic’s
proprietary DMOS design and processing techniques. The
device is designed to operate well through 1 GHz while
maintaining excellent frequency response, power gain, and
low noise. The DMOS structure is an inherently low
capacitance and very high speed design resulting in a device
that bridges JFETS and GaAs products in performance
characteristics.
•
•
Low Interelectrode Capacitances
APPLICATIONS
High Gain VHF/UHF Amplifiers
Oscillators
Mixers
•
•
•
ORDERING INFORMATION
Part
Package
Temperature Range
SD200DC
SD201DC
SD202DC
SD203DC
SSTSD201
SSTSD203
XSD200
XSD201
XSD202
XSD203
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
4 Lead TO-52 Package
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
-55oC to +125oC
Surface Mount SOT-143 -55oC to +125oC
Surface Mount SOT-143 -55oC to +125oC
Sorted Chips in Carriers -55oC to +125oC
Sorted Chips in Carriers -55oC to +125oC
Sorted Chips in Carriers -55oC to +125oC
Sorted Chips in Carriers -55oC to +125oC
PIN CONFIGURATION
SCHEMATIC DIAGRAM
(2)
DRAIN
(4)
CASE, BODY
CD10-1 SD201, SD203, zener protected
CD10-2 SD202, SD204, non-zener
(3)
GATE
CASE, B
G
S
D
(1)
SOURCE
GATE (3)
BODY INTERNALLY CONNECTED TO CASE.
DIODE PROTECTION ON SD201/SD203 ONLY.
DRAIN (2)
PART MARKINGS (SOT-143)
P/N
MARKING
201
SSTSD201
SSTSD203
BODY (4)
SOT-143
203
SOURCE (1)
SD200 / SD201 / SD202 / SD203 / SSTSD201 / SSTSD203
CORPORATION
ABSOLUTE MAXIMUM RATING (TA = +25oC unless otherwise noted)
ID
PT
Continuous Drain Current . . . . . . . . . . . . . . . . . . 50 mA
Power Dissipation (at or below TC = +25oC) . . . . 1.8 W
Linear Derating Factor . . . . . . . . . . . . . . . . . 18 mW/ oC
PARAMETER
Breakdown
Voltages
SD200 SD201 SD202 SD203 UNIT
PD Power Dissipation (at or below TA = +25C). . . 360 mW
Linear Derating Factor . . . . . . . . . . . . . . . . . 3.6 mW/ oC
VDS
VDB
VGS
+25
+25
±40
+25
+25
-0.3
+20
-0.3
+20
-0.3
+20
+20
+20
±40
+20
+20
-0.3
+20
-0.3
+20
-0.3
+20
V
V
V
V
V
V
V
V
Tj
Operating Junction
Temperature Range . . . . . . . . . . . . . . -55oC to + 125oC
Storage Temperature Range . . . . . . . . -65oC to +175oC
Ts
VGB
VGD
±40
±40
±40
±40
ELECTRICAL CHARACTERISTICS (TA = +25oC unless otherwise noted)
200, 201
202, 203
SYMBOL
PARAMETER
UNIT
TEST CONDITIONS
MIN TYP MAX MIN
TYP
MAX
STATIC
BVDS
Drain-Source Breakdown Voltage
Drain-Body Breakdown Voltage
25
25
30
20
20
25
V
V
ID = 1.0µA, VGS = VBS = 0
I
D = 1.0µA, VGB = 0
BVDB
Source OPEN
1.0
±0.1
1.0
V
DS = 25 V
DS = 20 V
Drain-Source
OFF Current
ID(OFF)
µA
nA
µA
VGS = VBS = 0
1.0
V
IGBS
SD200
VGV = ±40 V
Gate-Body
SD202
±0.1
Leakage
VDB = VSB = 0
Current
SD201
VGB = 20 V
SD203
Gate Threshold Voltage
Drain-Source ON Resistance
1.0
2.0
50
VGS(th
)
0.1
13
1.0
40
2.0
70
0.1
17
1.0
35
V
VDS = VGS, ID = 1µA, VSB = 0
rDS(ON)
ohms
VGS = 5 V, ID = 1 mA, VSB = 0
DYNAMIC
Common-Source Forward
Transcondconductance
ID = 20 mA, VDS = 15 V
f = 1 KHz, VSB = 0
gfs
14
20
mS
pF
ciss
Common-Source Input Capacitance
Common-Source Output Capacitance
2.4
1.0
3.0
1.2
3.0
1.0
3.6
1.2
ID = 20 mA
V
DS = 15 V
f = 1 MHz
coss
VSB = 0
VGS = 0
Common-Source
Reverse Transfer Capacitance
crss
0.2
0.3
0.2
0.3
Gps
NF
Pi
Common-Source Power Gain
Noise Figure
8.0
10
4.5
29
8.0
10
4.0
29
V
DS = 15 V
dB
f = 1 GHz
ID = 20 mA
6.0
5.0
VSB = 0
Intercept Point
dBm
∆f = 2 MHz
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