CAT1232LPP [CATALYST]
1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDIP8, 0.300 INCH, DIP-8;
| 型号： | CAT1232LPP |
| 厂家： | 
CATALYST SEMICONDUCTOR |
| 描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDIP8, 0.300 INCH, DIP-8 光电二极管 |
| 文件： | 总9页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CAT1232LP/CAT1832
5V and 3.3V Supply Monitor, Watchdog Timer,
Manual Reset, with Active High & Low Resets
FEATURES
DESCRIPTION
ꢀ Selectable reset voltage tolerance
— CAT1232LP for 5V supply
— CAT1832 for 3.3V supply
The CAT1232LP and CAT1832 microprocessor
supervisors can halt and restart a “hung-up” or “stalled”
microprocessor, restart a microprocessor after a power
failure, and debounce a manual/push-button micro-
processor reset switch. The devices are drop in
replacements for the Maxim/Dallas Semiconductor
DS1232LP and DS1832 supervisors
ꢀ Selectable watchdog period:
150ms, 600ms or 1.2 sec
ꢀ Two reset outputs
Precision reference and comparator circuits monitor the
5V or 3.3V system power supply voltage, VCC. During
power-up or when the power supply falls outside
selectabletolerancelimits, boththeRESETandRESET
become active. After the power supply voltage rises
above the RESET threshold voltage, the reset signals
remain active for a minimum of 250ms, allowing the
power supply and system processor to stabilize. The
trip-point tolerance input, TOL, selects the trip level
tolerance to be either 5% or 10% for the CAT1232LP 5V
supply and 10% or 20% for the CAT1832 3.3V supply.
— Active high, push-pull reset output
— Active low, open-drain reset output
(CAT1232LP)
— Active low, push-pull reset output (CAT1832)
ꢀ Debounced manual push-button reset
ꢀ Compact SOIC and MSOP packages
APPLICATIONS
ꢀ Microprocessor Systems
ꢀ Portable Equipment
ꢀ Controllers
Each device has a push-pull, active HIGH reset output.
The CAT1232LP also has an open drain, active LOW
reset output while the CAT1832 also has a push-pull,
active LOW reset output.
ꢀ Single Board Computers
ꢀ Instrumentations
A debounced manual reset input activates the reset
outputs and holds them active for a minimum period of
250ms after being released.
ꢀ Telecommunications
Also included is a watchdog timer to reset a
microprocessor that has stopped due to a software or
hardware failure. Three watchdog time-out periods are
selectable: 150ms, 600ms and 1.2sec. If the ST input is
not strobed low before the watchdog time out period
expires, the reset signals become active for a minimum
of 250ms.
FUNCTIONAL DIAGRAM
VCC
(CAT1232LP)
RESET
TOL
Tolerance Selection
Reference
+
VCC
–
40kΩ
RESET
RESET
PBRST
TD
Push Button Debounce
Watchdog Timebase Selection
Watchdog Transition Detector
Reset &
Watchdog Timer
(CAT1832)
ST
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
1
CAT1232LP/CAT1832
ORDERING INFORMATION
Solder Plate Lead
Finish
Green Sn Lead
Finish
Green NiPdAu Lead
Finish
Ordering Part
Number
Ordering Part
Number
Ordering Part
Number
Parts per Parts Per Reel Size
Package
8-lead, DIP
16-lead, SOIC
8-lead, SOIC
MSOP
Tube
Reel
(inch)
CAT1232LPP
CAT1232LPJ
CAT1232LPL
CAT1232LPW
CAT1232LPL-G
CAT1232LPW-G
CAT1232LPV-G
CAT1232LPZ-G
CAT1232LPW-GT2
CAT1232LPV-GT2
50
—
—
47
—
—
CAT1232LPS
CAT1232LPV
100
100
—
—
—
CAT1232LPR
CAT1232LPZ
—
—
CAT1232LPJ-T13
CAT1232LPS-T13
CAT1232LPR-T13
CAT1232LPW-T13
CAT1232LPV-T13
16-lead, SOIC
8-lead, SOIC
MSOP
2,000
2,000
2,500
13
—
13
CAT1232LPZ-T13 CAT1232LPGZ-GT25
—
13
CAT1832P
CAT1832S
CAT1832L
CAT1832V
CAT1832L-G
CAT1832W-G
CAT1832Z-G
8-lead, DIP
8-lead, SOIC
MSOP
50
100
100
—
—
—
—
—
—
13
13
CAT1832R
CAT1832Z
—
CAT1832S-T13
CAT1832R-T13
CAT1832V-T13
CAT1832Z-T13
CAT1832W-GT2
CAT1832Z-GT25
8-lead, SOIC
MSOP
2,000
2,500
—
The “-G” NiPdAu Lead Finish is only available on the Green packager versions of this device.
PIN CONFIGURATION
16-Lead SOIC
8-Lead SOIC/MSOP/DIP
PBRST
TD
1
2
3
4
8
7
6
5
V
CC
NC
PBRST
NC
1
2
3
4
5
6
7
8
16 NC
ST
15 V
CC
TOL
RESET
RESET
14 NC
GND
TD
13 ST
NC
12 NC
TOL
NC
11 RESET
10 NC
GND
9 RESET
PIN DESCRIPTION
Pin Number
Pin Number
8-Lead Package 16-Lead Package
Name
PBRST
TD
Function
1
2
2
4
Debounced manual pushbutton reset input
Watchdog typical time delay selection:
a) tTD = 150ms for TD = GND
b) tTD = 600ms for TD = Open
c) tTD = 1200ms for TD = VCC
3
6
TOL
CAT1232LP TOL selects 5% (TOL = GND) or 10% (TOL = VCC) trip
point tolerance. CAT1832 TOL selects 10% (TOL = GND) or 20% TOL =
VCC) trip point tolerance.
4
5
8
9
GND
Ground
RESET Active HIGH reset output. RESET is active
1. If VCC falls below the reset voltage trip point
2. If PBRST is low
3. If ST is not strobed low before the timeout period set by TD expires.
4. During power-up.
6
7
8
11
13
15
Active LOW reset output. (See RESET)
Strobe Input
RESET
ST
VCC
Power Supply
1, 3. 5, 7, 10, 12,
14, 16
NC
No internal connection
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
2
CAT1232LP/CAT1832
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC ....................................... -0.5V to 7.0V
Maximum Junction Temperature ...................... 125°C
Storage Temperature Range ............ -65°C to +150°C
Lead Soldering Temperature (10 sec).............. 300°C
Operating Temperature Range........... -40°C to +85°C
Voltage on ST and TD ................. -0.5V to VCC + 0.5V
Voltage on PBRST, RESET
and RESET ............................ -0.5V to VCC + 0.5V
ELECTRICAL CHARACTERISTICS
Unless otherwise stated, 1.0V ≤ V
≤ 5.5V and over the operating temperature range of -40°C to +85°C. All
CC
voltages are referenced to ground.
Symbol Parameter
Conditions
CC = 5.5V, CAT1232LP
Min
Typ
Max
5.5
50
Units
VCC
Supply Voltage
1.0
V
V
35
20
ICC1
Supply Current
µA
V
VCC = 3.6V, CAT1832
(5)
35
2
VIH
VIL
VCC + 0.3V
0.8
ST and PBRST Input High Level
ST and PBRST Input Low Level
(6)
VCC - 0.4V
– 0.3
V
CC = 5.5V, CAT1232LP
CC = 3.6V, CAT1832
V
V
0.5
VCCTP VCC Trip Point (TOL = GND)
VCCTP VCC Trip Point (TOL = VCC
VCCTP VCC Trip Point (TOL = GND)
VCCTP VCC Trip Point (TOL = VCC
tTD Watchdog Time-Out Period
tTD
CAT1232LP
CAT1232LP
4.50
4.25
4.62
4.37
4.74
4.49
V
V
)
CAT1832
CAT1832
2.80
2.47
2.88
2.55
2.97
2.64
V
V
)
TD = GND
TD = VCC
62.5
500
250
150
1200
600
250
2000
1000
ms
ms
ms
V
Watchdog Time-Out Period
Watchdog Time-Out Period
Output Voltage
tTD
TD floating
I = – 500µA(3)
VOH
VCC - 0.5V VCC - 0.1V
IOH
IOL
Output Current
Output Current
Output = 2.4V(2)
– 350
µA
Output = 0.4V,
10
mA
(1)
IIL
Input Leakage
– 1.0
1.0
55
µA
(1)
RPU
Internal Pull-Up Resistor
32
40
kΩ
CIN
Input Capacitance
Output Capacitance
5
7
pF
COUT
tPB
pF
20
ms
PBRST Manual Reset
PBRST = VIL
Minimum Low Time
tRST
Reset Active Time
250
20
600
5
1000
8
ms
(4)
tST
ns
µs
ST Pulse Width
tRPD
VCC Fail Detect to
RESET or RESET
tF
VCC Slew Rate
20
µs
tPDLY
20
ms
PBRST Stable LOW to
RESET and RESET Active
tRPU
VCC Detect to RESET or
RESET Inactive
tRISE = 5µs
250
0
600
1000
ms
ns
tR
VCC Slew Rate
4.25V to 4.75V
Notes:
(1) PBRST is internally pulled HIGH to V through a nominal 40kΩ
(4) Must not exceed the minimum watchdog time-out period (t ).
CC
TD
resistor (R ).
The watchdog circuit cannot be disabled. To avoid a reset, ST
PU
must be strobed.
(2) RESET is an open drain output on the CAT1232LP.
(5) Measured with V ≥ 2.7V.
CC
(3) RESET remains within 0.5V of V on power-down until V falls
CC
CC
below 2V. RESET remains within 0.5V of ground on power-down
(6) Measured with V < 2.7V.
CC
until V falls below 2.0V.
CC
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
3
CAT1232LP/CAT1832
TYPICAL CHARACTERISTICS
For the CAT1232LP, VCC = 5V and TAMB = 25°C unless otherwise stated.
Threshold Voltage vs. Temperature (10% TOL)
Threshold Voltage vs. Temperature (5% TOL)
4.630
4.625
4.620
4.615
4.610
4.450
4.445
TOL = GND (5%)
TOL = Vcc (10%)
4.440
4.435
4.430
-50
0
50
100
-50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Supply Current vs. Temperature
Reset Active Time vs. Temperature
40
800
Vcc = 5.5V
30
TD = open
700
600
500
400
300
Vcc = 5.5V
Vcc = 4.5V
20
Vcc = 4.5V
10
0
-50
0
50
100
-50
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
Reset Active Time Waveform
Transient Response
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
4
CAT1232LP/CAT1832
APPLICATION INFORMATION
Connecting TOL to VCC makes the VCC trip threshold
4.37V for the CAT1232LP and 2.55V for the CAT1832.
SUPPLY VOLTAGE MONITOR
After VCC has risen above the trip point set by TOL,
RESET and RESET remain active for a minimum time
period of 250ms.
Reset Signal Polarity and Output Stage Structure
RESET is an active LOW signal. It is developed with an
open drain driver in the CAT1232LP. A pull-up resistor
is required, typical values are 10kΩ to 50kΩ. The
CAT1832 uses a CMOS push-pull output stage for the
RESET.
Onpower-down,onceVCC fallsbelowtheresetthreshold
theRESEToutputswillremainactiveandareguaranteed
valid down to a VCC level of 1.0V.
RESET is an active High signal developed by a CMOS
push-pull output stage and is the logical opposite to
RESET.
Tolerance
Select
Voltage
Trip Point Voltage (V)
Trip Point
Tolerance
MIN
NOMINAL
MAX
Trip Point Tolerance Selection
CAT1232LP
TOL = VCC
10 %
5 %
4.25
4.50
2.47
2.80
4.37
4.49
4.74
2.64
2.97
The TOL input is used to select the VCC trip point
threshold. This selection is made connecting the TOL
input to ground or VCC. Connecting TOL to Ground
makes the VCC trip threshold 4.62V for the CAT1232LP
and 2.88V for the CAT1832.
CAT1232LP
TOL = GND
4.62
2.55
2.88
CAT1832
TOL = VCC
20 %
10 %
CAT1832
TOL = GND
tF
tR
VCC
VCCTP(MAX)
VCCTP
VCCTP(MAX)
VCCTP
VCCTP(MIN)
VCCTP(MIN)
VCC
tRPU
RESET
tRPD
RESET
VOH
VOH
VOL
VOL
RESET
RESET
Figure 1. Timing Diagram: Power Up
Figure 2. Timing Diagram: Power Down
Manual Reset Operation
Push-button input, PBRST, allows the user to issue
reset signals. The pushbutton input is debounced and is
pulled high through an internal 40kΩ resistor.
No external pull-up resistor is required, since PBRST is
pulled high by an internal 40kΩ resistor.
PBRST can be driven from a TTL or CMOS logic line or
When PBRST is held low for the minimum time of 20 ms,
both resets become active and remain active for a
minimum time period of 250ms after PBRST returns
high.
short-ed to ground with a mechanical switch.
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
5
CAT1232LP/CAT1832
WATCHDOG TIMER AND ST INPUT
A watchdog timer stops and restarts a microprocessor
that has stopped proper operation or become “hung”.
The watchdog performs this function by monitoring the
ST input. After the reset outputs go inactive the ST input
must be strobed with a high-to-low signal transition prior
totheminimumwatchdogtimeoutperiod. Howeverifthe
ST input is not strobed with a high-to-low signal transi-
tion prior to a watchdog timeout the reset outputs will
become active for TRST reseting and restarting the
microprocessor. Once the resets return to the inactive
state the watchdog timer restarts the process.
Watchdog Time-out Period (ms)
TD Voltage
Level
MIN
NOMINAL
150
MAX
GND
Floating
VCC
62.5
250
500
250
1000
2000
600
1200
3.3V
CAT1832
8
7
6
5
1
The TD input allows the user to select from three
predetermined watchdog timeout periods. Always use
the minimum timeout period to determine the required
frequency of ST high-to-low transitions and the maxi-
mum to determine the time prior to the reset outputs
becoming active. ST pulse widths must be 20ns or
greater.
PBRST
TD
V
CC
ST
2
3
4
I/O
µP
TOL
RESET
GND RESET
RESET
The watchdog timer cannot be disabled. It must be
strobed with a high-to-low signal transition to avoid a
watchdog timeout and subsequent reset.
Figure 4. CAT1832 Application Circuit:
Pushbutton Reset
5V
CAT1232LP
8
7
6
5
1
2
3
4
MREQ
PBRST
TD
V
CC
ST
10k
µP
RESET
Address
Bus
Decoder
TOL
RESET
GND RESET
Figure 5. CAT1232LP Application Circuit: Watchdog Timer
tPB
Valid
Strobe
Valid
Strobe
Invalid
Strobe
PBRST
tPDLY
V
ST
IH
V
IL
tST
tTD
tRST
tTD
tRST
(Min)
(Min)
RESET
RESET
RESET
RESET
VOH
VOL
Note:ST is ignored whenever a reset is active.
Figure 6. Timing Diagram: Pushbutton Reset
Figure 7. Timing Diagram: Strobe Input
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
6
CAT1232LP/CAT1832
PACKAGE MECHANICAL
16-LEAD WIDE BODY SOIC (300mil)
0.2914 (7.40) 0.394 (10.00)
0.2992 (7.60) 0.419 (10.65)
0.010 (0.25)
0.029 (0.75)
X 45
0.3977 (10.10)
0.4133 (10.50)
0.0091 (0.23)
0.0125 (0.32)
0.0926 (2.35)
0.1043 (2.65)
0 –8
0.050 (1.27)
BSC
0.0040 (0.10)
0.0118 (0.30)
0.016 (0.40)
0.050 (1.27)
0.013 (0.33)
0.020 (0.51)
Notes:
1. Complies with JEDEC publication 95 MS-013 dimensions; however, some dimensions may be more stringent.
2. All linear dimensions are in inches and parenthetically in millimeters.
8-LEAD DIP (300mil)
0.245 (6.17)
0.295 (7.49)
0.300 (7.62)
0.325 (8.26)
0.355 (9.02)
0.400 (10.16)
0.120 (3.05)
0.150 (3.81)
0.180 (4.57) MAX
0.015 (0.38)
0.110 (2.79)
0.150 (3.81)
—
0.100 (2.54)
BSC
0.310 (7.87)
0.380 (9.65)
0.045 (1.14)
0.060 (1.52)
0.014 (0.36)
0.022 (0.56)
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
7
CAT1232LP/CAT1832
PACKAGE MECHANICAL
8-LEAD MSOP
0.0150
0.0110
0.38
0.28
0.1970
0.1890
5.00
4.80
S
0.0256 [0.65] BSC
3.10
2.90
0.1220
0.1142
0.0433
[1.10] MAX.
0.0374 0.95
0.0295 0.75
0.1220
0.1142
3.10
2.90
0˚ - 6˚
0.0059
0.0020
0.15
0.05
S
0.0276 0.70
0.0157 0.40
0.039 [0.10] MAX.
S
8-LEAD Narrow Body SOIC (150mil)
0.1497 (3.90) 0.2294 (5.90)
0.1574 (4.00) 0.2440 (6.20)
0.0099 (0.25)
0.0196 (0.75)
X 45
0.1990 (4.90)
0.1969 (5.00)
0.0075 (0.19)
0.0099 (0.25)
0.0926 (2.35)
0.1043 (2.65)
0 –8
0.050 (1.27) BSC
0.0040 (0.10)
0.0099 (0.25)
0.016 (0.40)
0.050 (1.27)
0.013 (0.33)
0.020 (0.51)
© 2006 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
Doc. No. 25089, Rev. B
8
REVISION HISTORY
Date
Revision Comments
06/13/2005
07/26/2005
00
A
Initial Issue
Update Electrical Characteristics
Add Typical Characteristics
03/27/2006
B
Update Document Title
Update Ordering Information
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situation where personal injury or death may occur.
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Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.catsemi.com
Publication #: 25089
Revison:
B
Issue date:
03/27/06
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