CAT5112U50TE13 [CATALYST]
32-Tap Digitally Programmable Potentiometer; 32抽头数字可编程电位计型号: | CAT5112U50TE13 |
厂家: | CATALYST SEMICONDUCTOR |
描述: | 32-Tap Digitally Programmable Potentiometer |
文件: | 总7页 (文件大小:53K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
E
CAT5112
32-Tap Digitally Programmable Potentiometer (DPP™)
with Buffered Wiper
TM
APPLICATIONS
FEATURES
■ Automated product calibration
■ Remote control adjustments
■ Offset, gain and zero control
■ Tamper-proof calibrations
■ 32-position linear taper potentiometer
■ Non-volatile NVRAM wiper storage;
buffered wiper
■ Low power CMOS technology
■ Single supply operation: 2.5V-6.0V
■ Increment up/down serial interface
■ Resistance values: 10kΩ, 50kΩ and 100kΩ
■ Available in PDIP, SOIC, TSSOP and MSOP packages
■ Contrast, brightness and volume controls
■ Motor controls and feedback systems
■ Programmable analog functions
DESCRIPTION
system values without effecting the stored
setting. Wiper-control of the CAT5112 is
accomplished with three input control pins, CS, U/D,
and INC. The INC input increments the wiper in the
direction which is determined by the logic state of
the U/D input. The CS input is used to select the
device and also store the wiper position prior to
power down.
The CAT5112 is a single digitally programmable
potentiometer (DPP™) designed as a electronic
replacement for mechanical potentiometers and trim
pots. Ideal for automated adjustments on high volume
production lines, they are also well suited for
applications where equipment requiring periodic
adjustment is either difficult to access or located in a
hazardous or remote environment.
The digitally programmable potentiometer can be
used as a buffered voltage divider. For applications
wherethepotentiometerisusedasa2-terminalvariable
resistor, please refer to the CAT5114. The buffered
wiper of the CAT5112 is not compatible with that appli-
cation. DPPs bring variability and programmability to a
broad range of applications and are used primarily to
control, regulate or adjust a characteristic or parameter
of an analog circuit.
The CAT5112 contains a 32-tap series resistor array
connected between two terminals RH and RL. An up/
down counter and decoder that are controlled by three
input pins, determines which tap is connected to the
wiper, RWB. The CAT5112 wiper is buffered by an op
amp that operates rail to rail. The wiper setting, stored in
non-volatile NVRAM memory, is not lost when the de-
viceispowereddownandisautomaticallyrecalledwhen
powerisreturned. Thewipercanbeadjustedtotestnew
FUNCTIONAL DIAGRAM
R
H
V
CC
R
H
U/D
+
–
R
Control
and
Memory
WB
+
–
>
INC
CS
R
R
WB
L
Power On Recall
R
L
Electronic Potentiometer
Implementation
V
SS
Doc. No. 2002, Rev. L
© 2004 by Catalyst Semiconductor, Inc.
1
Characteristics subject to change without notice
CAT5112
PIN CONFIGURATION
PDIP Package (P, L)
PIN FUNCTIONS
Pin Name
Function
TSSOP Package (U, Y)
INC
Increment Control
Up/Down Control
Potentiometer High Terminal
Ground
1
2
3
4
8
7
6
5
V
R
R
CS
1
2
3
4
8
7
6
5
INC
CC
L
V
CS
CC
U/D
U/D
WB
R
L
R
H
GND
INC
R
H
R
H
GND
R
U/D
WB
GND
SOIC Package (S, V)
MSOP Package (R, Z)
R
WB
R
L
Buffered Wiper Terminal
Potentiometer Low Terminal
Chip Select
1
2
3
4
8
7
6
5
V
INC
CC
1
2
3
4
8
7
6
5
INC
VCC
CS
U/D
U/D
CS
R
L
R
H
CS
R
H
R
R
L
GND
R
WB
GND
VCC
Supply Voltage
WB
PIN DESCRIPTIONS
INC: Increment Control Input
of the CAT5112 and is active low. When in a high
state, activity on the INC and U/D inputs will not
affect or change the position of the wiper.
TheINCinput(onthefallingedge)movesthewiperinthe
up or down direction determined by the condition of the
U/D input.
DEVICE OPERATION
U/D: Up/Down Control Input
The CAT5112 operates like a digitally controlled
potentiometer with RH and RL equivalent to the high
andlowterminalsandRWB equivalentto themechanical
potentiometer's wiper. There are 32 available tap posi-
tions including the resistor end points, RH and RL. There
are 31 resistor elements connected in series between
the RH and RL terminals. The wiper terminal is
connected to one of the 32 taps and controlled by three
inputs, INC, U/D and CS. These inputs control a five-bit
up/down counter whose output is decoded to select the
wiper position. The selected wiper position can be
stored in nonvolatile memory using the INC and
CS inputs.
The U/D input controls the direction of the wiper
movement. When in a high state and CS is low, any high-
to-low transition on INC will cause the wiper to move one
increment toward the RH terminal. When in a low state
and CS is low, any high-to-low transition on INC will
cause the wiper to move one increment towards the
RL terminal.
RH: High End Potentiometer Terminal
RH is the high end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
greater than the RL terminal. Voltage applied to the RH
terminal cannot exceed the supply voltage, VCC or go
below ground, GND.
With CS set LOW the CAT5112 is selected and will
respond to the U/D and INC inputs. HIGH to LOW
transitions on INC wil increment or decrement the
wiper (depending on the state of the U/D input and five-
bit counter). The wiper, when at either fixed terminal,
acts like its mechanical equivalent and does not move
beyond the last position. The value of the counter is
stored in nonvolatile memory whenever CS transitions
HIGH while the INC input is also HIGH. When the
CAT5112ispowered-down,thelaststoredwipercounter
position is maintained in the nonvolatile memory. When
power is restored, the contents of the memory are
recalled and the counter is set to the value stored.
RWB: Wiper Potentiometer Terminal (Buffered)
RWB is the buffered wiper terminal of the potentiometer. Its
position on the resistor array is controlled by the control
inputs, INC, U/D and CS.
RL: Low End Potentiometer Terminal
RL is the low end terminal of the potentiometer. It is not
required that this terminal be connected to a potential
less than the RH terminal. Voltage applied to the RL
terminal cannot exceed the supply voltage, VCC or go
below ground, GND. RL and RH are electrically
interchangeable.
With INC set low, the CAT5112 may be de-selected
and powered down without storing the current wiper
position in nonvolatile memory. This allows the
system to always power up to a preset value stored
in nonvolatile memory.
CS: Chip Select
The chip select input is used to activate the control input
Doc. No. 2002, Rev. L
2
CAT5112
OPERATING MODES
RH
INC
High to Low
High to Low
High
CS
U/D
High
Low
X
Operation
Wiper toward H
CH
Rwi
Low
Low
RWB
CW
Wiper toward L
Low to High
Low to High
High
Store Wiper Position
No Store, Return to Standby
Standby
Low
X
CL
Potentiometer
Equivalent Circuit
X
X
RL
Operating Ambient Temperature
ABSOLUTE MAXIMUM RATINGS
Commercial (‘C’ or Blank suffix)
Industrial (‘I’ suffix)
Junction Temperature
Storage Temperature
Lead Soldering (10 sec max)
0°C to +70°C
-40°C to +85°C
+150°C
-65°C to +150°C
+300°C
Supply Voltage
VCC to GND
Inputs
-0.5V to +7V
CS to GND
INC to GND
U/D to GND
RH to GND
RL to GND
RWB to GND
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
-0.5V to VCC +0.5V
* Stresses above those listed under Absolute Maximum Ratings may
cause permanent damage to the device. Absolute Maximum Ratings
are limited values applied individually while other parameters are
within specified operating conditions, and functional operation at any
of these conditions is NOT implied. Device performance and reliability
maybeimpairedbyexposuretoabsoluteratingconditionsforextended
periods of time.
RELIABILITY CHARACTERISTICS
Symbol
Parameter
Test Method
Min
Typ
Max
Units
(1)
VZAP
ESD Susceptibility
Latch-Up
MIL-STD-883, Test Method 3015
2000
100
Volts
mA
(1)(2)
ILTH
JEDEC Standard 17
TDR
Data Retention
Endurance
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 1003
100
Years
Stores
NEND
1,000,000
DC Electrical Characteristics: VCC = +2.5V to +6.0V unless otherwise specified
Power Supply
Symbol Parameter
Conditions
Min
2.5
Typ
—
Max
6.0
Units
V
VCC
ICC1
Operating Voltage Range
Supply Current (Increment)
VCC = 6V, f = 1MHz, IW=0
VCC = 6V, f = 250kHz, IW=0
—
—
—
—
200
100
µA
ICC2
Supply Current (Write)
Programming, VCC = 6V
VCC = 3V
—
—
—
—
1
mA
500
µA
(2)
ISB1
Supply Current (Standby)
CS=VCC-0.3V
—
75
150
µA
U/D, INC=VCC-0.3V or GND
Logic Inputs
Symbol Parameter
Conditions
Min
Typ
Max
Units
IIH
Input Leakage Current
VIN = VCC
—
—
—
—
—
—
—
10
–10
µA
µA
V
IIL
Input Leakage Current
VIN = 0V
—
VIH1
VIL1
VIH2
VIL2
TTL High Level Input Voltage
TTL Low Level Input Voltage
CMOS High Level Input Voltage
CMOS Low Level Input Voltage
4.5V ≤ VCC ≤ 5.5V
2
0
VCC
0.8
V
2.5V ≤ VCC ≤ 6V
VCC x 0.7
-0.3
VCC + 0.3
VCC x 0.2
V
V
NOTES: (1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) Latch-up protection is provided for stresses up to 100mA on address and data pins from –1V to VCC + 1V
(3) IW=source or sink
(4) These parameters are periodically sampled and are not 100% tested.
Doc. No. 2002, Rev. L
3
CAT5112
Potentiometer Parameters
Symbol
Parameter
Conditions
Min
Typ
Max Units
RPOT
Potentiometer Resistance
-10 Device
-50 Device
-00 Device
10
50
kΩ
100
Pot Resistance Tolerance
Voltage on RH pin
±20
VCC
VCC
%
V
VRH
VRL
0
0
Voltage on RL pin
V
Resolution
1
%
INL
DNL
Integral Linearity Error
Differential Linearity Error
Buffer Output Resistance
Buffer Output Current
TC of Pot Resistance
Ratiometric TC
I
I
W ≤ 2µA
W ≤ 2µA
0.5
0.25
1
0.5
1
LSB
LSB
Ω
ROUT
IOUT
.05V
.05V
≤ VWB≤ .95V , V =5V
CC
CC
CC CC
≤ VWB≤ .95V , V =5V
3
mA
ppm/˚C
ppm/˚C
Ω
CC CC
TCRPOT
TCRATIO
RISO
300
TBD
TBD
8/8/25
1.7
Isolation Resistance
CRH/CRL/CRW Potentiometer Capacitances
fc Frequency Response
pF
Passive Attenuator, 10kΩ
MHz
VWB(SWING) Output Voltage Range
I
OUT≤100µA, VCC=5V
0.01VCC
.99VCC
Doc. No. 2002, Rev. L
4
CAT5112
AC CONDITIONS OF TEST
Range
V
2.5V ≤ V
≤ 6V
CC
CC
Input Pulse Levels
0.2V to 0.7V
CC CC
Input Rise and Fall Times
Input Reference Levels
10ns
0.5V
CC
AC OPERATING CHARACTERISTICS:
VCC = +2.5V to +6.0V, VH = VCC, VL = 0V, unless otherwise specified
Symbol Parameter
Min
Typ(1)
Max
Units
tCI
CS to INC Setup
100
50
100
250
250
1
—
—
—
—
—
—
—
—
1
—
—
—
—
—
—
—
—
5
ns
ns
tDI
U/D to INC Setup
tID
U/D to INC Hold
ns
tIL
INC LOW Period
ns
tIH
INC HIGH Period
ns
tIC
INC Inactive to CS Inactive
CS Deselect Time (NO STORE)
CS Deselect Time (STORE)
INC to VOUT Change
INC Cycle Time
µs
tCPH
tCPH
tIW
100
10
—
ns
ms
µs
tCYC
1
—
—
—
5
—
500
1
µs
(2)
tR, tF
INC Input Rise and Fall Time
Power-up to Wiper Stable
Store Cycle
—
µs
(2)
tPU
—
msec
ms
tWR
—
10
A. C. TIMING
CS
(store)
tCYC
tIC
tCPH
tCI
tIL
tIH
90%
90%
INC
10%
tID
tDI
tR
tF
U/D
(3)
tIW
MI
R
W
(1) Typical values are for T =25˚C and nominal supply voltage.
A
(2) This parameter is periodically sampled and not 100% tested.
(3) MI in the A.C. Timing diagram refers to the minimum incremental change in the W output due to a change in the wiper position.
Doc. No. 2002, Rev. L
5
CAT5112
ORDERING INFORMATION
Prefix
Device #
5112
Suffix
S
-10
CAT
I
TE13
Product Number
5112: Buffered
5114: Unbuffered
Resistance
Optional
Company ID
Tape & Reel
-10: 10kohms
SOIC: 2000/Reel
-50: 50kohms
-00: 100kohms
TSSOP: 2000/Reel
MSOP: 2500/Reel
Temperature Range
Blank = Commercial (0°C to +70°C)
I = Industrial (-40°C to +85°C)
Package
P: PDIP
S: SOIC
U: TSSOP
R: MSOP
L: PDIP (Lead free, Halogen free)
V: SOIC (Lead free, Halogen free)
Y: TSSOP (Lead free, Halogen free)
Z: MSOP (Lead free, Halogen free)
Doc. No. 2002, Rev. L
6
CAT5112
REVISION HISTORY
Date
Rev.
Reason
3/10/2004
3/29/2004
4/12/2004
J
Updated Potentiometer Parameters
K
L
Changed Green Package marking for SOIC from W to V
Updated Reel Ordering Information
Notes:
(1) The device used in the above example is a CAT5112 SI-10TE13 (SOIC, 10K Ohms, Industrial Temperature, Tape & Reel)
Copyrights, Trademarks and Patents
Trademarks and registered trademarks of Catalyst Semiconductor include each of the following:
2
DPP ™
AE ™
Catalyst Semiconductor has been issued U.S. and foreign patents and has patent applications pending that protect its products. For a complete list of patents
issued to Catalyst Semiconductor contact the Company’s corporate office at 408.542.1000.
CATALYST SEMICONDUCTOR MAKES NO WARRANTY, REPRESENTATION OR GUARANTEE, EXPRESS OR IMPLIED, REGARDING THE SUITABILITY OF ITS
PRODUCTS FOR ANY PARTICULAR PURPOSE, NOR THAT THE USE OF ITS PRODUCTS WILL NOT INFRINGE ITS INTELLECTUAL PROPERTY RIGHTS OR THE
RIGHTS OF THIRD PARTIES WITH RESPECT TO ANY PARTICULAR USE OR APPLICATION AND SPECIFICALLY DISCLAIMS ANY AND ALL LIABILITY ARISING
OUT OF ANY SUCH USE OR APPLICATION, INCLUDING BUT NOT LIMITED TO, CONSEQUENTIAL OR INCIDENTAL DAMAGES.
Catalyst Semiconductor products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or
other applications intended to support or sustain life, or for any other application in which the failure of the Catalyst Semiconductor product could create a
situation where personal injury or death may occur.
Catalyst Semiconductor reserves the right to make changes to or discontinue any product or service described herein without notice. Products with data sheets
labeled "Advance Information" or "Preliminary" and other products described herein may not be in production or offered for sale.
Catalyst Semiconductor advises customers to obtain the current version of the relevant product information before placing orders. Circuit diagrams illustrate
typical semiconductor applications and may not be complete.
Catalyst Semiconductor, Inc.
Corporate Headquarters
1250 Borregas Avenue
Sunnyvale, CA 94089
Phone: 408.542.1000
Fax: 408.542.1200
www.catsemi.com
Publication #: 2002
Revison:
Issue date:
Type:
L
4/12/04
Final
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