CMLDM8002AGBKPBFREE [CENTRAL]

Transistor,;
CMLDM8002AGBKPBFREE
型号: CMLDM8002AGBKPBFREE
厂家: CENTRAL SEMICONDUCTOR CORP    CENTRAL SEMICONDUCTOR CORP
描述:

Transistor,

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CMLDM8002A  
CMLDM8002AG*  
CMLDM8002AJ  
www.centralsemi.com  
SURFACE MOUNT  
DUAL P-CHANNEL  
ENHANCEMENT-MODE  
SILICON MOSFET  
DESCRIPTION:  
These CENTRAL SEMICONDUCTOR devices are  
dual chip Enhancement-mode P-Channel Field Effect  
Transistors, manufactured by the P-Channel DMOS  
Process, designed for high speed pulsed amplifier and  
driver applications. The CMLDM8002A utilizes the USA  
pinout configuration, while the CMLDM8002AJ, utilizing  
the Japanese pinout configuration, is available as a  
special order. These special Dual Transistor devices  
offer Low r  
and Low V .  
DS(on)  
DS(on)  
SOT-563 CASE  
MARKING CODES: CMLDM8002A:  
C08  
CMLDM8002AG*: CG8  
CMLDM8002AJ: CJ8  
Device is Halogen Free by design  
*
FEATURES:  
• Dual Chip Device  
• Fast Switching  
• Logic Level Compatible  
• Small SOT-563 package  
APPLICATIONS:  
• Load/Power Switches  
• Power Supply Converter Circuits  
• Battery Powered Portable Equipment  
• Low r  
• Low V  
DS(on)  
DS(on)  
• Low Threshold Voltage  
MAXIMUM RATINGS: (T =25°C)  
SYMBOL  
UNITS  
A
Drain-Source Voltage  
V
50  
50  
V
V
DS  
DG  
GS  
Drain-Gate Voltage  
V
V
Gate-Source Voltage  
20  
V
Continuous Drain Current  
I
280  
mA  
mA  
A
D
Continuous Source Current (Body Diode)  
Maximum Pulsed Drain Current  
Maximum Pulsed Source Current  
Power Dissipation (Note 1)  
Power Dissipation (Note 2)  
Power Dissipation (Note 3)  
Operating and Storage Junction Temperature  
Thermal Resistance  
I
280  
S
I
1.5  
DM  
I
1.5  
A
SM  
P
P
P
350  
mW  
mW  
mW  
°C  
D
D
D
300  
150  
T , T  
-65 to +150  
357  
J
stg  
Θ
°C/W  
JA  
ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (T =25°C unless otherwise noted)  
A
SYMBOL  
TEST CONDITIONS  
MIN  
MAX  
100  
1.0  
UNITS  
nA  
I
I
I
I
, I  
V
V
V
V
=20V, V =0  
GSSF GSSR  
GS  
DS  
DS  
GS  
GS  
DS  
=50V, V =0  
GS  
μA  
DSS  
=50V, V =0, T =125°C  
500  
μA  
DSS  
GS  
J
=10V, V =10V  
500  
mA  
D(ON)  
DS  
BV  
V
V
=0, I =10μA  
50  
1.0  
V
V
DSS  
D
V
=V , I =250μA  
DS GS  
2.5  
GS(th)  
D
Notes: (1) Ceramic or aluminum core PC Board with copper mounting pad area of 4.0mm2  
(2) FR-4 Epoxy PC Board with copper mounting pad area of 4.0mm2  
(3) FR-4 Epoxy PC Board with copper mounting pad area of 1.4mm2  
R3 (18-January 2010)  
CMLDM8002A  
CMLDM8002AG*  
CMLDM8002AJ  
SURFACE MOUNT  
DUAL P-CHANNEL  
ENHANCEMENT-MODE  
SILICON MOSFET  
ELECTRICAL CHARACTERISTICS PER TRANSISTOR - Continued: (T =25°C unless otherwise noted)  
A
SYMBOL  
TEST CONDITIONS  
MIN  
MAX  
1.5  
0.15  
1.3  
2.5  
4.0  
UNITS  
V
V
V
Ω
Ω
Ω
Ω
mS  
pF  
pF  
pF  
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
=10V, I =500mA  
DS(ON)  
DS(ON)  
SD  
GS  
GS  
GS  
GS  
GS  
GS  
GS  
DS  
DS  
DS  
DS  
DD  
D
=5.0V, I =50mA  
D
=0, I =115mA  
S
r
r
r
r
=10V, I =500mA  
DS(ON)  
DS(ON)  
DS(ON)  
DS(ON)  
FS  
rss  
iss  
D
=10V, I =500mA, T =125°C  
D
J
=5.0V, I =50mA  
3.0  
5.0  
D
=5.0V, I =50mA, T =125°C  
D
J
g
=10V, I =200mA  
200  
D
C
C
C
=25V, V =0, f=1.0MHz  
GS  
7.0  
70  
15  
=25V, V =0, f=1.0MHz  
GS  
=25V, V =0, f=1.0MHz  
GS  
oss  
/ t  
t
=30V, V =10V, I =200mA  
on off  
GS  
D
R =25Ω, R =150Ω  
20  
ns  
G
L
SOT-563 CASE - MECHANICAL OUTLINE  
CMLDM8002A (USA Pinout)  
CMLDM8002AJ (Japanese Pinout)  
CMLDM8002AG*  
LEAD CODE:  
LEAD CODE:  
1) Gate Q1  
2) Source Q1  
3) Drain Q2  
4) Gate Q2  
5) Source Q2  
6) Drain Q1  
1) Gate Q1  
2) Source Q1  
3) Drain Q2  
4) Gate Q2  
5) Source Q2  
6) Drain Q1  
MARKING CODES:  
CMLDM8002A: C08  
MARKING CODE: CJ8  
CMLDM8002AG*: CG8  
Device is Halogen Free by design  
*
R3 (18-January 2010)  
www.centralsemi.com  

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