CTLDM8120-M832DBKPBFREE [CENTRAL]
Transistor,;
| 型号： | CTLDM8120-M832DBKPBFREE |
| 厂家： | 
CENTRAL SEMICONDUCTOR CORP |
| 描述： | Transistor, |
| 文件： | 总2页 (文件大小：466K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CTLDM8120-M832D
SURFACE MOUNT
DUAL, P-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFETS
www.centralsemi.com
DESCRIPTION:
The CENTRAL SEMICONDUCTOR
CTLDM8120-M832D is an Enhancement-mode Dual
P-Channel Field Effect Transistor, manufactured by the
P-Channel DMOS Process, designed for high speed
pulsed amplifier and driver applications. This MOSFET
offers Low r
and Low Threshold Voltage.
DS(ON)
MARKING CODE: CFV
• Device is Halogen Free by design
TLM832D CASE
FEATURES:
• ESD protection up to 2kV
APPLICATIONS:
• Switching Circuits
• DC - DC Converters
• Battery powered portable devices
• Low r
• High current (I =0.95A)
(0.24Ω MAX @ V =1.8V)
DS(ON) GS
D
• Logic level compatibility
MAXIMUM RATINGS: (T =25°C)
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current (Steady State)
Continuous Drain Current, t<5.0s
Continuous Source Current (Body Diode)
Maximum Pulsed Drain Current, tp=10μs
Maximum Pulsed Source Current, tp=10μs
Power Dissipation (Note 1)
SYMBOL
UNITS
V
V
A
A
A
A
A
A
V
V
I
I
20
8.0
0.86
0.95
0.36
4.0
DS
GS
D
D
I
S
I
I
P
DM
SM
4.0
1.65
-65 to +150
76
W
°C
°C/W
D
T
Operating and Storage Junction Temperature
Thermal Resistance (Note 1)
T
J, stg
Θ
JA
ELECTRICAL CHARACTERISTICS PER TRANSISTOR: (T =25°C unless otherwise noted)
A
SYMBOL
TEST CONDITIONS
MIN
TYP
1.0
MAX
50
UNITS
nA
nA
V
V
V
Ω
Ω
Ω
Ω
nC
nC
nC
S
pF
pF
I
I
, I
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
=8.0V, V =0
GSSF GSSR
DSS
GS
DS
GS
DS
=20V, V =0
GS
5.0
500
BV
V
V
r
r
r
r
Q
Q
Q
=0, I =250μA
I =250μA
=0, I =360mA
20
24
DSS
GS(th)
SD
DS(ON)
DS(ON)
DS(ON)
DS(ON)
D
=V
0.45
0.76
1.0
DS GS, D
0.9
GS
GS
GS
GS
GS
DS
DS
DS
DS
DS
DS
DS
DD
DD
S
=4.5V, I =0.95A
0.085
0.085
0.130
0.190
3.56
0.150
0.142
0.200
0.240
D
=4.5V, I =0.77A
D
=2.5V, I =0.67A
D
=1.8V, I =0.2A
=10V, V =4.5V, I =1.0A
=10V, V =4.5V, I =1.0A
=10V, V =4.5V, I =1.0A
GS
=10V, I =810mA
=16V, V =0, f=1.0MHz
=16V, V =0, f=1.0MHz
D
GS
GS
g(tot)
gs
D
D
D
0.36
1.52
gd
FS
rss
iss
oss
g
2.0
D
C
C
C
t
t
80
200
60
20
25
GS
GS
=16V, V =0, f=1.0MHz
pF
ns
ns
GS
=10V, V =4.5V, I =0.95A, R =6.0Ω
on
off
GS
D
D
G
G
=10V, V =4.5V, I =0.95A, R =6.0Ω
GS
Notes: (1) FR-4 Epoxy PCB with copper mounting pad area of 54mm2
R2 (2-August 2011)
CTLDM8120-M832D
SURFACE MOUNT
DUAL, P-CHANNEL
ENHANCEMENT-MODE
SILICON MOSFETS
TLM832D CASE - MECHANICAL OUTLINE
PIN CONFIGURATION
LEAD CODE:
1) Gate Q1
2) Source Q1
3) Gate Q2
4) Source Q2
5) Drain Q2
6) Drain Q2
7) Drain Q1
8) Drain Q1
MARKING CODE: CFV
R2 (2-August 2011)
www.centralsemi.com
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