CEC8218 [CET]

Dual N-Channel Enhancement Mode Field Effect Transistor; 双N沟道增强型场效应晶体管
CEC8218
型号: CEC8218
厂家: CHINO-EXCEL TECHNOLOGY    CHINO-EXCEL TECHNOLOGY
描述:

Dual N-Channel Enhancement Mode Field Effect Transistor
双N沟道增强型场效应晶体管

晶体 晶体管 场效应晶体管
文件: 总4页 (文件大小:435K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CEC8218  
Dual N-Channel Enhancement Mode Field Effect Transistor  
FEATURES  
D
D
20V, 6.5A, RDS(ON) = 23m@VGS = 4.5V.  
RDS(ON) = 34m@VGS = 2.5V.  
*1K  
*1K  
Super High dense cell design for extremely low RDS(ON)  
.
G1  
G2  
High power and current handing capability.  
Lead free product is acquired.  
S1  
S2  
*Typical value by design  
D
D
D
D
8
7
6
5
Bottom View  
1
2
3
4
DFN3*3  
S1 G1 S2 G2  
ABSOLUTE MAXIMUM RATINGS TA = 25 C unless otherwise noted  
Parameter  
Symbol  
VDS  
VGS  
ID  
Limit  
Units  
Drain-Source Voltage  
20  
V
V
A
A
Gate-Source Voltage  
Drain Current-Continuous  
Drain Current-Pulsed a  
±12  
6.5  
IDM  
25  
Maximum Power Dissipation  
PD  
1.5  
W
C
Operating and Store Temperature Range  
TJ,Tstg  
-55 to 150  
Thermal Characteristics  
Parameter  
Symbol  
Limit  
Units  
Thermal Resistance, Junction-to-Ambient b  
RθJA  
83  
C/W  
Rev 1. 2010.July  
Details are subject to change without notice .  
http://www.cetsemi.com  
1
CEC8218  
Electrical Characteristics TA = 25 C unless otherwise noted  
Parameter  
Off Characteristics  
Symbol  
Test Condition  
Min  
Typ  
Max  
Units  
Drain-Source Breakdown Voltage  
Zero Gate Voltage Drain Current  
Gate Body Leakage Current, Forward  
Gate Body Leakage Current, Reverse  
On Characteristics c  
BVDSS  
IDSS  
VGS = 0V, ID = 250µA  
VDS = 20V, VGS = 0V  
VGS = 12V, VDS = 0V  
VGS = -12V, VDS = 0V  
20  
V
1
µA  
µA  
µA  
IGSSF  
IGSSR  
10  
-10  
Gate Threshold Voltage  
Static Drain-Source  
VGS(th)  
RDS(on)  
VGS = VDS, ID = 250µA  
VGS = 4.5V, ID = 5A  
VGS = 2.5V, ID = 4A  
0.5  
1.2  
23  
34  
V
17  
24  
m  
mΩ  
On-Resistance  
Dynamic Characteristics d  
Forward Transconductance  
Switching Characteristics d  
Turn-On Delay Time  
gFS  
VDS = 10V, ID = 5A  
17  
S
td(on)  
tr  
td(off)  
tf  
0.34  
0.86  
3.60  
2
0.68  
1.72  
7.5  
4
µs  
µs  
VDD = 10V, ID = 1A,  
VGS = 4.5V, RGEN = 6Ω  
Turn-On Rise Time  
Turn-Off Delay Time  
µs  
Turn-Off Fall Time  
µs  
Total Gate Charge  
Qg  
4.2  
1.2  
2.5  
5.6  
nC  
nC  
nC  
VDS = 10V, ID = 5A,  
VGS = 4.5V  
Gate-Source Charge  
Qgs  
Qgd  
Gate-Drain Charge  
Drain-Source Diode Characteristics and Maximun Ratings  
Drain-Source Diode Forward Current b  
Drain-Source Diode Forward Voltage c  
IS  
6.5  
1.2  
A
V
VSD  
VGS = 0V, IS = 1.5A  
Notes :  
a.Repetitive Rating : Pulse width limited by maximum junction temperature.  
b.Surface Mounted on FR4 Board, t < 10 sec.  
c.Pulse Test : Pulse Width < 300µs, Duty Cycle < 2%.  
d.Guaranteed by design, not subject to production testing.  
2
CEC8218  
25  
20  
15  
10  
20  
16  
12  
8
VGS=4.5,4,3V  
VGS=2.5V  
25 C  
VGS=2.0  
V
4
5
0
-55 C  
TJ=125 C  
0.5  
0
0.0  
1.0  
1.5  
2.0  
2.5  
0
1
2
3
4
VDS, Drain-to-Source Voltage (V)  
VGS, Gate-to-Source Voltage (V)  
Figure 1. Output Characteristics  
Figure 2. Transfer Characteristics  
2.2  
1.9  
1.6  
1.3  
1.0  
0.7  
0.4  
ID=5A  
VGS=4.5V  
V
GS=0V  
101  
100  
10-1  
-100  
-50  
0
50  
100  
150  
200  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
VSD, Body Diode Forward Voltage (V)  
TJ, Junction Temperature( C)  
Figure 4. Body Diode Forward Voltage  
Variation with Source Current  
Figure 3. On-Resistance Variation  
with Temperature  
102  
1.3  
1.2  
1.1  
1.0  
0.9  
0.8  
0.7  
0.6  
VDS=VGS  
ID=250µA  
RDS(ON)Limit  
1ms  
10ms  
100ms  
1s  
DC  
101  
100  
10-1  
10-2  
TA=25 C  
TJ=150 C  
Single Pulse  
10-2  
10-1  
100  
101  
102  
-50 -25  
0
25 50 75 100 125 150  
VDS, Drain-Source Voltage (V)  
TJ, Junction Temperature( C)  
Figure 6. Maximum Safe  
Operating Area  
Figure 5. Gate Threshold Variation  
with Temperature  
3
CEC8218  
5
4
3
2
1
0
VDS=10V  
ID=5A  
on  
t
toff  
d(off)  
t
r
t
d(on)  
OUT  
t
f
t
90%  
10%  
90%  
V
10%  
INVERTED  
90%  
50%  
50%  
IN  
V
10%  
PULSE WIDTH  
0
1
2
3
4
5
6
Qg, Total Gate Charge (nC)  
Figure 7. Gate Charge  
Figure 8. Switching Waveforms  
VDD  
RL  
VIN  
D
OUT  
V
VGS  
RGEN  
G
S
Figure 9. Switching Test Circuit  
100  
D=0.5  
0.2  
10-1  
0.1  
0.05  
0.02  
PDM  
t1  
t2  
0.01  
10-2  
1. RθJA (t)=r (t) * RθJA  
2. RθJA=See Datasheet  
3. TJM-TA = P* RθJA (t)  
4. Duty Cycle, D=t1/t2  
Single Pulse  
10-3  
10-4  
10-3  
10-2  
10-1  
100  
101  
102  
Square Wave Pulse Duration (sec)  
Figure 10. Normalized Thermal Transient Impedance Curve  
4

相关型号:

CECA118

TRANSISTOR | BJT | DARLINGTON | NPN | 1A I(C) | TO-3(8)
ETC

CECC30202-004

Wet Tantalum Capacitors with Glass to Tantalum Hermetic Seal, Sintered Anode TANTALEX Capacitors
VISHAY

CECC40401-003

Surface Mounted Resistors
TTELEC

CECC40401-004

Surface Mounted Resistors
TTELEC

CECC40401-008

Surface Mounted Resistors
TTELEC

CECL08D

CECL08D主控IC
ETC

CECS0312V-G

Bidirectional ESD / Transient Suppressor
COMCHIP

CECS0324V-G

Bidirectional ESD / Transient Suppressor
COMCHIP

CECS035V0-G

Bidirectional ESD / Transient Suppressor
COMCHIP

CECT103

Consumer IC
ETC

CED0.6100.151

Mains Power Connector, 4A, 250VAC, Male, Solder Terminal
SCHURTER

CED01N6

N-Channel Enhancement Mode Field Effect Transistor
CET