CDB8130 [CIRRUS]

Evaluation Board; 评估板
CDB8130
型号: CDB8130
厂家: CIRRUS LOGIC    CIRRUS LOGIC
描述:

Evaluation Board
评估板

文件: 总10页 (文件大小:687K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
CDB8130  
Evaluation Board for CS8130  
Features  
Description  
The CDB8130 evaluation board allows fast and easy  
evaluation of the CS8130 infrared transceiver. The  
board contains an RS-232 level shifter and DB-9 serial  
connector to allow easy interfacing to a standard PC se-  
rial (COM) port.  
z Designed to conform to IrDA Physical Layer  
Specification  
z Interfaces to PC Serial Port  
z Operates from +2.7 V to 5.5 V Power Supply  
z Includes Evaluation Software  
Additionally, the board is shipped with a complete set of  
diagnostic and test software, as well as the Infrared Data  
Association Link Access Protocol (IrLAP) reference  
code.  
ORDERING INFORMATION  
CDB8130  
VD+  
VA+  
AGND  
DGND  
RESET  
Circuit  
LEDs  
and  
PIN  
RS-232  
Level  
Translator  
9-Pin  
Serial  
Connector  
CS8130  
Diode  
Copyright © Cirrus Logic, Inc. 2006  
MAR ‘06  
DS170DB5  
http://www.cirrus.com  
(All Rights Reserved)  
CDB8130  
TABLE OF CONTENTS  
1 CS8130 INFRARED TRANSCEIVER ........................................................................................ 3  
1.1 Power Supply Circuitry and Grounding .............................................................................. 3  
1.2 Reset Circuit ...................................................................................................................... 3  
1.3 Optical Interface ................................................................................................................. 3  
1.4 RS-232 Interface ................................................................................................................ 5  
1.5 Header Interface ................................................................................................................ 5  
1.6 Clock Selection .................................................................................................................. 6  
1.7 Power Down ....................................................................................................................... 6  
1.8 Status Indicator LEDs ........................................................................................................ 6  
1.9 Software ............................................................................................................................. 6  
2 REVISION HISTORY .............................................................................................................. 10  
LIST OF FIGURES  
Figure 1. CS8130 and RS-232 Level Translator ............................................................................. 4  
Figure 2. Power Supply Circuitry..................................................................................................... 5  
Figure 3. Reset Circuit..................................................................................................................... 5  
Figure 5. Unused Gates and Resistors ........................................................................................... 7  
Figure 4. Power Supply Circuitry..................................................................................................... 7  
Figure 6. Component-side Silkscreen (Not to Scale) ...................................................................... 8  
Figure 7. Component-side Trace Layer (Not to Scale).................................................................... 9  
Figure 8. Solder-side Trace Layer (Not to Scale).......................................................................... 10  
Contacting Cirrus Logic Support  
For all product questions and inquiries contact a Cirrus Logic Sales Representative.  
To find the one nearest to you go to www.cirrus.com  
IMPORTANT NOTICE  
Cirrus Logic, Inc. and its subsidiaries (“Cirrus”) believe that the information contained in this document is accurate and reliable. However, the information is subject  
to change without notice and is provided “AS IS” without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant  
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale  
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus  
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third  
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,  
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con-  
sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent  
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-  
ERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE  
IN AIRCRAFT SYSTEMS, MILITARY APPLICATIONS, PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DE-  
VICES, LIFE SUPPORT PRODUCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD  
TO BE FULLY AT THE CUSTOMER'S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE  
IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED  
IN SUCH A MANNER. IF THE CUSTOMER OR CUSTOMER'S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICA-  
TIONS, CUSTOMER AGREES, BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER  
AGENTS FROM ANY AND ALL LIABILITY, INCLUDING ATTORNEYS' FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH  
THESE USES.  
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs are trademarks of Cirrus Logic, Inc. All other brand and product names in this document may be trademarks  
or service marks of their respective owners.  
IBM is a registered trademark of International Business Machines Corporation.  
Temic is a registered trademark of Temic Telefunken Microelectronics, GmbH.  
Hewlett-Packard is a registered trademark of Hewlett-Packard Corporation.  
2
DS170DB5  
CDB8130  
tween +2.7V and +5.5V (defined by the power sup-  
ply requirements of the CS8130.)  
1 CS8130 INFRARED TRANSCEIVER  
The CDB8130 provides an example application of  
the CS8130 infrared transceiver. This application The evaluation board is split into two ground  
is similar to an IR pod system that is designed to planes, an analog plane and a digital plane. The  
plug into any standard RS-232 port, like the COM  
port on the back of an IBM -compatible PC, to plane, and the RS-232 level translator, reset circuit,  
CS8130 and IR components reside on the analog  
®
provide an easy-to-use infrared interface.  
and status indicator circuitry lie over the digital  
ground plane. The ground planes are connected in  
exactly one place at jumper J31, located near the  
power supply connections.  
Additionally, the board allows for easy interfacing  
directly to the CS8130 through stake header J11 al-  
lowing other applications to be easily realized.  
Figure 1 shows the CS8130 and RS-232 level  
translator connections.  
1.2  
Reset Circuit  
Figure 3 shows the power-up and user-activated re-  
set circuit. As shipped from the factory, this circuit  
is not used. The RESET signal is instead supplied  
by the RS-232 interface signal RTS. This configu-  
ration allows the CS8130 to be reset under software  
control.  
A description of the CS8130 including register def-  
initions, control pin assignments, and other useful  
information can be found in the CS8130 data sheet.  
1.1  
Power Supply Circuitry and  
Grounding  
To derive the reset function from the power-  
up/manual reset circuit instead, remove stake  
jumper J9 (RTS) and install stake jumper J12 (RE-  
SETSW). These jumpers are shown in Figure 1.  
Figure 2 shows the power supply configuration of  
the evaluation board. Power is supplied to the  
board by two terminal blocks and a DC power jack,  
J21, J22, and J23 (DCPWR). To operate the board  
from a single power supply, stake jumper J20 must  
be installed. In this configuration, power should be  
supplied to the board through the VD+/DGND ter-  
minal block (J21) or the DCPWR jack (J23).  
1.3  
Optical Interface  
®
The CDB8130 is shipped with Temic and  
®
Hewlett-Packard IR components installed. The  
receiver PIN diode is Temic model BPV 22 NF.  
Transmit LED D5 is a Hewlett-Packard HSDL-  
4220, and D6 is a Temic TSHA5502.  
A 3.3V regulator, U5, is supplied on the board. To  
use this regulator, stake jumper J2 (USE REG)  
should be installed. To bypass the regulator, J1  
(NO REG) should be installed.  
These components are not soldered in place. In-  
stead, they are held by gold-plated pins. These pins  
allow for any insertion and removal of other IR  
components for performance and compatibility  
evaluation.  
To isolate the power supply driving the CS8130  
from the supply powering the rest of the circuitry,  
remove J20, and feed the CS8130’s power supply  
into the VA+/AGND terminal block (J22). The rest  
of the circuit should be powered through either the  
VD+/DGND terminal block (J21) or the DCPWR  
jack (J23).  
The default configuration for the transmitter circuit  
has one LED per output driver. One or both LEDs  
can be active at the same time by programming the  
appropriate register in the CS8130, allowing soft-  
ware to control the transmitter output power.  
Using the on-board voltage regulator, the evalua-  
tion board may be powered from any DC voltage  
between +4V and +6.5V. If the voltage regulator is  
bypassed, the acceptable operating voltage is be-  
Additionally, the transmit drivers on the CS8130  
can be connected in parallel to share current. This  
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CDB8130  
4
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CDB8130  
Figure 2. Power Supply Circuitry  
1.4  
RS-232 Interface  
The CDB8130 is designed to connect to any stan-  
dard RS-232 port through the female DB-9 connec-  
tor marked “RS-232.” The MAX562 (U2) supplies  
the voltage level translation function, taking the ±  
12V RS-232 levels and translating them to standard  
CMOS logic levels.  
Table 1 shows the default mapping of UART sig-  
nals to CS8130 pins.  
CS8130 Pin  
RXD  
UART Signal  
RXD  
Direction  
to UART  
Figure 3. Reset Circuit  
allows systems using only one LED to operate with  
a much higher drive current than can be sourced by  
using a single driver. To connect the transmitter  
drivers in this way, install jumper J17.  
TXD  
TXD  
to CS8130  
to UART  
FORM/BSY  
D/C  
CTS  
DTR  
to CS8130  
to CS8130  
RESET  
RTS  
The LED transmitter driver resistors (R3 and R4)  
are optimized for a power supply voltage of 3.3V.  
For operation at voltages greater than this, the val-  
ues of these resistors must be increased.  
Table 1. CS8130-to-UART Connections  
1.5  
Header Interface  
If desired, the RS-232 level translator can be re-  
moved from the circuit. The signals are discon-  
nected by removing jumpers J5, J6, J7, J8, and J9.  
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CDB8130  
Removing J35 will disconnect power from the lev-  
el translator.  
it means when a LED is lit can be confusing. Table  
2 should help clarify this.  
All the digital signals on the CS8130, FORM/BSY,  
D/C, TXD, RXD, EXTCLK, RESET, PWRDN,  
and CLKFR can be accessed directly from header  
J11. All digital input pins are tied to 47 kpull-up  
resistors through resistor set R1.  
Name  
LED1C  
LED2C  
PWRDN  
RESET  
RXD  
LED On means. . .  
Transmitter #1 active  
Transmitter #2 active  
Power down asserted  
Reset asserted  
Data being received by the CS8130  
Data being transmitted to the CS8130  
CS8130 in Control Mode  
Auto detect ASK/TV TX ready  
1.6  
Clock Selection  
TXD  
The clock for the CS8130 can be supplied via a  
crystal tied between XTALIN and XTALOUT (the  
default configuration on the evaluation board) or  
by an external clock supplied through the EXT-  
CLK pin.  
D/C  
FORM/BSY  
Table 2. LED Indicator Meanings  
1.9  
Software  
To operate the CS8130 from an external clock  
source, cut the trace under J3 (XTAL), and the  
(XTAL) part of J4, then connect the center pin of J4  
to the edge pin marked EXT.  
The CDB8130 evaluation kit comes equipped with  
software that can be used to evaluate and test the  
CS8130. Additional software is currently under  
development.  
Note: the EXTCLK pin on the CS8130 can be ei-  
ther an input or an output. If the CS8130 is being  
clocked from a crystal, EXTCLK is an output. If  
no crystal is present, EXTCLK is an input. This de-  
termination of direction is made while RESET is  
asserted.  
See the documentation supplied with the CDB8130  
evaluation kit for instructions on how to use the  
software.  
Software updates and new releases can be down-  
loaded from the Crystal BBS. Contact the factory  
for details.  
The CS8130 can be operated from either a 3.6864  
MHz or a 1.8432 MHz clock source. If operating  
from a 3.6864 MHz source, jumper J18 (CLKFR)  
must be installed. This brings the CLKFR pin on  
the CS8130 low. If operating from a 1.8432 MHz  
source, jumper J18 should be removed.  
1.7  
Power Down  
Jumper J14 (PWRDN) controls the state of the  
PWRDN pin on the CS8130. PWRDN is asserted  
when J14 is installed.  
1.8  
Status Indicator LEDs  
Key digital signals on the CS8130 are displayed on  
indicator LEDs U6 (U8) and U7 (U9), shown sche-  
matically in Figure 4. Because these LEDs are  
driven through inverters, the interpretation of what  
6
DS170DB5  
CDB8130  
Figure 4. Power Supply Circuitry  
Figure 5. Unused Gates and Resistors  
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7
 
CDB8130  
Figure 6. Component-side Silkscreen (Not to Scale)  
8
DS170DB5  
 
CDB8130  
Figure 7. Component-side Trace Layer (Not to Scale)  
DS170DB5  
9
CDB8130  
Figure 8. Solder-side Trace Layer (Not to Scale)  
2 REVISION HISTORY  
Revision  
DB4  
Date  
Changes  
Initial public release  
APR 2002  
MAR 2006  
DB5  
Updated company contact information & legal statement.  
10  
DS170DB5  
 

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