PA03A [CIRRUS]
Power Operational Amplifiers; 功率运算放大器
| 型号： | PA03A |
| 厂家： | 
CIRRUS LOGIC |
| 描述： | Power Operational Amplifiers |
| 文件： | 总5页 (文件大小：201K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PA03 • PA03A
ProductInnova tionFrom
Power Operational Amplifiers
FEATURES
•ꢀMO-127ꢀCOPPERꢀPOWERꢀDIP™ꢀPACKAGE
•ꢀHIGHꢀINTERNALꢀPOWERꢀDISSIPATION
ꢀ ꢀ —ꢀ500ꢀwatts
•ꢀHIGHꢀVOLTAGEꢀOPERATIONꢀ—ꢀ±75V
•ꢀVERYꢀHIGHꢀCURRENTꢀ—ꢀ±30ꢀamps
•ꢀINTERNALꢀSOAꢀPROTECTION
•ꢀOUTPUTꢀSWINGSꢀCLOSEꢀTOꢀSUPPLYꢀRAILS
•ꢀEXTERNALꢀSHUTDOWNꢀCONTROL
12-PINꢀDIP
PACKAGEꢀSTYLEꢀCU
APPLICATIONS
•ꢀLINEARꢀANDꢀROTARYꢀMOTORꢀDRIVES
•ꢀYOKE/MAGNETICꢀFIELDꢀDEFLECTION
•ꢀPROGRAMMABLEꢀPOWERꢀSUPPLIESꢀtoꢀ±68V
•ꢀTRANSDUCER/AUDIOꢀTOꢀ1000W
TYPICALꢀAPPLICATION
POSITION
FEEDBACK
RBAL
+VS
DESCRIPTION
OBJECT
TOOL
The super power PA03 advances the state of the art in both
brute force power and self protection against abnormal oper-
ating conditions. Its features start with a copper dip package
developedbyApexPrecisionPowertoextendpowercapabilities
well beyond those attainable with the familiar TO-3 package.
The increased pin count of the new package provides addi-
tional control features, while the superior thermal conductivity
of copper allows substantially higher power ratings.
+
+S
+5V
PA03
–S
SHUT DOWN
0/10V
–
DAC
R1
DESIRED
POSITION
–VS
R2
C1
The PA03 incorporates innovative current limiting circuits
limiting internal power dissipation to a curve approximating
the safe operating area of the power transistors. The internal
current limit of 35A is supplemented with thermal sensing
which reduces the current limit as the substrate temperature
rises. Furthermore, a subcircuit monitors actual junction
temperatures and with a response time of less than ten mil-
liseconds reduces the current limit further to keep the junction
temperature at 175°C.
ThePA03outputpowerstagescontainfastreverserecovery
diodes for sustained high energy flyback protection.
This hybrid integrated circuit utilizes thick film resistors,
ceramic capacitors and silicon semiconductors to maximize
reliability, minimize size and give top performance. Ultra-
sonically bonded aluminum wires provide reliable intercon-
nections at all operating temperatures. The MO-127 Copper,
12-pin Power Dip™ package (see Package Outlines), is
hermetically sealed and isolated from the internal circuits.
Insulating washers are not recommended.
The PA03 also features a laser trimmed high performance
FETinputstageprovidingsuperiorDCaccuraciesbothinitially
and over the full temperature range.
IMPORTANT: Observe mounting precautions.
+V
EQUIVALENTꢀ
SCHEMATIC
8
BAL
11
Q4
Q1
Q7
BAL
12
D1
Q3
Q6
Q9
Q2
D2
Q12
Q5
4
Q14
+
7
9
Q16
Q32
+SHUT
DOWN
COMP
Q18
Q17
OUT
Q19
–
+
6
–
10
Q20
A
Q20
1
2
Q22
B
Q24
3
–SHUT
DOWN
D3
Q30
Q26
Q29
Q34
Q31
D4
–V
5
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
MAY 2009
APEX − PA03UREVJ
http://www.cirrus.com
P r o d u c t I n n o v a t i o n F r o m
PA03 • PA03A
SUPPLY VOLTAGE, +VS to –VS
150V
Internally limited
500W
25V
ABSOLUTEꢀMAXIMUMꢀRATINGS
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal
INPUT VOLTAGE, differential
INPUT VOLTAGE, common mode
TEMPERATURE, pin solder-10s
TEMPERATURE, junction1
VS
300°C
175°C
TEMPERATURE RANGE, storage
OPERATING TEMP. RANGE, case
SHUTDOWN VOLTAGE, differential
SHUTDOWN VOLTAGE, common mode
–65 to +150°C
–55 to +125°C
5V
VS
SPECIFICATIONS
PARAMETER
PA03
TYP
PA03A
TYP
TEST CONDITIONS2
MIN
MAX
MIN
MAX
UNITS
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
OFFSET VOLTAGE, vs. supply
OFFSET VOLTAGE, vs. power
BIAS CURRENT, initial
TC = 25°C
Full temperature range
TC = 25°C
Full temperature range
TC = 25°C
TC = 25°C
TC = 25°C
TC = 25°C
TC = 25°C
Full temperature range
.5
10
8
20
5
.01
2.5
1011
6
2
30
.25
5
*
10
3
*
1.5
*
*
.5
10
mV
µV/°C
µV/V
µV/W
pA
pA/V
pA
Ω
pF
V
dB
µA
50
50
10
10
BIAS CURRENT, vs. supply
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC
INPUT CAPACITANCE
COMMON MODE VOLTAGE RANGE3
COMMON MODE REJECTION, DC
SHUTDOWN CURRENT4
SHUTDOWN VOLTAGE
VS –10V
86
*
*
Full temp. range, VCM
Full temperature range
Full temp. range, amp enabled
Full temp. range, amp disabled
=
20V
108
100
*
*
.85
*
V
V
SHUTDOWN VOLTAGE
3.5
92
*
*
GAIN
OPEN LOOP GAIN at 10Hz
GAIN BANDWIDTH PRODUCT at 1MHz TC = 25°C, full load
POWER BANDWIDTH
PHASE MARGIN
Full temp. range, full load
102
1
30
65
*
*
*
*
dB
MHz
kHz
°
TC = 25°C, IO = 15A, VO = 88VPP
Full temp. range, CC = 1.8nF
OUTPUT
VOLTAGE SWING3
VOLTAGE SWING3
VOLTAGE SWING3
CURRENT, peak
SETTLING TIME to .1%
SLEW RATE
TC = 25°C, IO = 30A
Full temp. range, IO = 12A
Full temp. range, IO = 146mA
TC = 25°C
TC = 25°C, 10V step
TC = 25°C, CC - open
Full temp. range, AV = 1
TC = –25°C, disable
TC = –25°C, operate
VS –7
VS –5
VS –4
30
6.2
4.2
3.5
*
*
*
*
*
*
*
V
V
V
A
8
8
*
*
µs
V/µs
nF
µs
µs
CAPACITIVE LOAD
SHUTDOWN DELAY
2
*
*
10
20
*
*
POWER SUPPLY
VOLTAGE
Full temperature range
TC = 25°C
Full temperature range
15
50
125
25
75
300
40
*
*
*
*
*
*
V
mA
mA
CURRENT, quiescent6
CURRENT, disable mode
THERMAL
RESISTANCE, AC junction to case5
RESISTANCE, DC junction to case
RESISTANCE, junction to ambient
TEMPERATURE, junction
Full temp. range, F>60Hz
Full temp. range, F<60Hz
Full temperature range
Sustained operation
.22
.25
14
.28
.3
*
*
*
*
*
°C/W
°C/W
°C/W
°C
150
85
*
*
TEMPERATURE RANGE, case
Meets full range specification
– 25
*
°C
NOTES:
*
The specification of PA03A is identical to the specification for PA03 in applicable column to the left.
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate power dissipation to achieve
high MTTF.
2. The power supply voltage for all specifications is the TYP rating unless noted as a test condition.
3. +V and –VS denote the positive and negative supply rail respectively. Total V is measured from +VS to –VS.
4. RaSting applies if both shutdown inputs are least 1V inside supply rails. If oneSof the shutdown inputs is tied to a supply rail, the
current in that pin may increase to 2.4mA.
5. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
6. The PA03 must be used with a heatsink or the quiescent power may drive the unit into thermal shutdown.
2
PA02U
P r o d u c t I n n o v a t i o n F r o m
PA03 • PA03A
POWER DERATING
BIAS CURRENT
CURRENT LIMIT
500
400
300
256
50
40
64
16
4
30
20
200
100
0
1
10
0
.25
.06
0
40
80
120
160
200
–15
5
45
65
85 105
–50 –25
0
25 50 75 100 125
25
CASE TEMPERATURE, TC (°C)
CASE TEMPERATURE, TC (°C)
CASE TEMPERATURE, TC (°C)
SMALL SIGNAL RESPONSE
PHASE RESPONSE
OUTPUT VOLTAGE SWING
7
120
100
80
0
C
C
C
= OPEN
C
= 1800pF
–30
–60
6
5
= –55°C
C
T
C
C
= OPEN
60
40
20
–90
4
3
CC = 470pF
–120
–150
C
C
= 25°C
C
T
= 1800pF
= 125°C
C
T
2
1
0
–180
–210
–20
1
10 100 1K 10K .1M 1M 10M
FREQUENCY, F (Hz)
1
10 100 1K 10K .1M 1M 10M
FREQUENCY, F (Hz)
0
5
10
15
20
25
30
OUTPUT CURRENT, IO (A)
COMMON MODE REJECTION
PULSE RESPONSE
INPUT NOISE
7.5
5.0
20
120
100
VIN = .5V, AV = 10
RL =.5Ω
10
6
2.5
0
80
60
40
20
0
–2.5
–5.0
–7.5
4
2
0
5
10
15
20
25 30
10
100
1K
10K
.1M
1
10
100
1K 10K .1M 1M
TIME, t (µS)
FREQUENCY, F (Hz)
FREQUENCY, F (Hz)
POWER RESPONSE
HARMONIC DISTORTION
QUIESCENT CURRENT
1.0
0.3
150
100
1.4
1.2
VS = 50V
AV = 10
C
P
O = 200W
= 125°C
TC
C
= OPEN
= 25°C
C
RL = 4Ω
TC
C
= 470pF
0.1
.03
1.0
.8
= –25°C
C
50
40
C
T
C
= 1800pF
30
20
.01
.6
.4
.003
10
3K 5K
300K
30
100 300
1K
3K 10K 30K
40
60
80
100
120
140
10K
50K 100K
FREQUENCY, F (Hz)
TOTAL SUPPLY VOLTAGE, VS (V)
FREQUENCY, F (Hz)
PA02U
3
P r o d u c t I n n o v a t i o n F r o m
PA03 • PA03A
The internal substrate contains beryllia (BeO).
ꢀ CAUTION
SOA
Do not break the seal. If accidentally broken, do
not crush, machine, or subject to temperatures
in excess of 850°C to avoid generating toxic
fumes.
40
30
CURRENT LIMIT ZONE
100mS
1.0mS
10mS
EXTERNALꢀCONNECTIONS
10
dc
SECOND BREAKDOWN
Pins 6 & 7 must be
BALANCE CONTROL
BALANCE CONTROL
PHASE COMP.
–INPUT
5
connected together.
1
2
3
4
5
6
12
11
10
9
+INPUT
If unused, tie Pins
11 & 12 to +SUPPLY.
TOP
VIEW
–SHUT DN
TC = 25°C
† IMPORTANT: OBSERVE
MOUNTING PRECAUTIONS.
REVERSE INSERTION
PHASE COMP.
+SUPPLY
+SHUT DN
–SUPPLY
–OUTPUT
8
7
1
10
+OUTPUT
WILL DESTROY UNIT.
†
20
50
100
150
SUPPLY TO OUTPUT DIFFERENTIAL VS –VO (V)
GENERAL
BALANCEꢀCONTROL
Please read Application Note 1 "General Operating Con-
siderations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.cirrus.com for design tools that help
automatetaskssuchascalculationsforstability,internalpower
dissipation, current limit; heat sink selection; Apex Precision
Power’scompleteApplicationNoteslibrary;TechnicalSeminar
Workbook; and Evaluation Kits.
The voltage offset of the PA03 may be externally adjusted
to zero.To implement this adjustment install a 100 to 200 ohm
potentiometer between pins 11 and 12 and connect the wiper
arm to the positive supply. Bypass pins 11 and 12 each with
at least a .01µF ceramic capacitor.
If the optional adjust provision is not used, connect both
pins 11 and 12 to the positive supply.
OUTPUTꢀSTAGEꢀSHUTDOWN
MOUNTINGꢀPRECAUTIONS
The entire power stage of the PA03 may be disabled us-
ing one of the circuits shown in Figure 1. There are many
applications for this function. One is a load protection based
on power delivered to the load or thermal rise.Another one is
conservation of power when using batteries. The control volt-
age requirements accommodate a wide variety logic drivers.
1. CMOS operating at +5V can drive the control pins di-
rectly.
The PA03 copper base is very soft and easily bent. Do not
put any stress on the mounting ears of this package.This calls
for caution when pushing the amplifier into certain types of
packaging foam and particularly when inserting the device into
a socket. Insert the amplifier into the socket only by pushing
on the perimeter of the package lid. Pushing the unit into the
socket by applying pressure to the mounting tabs will bend
the base due to the high insertion force required. The base
will then not contact the heatsink evenly resulting in very poor
heat transfer. To remove a unit from a socket, pry the socket
away from the heatsink so that the heatsink will support the
amplifier base evenly.Recommended mounting torque is 8–10
in.-lbs. (.9–1.13 N•m).
2. CMOS operating at greater than 5V supplies need a voltage
divider.
3. TTL logic needs a pull up resistor to +5V to provide a swing
to the fully disabled voltage (3.5V). When not using the
shutdown feature, connect both pins 3 and 4 to common.
PHASEꢀCOMPENSATION
SAFEꢀOPERATINGꢀAREAꢀ(SOA)
At low gain settings an external compensation capacitor
is required to insure stability. In addition to the resistive feed-
back network, roll off or integrating capacitors must also be
considered. A frequency of 1 MHz is most appropriate to cal-
culate gain. Operation at gains below 10, without the external
compensation capacitor opens the possibility of oscillations
near output saturation regions when under load, the improper
operation of the thermal shutdown circuit. This can result in
amplifier destruction.
Duetotheinternal(non-adjustable)currentlimitofthePA03,
worst case power dissipation calculations must assume cur-
rent capability of 46 amps.Application specific circuits should
be checked against the SOA curve when relying upon current
limit for fault protection.
SAFEꢀOPERATINGꢀAREAꢀCURVES
Second breakdown limitations do apply to the PA03 but are
lesssevere,sincejunctiontemperaturelimitingrespondswithin
10ms. Stress levels shown as being safe for more than 10ms
duration will merely cause thermal shutdown.
At gains of 10 or more:
1. No external components are required.
Undernormaloperatingconditions, activationofthethermal
shutdown is a sign that the internal junction temperatures have
reached approximately 175°C. Thermal shutdown is a short
term safety feature.If the conditions remain that cause thermal
shutdown, the amplifier will oscillate in and out of shutdown,
creating peak high power stresses, destroying useful signals,
and reducing the reliability of the device.
2. Typical slew rate will be 8V/µs.
3. Typical phase margin will be 70°.
4
PA02U
P r o d u c t I n n o v a t i o n F r o m
PA03 • PA03A
At a gain of 3:
1. Connect a 470pF compensation capacitor between
pins 9 and 10.
2. Typical slew rate will be 5V/µs.
3. Typical phase margin will be 45°.
At unity gain:
1. Connect a 1.8nF compensation capacitor between
pins 9 and 10.
FIGURE 1a.
DIRECT DRIVE
OF SHUTDOWN
+5V
PA03
500Ω
500Ω
4
3
Q14
* NOT REQUIRED
WHEN USING
1K
*
1K
CMOS LOGIC
0 = OPERATE
1 = SHUT DN
Q22
2. Typical slew rate will be 1.8V/µs.
3. Typical phase margin will be 65°.
FIGURE 1b.
HIGH VOLTAGE
LOGIC INTERFACE
+15V
PA03
2R
500Ω
Q14
0 = SHUT DN
1 = OPERATE
CMOS
4
3
1K
R
500Ω
Q22
FIGURE 1c.
THERMALLY
ACTIVATED
SHUTDOWN
+V
S
PA03
500Ω
500Ω
4
3
Q14
1K
R2
4.7K
R1
**
Q22
R4
30K
360–
400mV
LOAD
R3
360Ω
THERMAL SENSE
TRANSISTOR
** SELECT SHUTOFF
TEMPERATURE
SELECT R4 FOR 5V
DROP ON R2
ContACting CiRRUs LogiC sUPPoRt
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.
For inquiries via email, please contact apex.support@cirrus.com.
International customers can also request support by contacting their local Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE
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to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
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does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
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SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PROD-
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All other brand and product names in this document may be trademarks or service marks of their respective owners.
PA02U
5
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