PA50 [CIRRUS]
Power Operational Amplifier; 功率运算放大器型号: | PA50 |
厂家: | CIRRUS LOGIC |
描述: | Power Operational Amplifier |
文件: | 总4页 (文件大小:203K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PA50 • PA50A
ProductInnova tionFrom
Power Operational Amplifier
FEATURES
•ꢀHIGHꢀINTERNALꢀDISSIPATIONꢀ—ꢀ400ꢀWatts
•ꢀHIGHꢀCURRENTꢀ—ꢀ40AꢀContinuous,ꢀ100AꢀPEAK
•ꢀHIGHꢀSLEWꢀRATEꢀ—ꢀ50V/µs
•ꢀOPTIONALꢀBOOSTꢀVOLTAGEꢀINPUTS
APPLICATIONS
•ꢀSEMI-CONDUCTORꢀTESTING
DESCRIPTION
12-PINꢀDIP
PACKAGEꢀSTYLEꢀCR
The PA50 is a MOSFET power operational amplifier that
extends the performance limits of power amplifiers in slew
rate and power bandwidth, while maintaining high current and
power dissipation ratings.
Boost voltage inputs allow the small signal portion of the
amplifier to operate at a higher voltage than the high current
output stage. The amplifier is then biased to achieve close
linear swings to the supply rails at high currents for extra ef-
ficient operation.
The JEDEC MO-127 12-pin Power Dip™ package (see
Package Outlines) is hermetically sealed and isolated from
the internal circuits.The use of compressible thermal washers
and/orimpropermountingtorquewillvoidtheproductwarranty.
Please see “General Operating Considerations”.
EXTERNALꢀCONNECTIONS
EQUIVALENTꢀSCHEMATIC
-V
b
–IN
+IN
1
2
3
4
5
6
12
11
10
9
+V
b
+Vs
+Vs
-Vs
-Vs
TOP
VIEW
8
-OUT
-OUT
+OUT
+OUT
7
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
MAY 2009
APEX − PA50UREVG
http://www.cirrus.com
P r o d u c t I n n o v a t i o n F r o m
PA50 • PA50A
SUPPLY VOLTAGE, +VS to –VS
100V
130V
100A
400W
ABSOLUTEꢀMAXIMUMꢀRATINGS
BOOST VOLTAGE, +Vb to -Vb
OUTPUT CURRENT, within SOA
POWER DISSIPATION, internal
INPUT VOLTAGE, differential
±20V
INPUT VOLTAGE, common mode
TEMPERATURE, pin solder - 10s
TEMPERATURE, junction2
±Vb
300°C
150°C
TEMPERATURE, storage
OPERATING TEMPERATURE RANGE, case
–±5 to +150°C
–55 to +125°C
SPECIFICATIONS
PARAMETER
PA50
TYP
PA50A
TYP
TEST CONDITIONS1
MIN
MAX
MIN
MAX UNITS
INPUT
OFFSET VOLTAGE, initial
OFFSET VOLTAGE, vs. temperature
OFFSET VOLTAGE, vs. supply
BIAS CURRENT, initial
5
10
50
30
50
2
*
*
*
*
*
*
*
5
*
*
mV
µV/°V
µV/V
pA
pA/V
pA
Full temperature range
20
10
10
.01
10
10"
13
*
BIAS CURRENT vs. supply
OFFSET CURRENT, initial
INPUT IMPEDANCE, DC
IMPUT CAPACITANCE
50
*
Ω
pF
COMMON MODE VOLTAGE RANGE
Full temperature range
-VB +12
+VB -14
90
*
*
V
dB
µVrms
COMMON MODE REJECTION,DC
INPUT NOISE
Full temp, range, VCM= ±20V
100KHZ BW, Rs=1KΩ
100
10
*
*
*
GAIN
OPEN LOOP,@ 15Hz
GAIN BANDWIDTH PRODUCT
POWER BANDWIDTH
Full temperature range
RL=10Ω
RL=4Ω, Vo=80VP-P, Av=-10
Full temperature range
94
102
3
200
*
*
*
dB
MHz
kHz
OUTPUT
±
±
±
±
VOLTAGE SWING
VOLTAGE SWING, PA50
VOLTAGE SWING, PA50A
CURRENT, peak
SETTLING TIME TO.1%
SLEW RATE
Io=40A
±VS 9.5 ±VS 8.0
*
*
V
V
V
±VBOOST=±VS±10V, Io=40A
±VBOOST=±VS±10V, Io=50A
3ms 10% Duty Cycle
AV= -10,10V STEP,RL=4Ω
AV=-10
±VS 5.8 ±VS 4.0
±
±
±VS 5.8 ±VS 5.0
100
*
*
*
*
A
1
µs
V/µs
Ω
50
2.5
RESISTANCE
IO=0, NO LOAD, 2MHZ
POWER SUPPLY
VOLTAGE, ±VBOOST
Full temperature range
Full temperature range
+14, -12
±3
±15
±±5
±50
32
*
*
*
*
*
*
*
V
V
mA
mA
VOLTAGE, ±VS
CURRENT,quiescent, boost supply
CURRENT, quiescent, total
2±
30
*
*
3±
THERMAL
RESISTANCE,AC,junction to case3
RESISTANCE,DC,junction to case
RESISTANCE, junction to air
TEMPERATURE RANGE, case
Full temperature range, F>±0HZ
Full temperature range, F>±0HZ
Full temperature range
.2
.25
12
.25
.31
*
*
*
*
*
°C/W
°C/W
°C/W
°C
Meets full range specification
-25
85
*
*
NOTES:
*
The specification of PA50A is identical to the specification for PA50 in applicable column to the left
1. Unless otherwise noted: TC = 25°C, DC input specifications are ± value given. Power supply voltage is typical rating.
±VBOOST = ±VS.
2. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to
achieve high MTTF. For guidance, refer to the heatsink data sheet.
3. Rating applies if the output current alternates between both output transistors at a rate faster than ±0 Hz.
The PA50 is constructed from MOSFET transistors. ESD handling procedures must be observed.
ꢀ CAUTION
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
2
PA50U
P r o d u c t I n n o v a t i o n F r o m
PA50 • PA50A
OUTPUT VOLTAGE SWING
POWER DERATING
POWER SUPPLY REJECTION
500
10
8
100
400
300
200
80
60
40
T = TC
6
4
2
0
100
0
20
0
0
25
50
75
100
10 100 1K 10K 100K 1M 10M
FREQUENCY F (Hz)
0
10
20
30
40
50
OUTPUT CURRENT, IO (A)
TEMPERATURE, T (°C)
POWER RESPONSE
SMALL SIGNAL GAIN
SMALL SIGNAL PHASE
120
80
40
0
100
90
80
70
60
0
–45
RL = 4Ω
50
40
–90
–135
30
20
–180
RL = 4Ω
1
10 100 1K 10K 100K 1M 10M
FREQUENCY, Ff (Hz)
1
10 100 1K 10K 100K 1M 10M
FREQUENCY, F (Hz)
100K
1M
FREQUENCY, F (Hz)
COMMON MODE REJECTION
SAFE OPERATING AREA
QUIESCENT CURRENT
100
10
1.125
100
±VS = ±VB
1.1
1.075
1.05
80
60
40
1
20
0
1.025
1
0.1
10
100
1K
10K 100K 1M
20
40
60
80
100
1
10
100
FREQUENCY, F (Hz)
TOTAL SUPPLY VOLTAGE, VS (V)
SUPPLY TO OUTPUT DIFFERENTIAL, (V)
PA50U
3
P r o d u c t I n n o v a t i o n F r o m
PA50 • PA50A
GENERAL
Please read Application Note 1 "General Operating Con-
siderations" which covers stability, supplies, heat sinking,
mounting, current limit, SOA interpretation, and specification
interpretation. Visit www.Cirrus.com for design tools that help
automatetaskssuchascalculationsforstability,internalpower
dissipation, current limit; heat sink selection; Apex Precision
Power’scompleteApplicationNoteslibrary;TechnicalSeminar
Workbook; and Evaluation Kits.
the high current output stage.An additional 10V on the VBOOST
pins is sufficient to allow the small signal stages to drive the
outputtransistorsintosaturationandimprovetheoutputvoltage
swing for extra efficient operation when required. When close
swings to the supply rails is not required the +VBOOST and +VS
pins must be strapped together as well as the –VBOOST and –VS
pins. The boost voltage pins must not be at a voltage lower
than the VS pins.
CURRENTꢀLIMIT
COMPENSATION
Compensation is internally fixed for a gain of 3 or more and
is not adjustable by the user. The PA50 therefore is not unity
gain stable.
There is no internal circuit provision for current limit in the
PA50. However, the PA50 circuit board in the PA50 evaluation
kit does provide a means whereby the output current can be
sensed.An external circuit current limit can thereby be imple-
mented if needed.
POWERꢀSUPPLYꢀBYPASSING
Proper and sufficient power supply bypassing is crucial to
proper operation of the PA50. Bypass the +Vb and -Vb supply
pins with a minimum .1µF ceramic capacitors directly at the
supply pins. On the +Vs and -Vs pins use a combination of
ceramic and electrolytic capacitors. Use 1µF ceramic capaci-
tors and an electrolytic capacitor at least 10µF for each amp
of output current required.
BOOSTꢀOPERATION
With the VBOOST feature the small signal stages of the
amplifier are operated at higher supply voltages than the
amplifier’s high current output stage. +VBOOST (pin 11) and
–VBOOST (pin 12) are connected to the small signal circuitry of
the amplifier.+VS (pin 9,10) and –VS (pin 3,4) are connected to
ContACtinG CiRRUs LoGiC sUPPoRt
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.
For inquiries via email, please contact apex.support@cirrus.com.
International customers can also request support by contacting their local Cirrus Logic Sales Representative.
To find the one nearest to you, go to www.cirrus.com
IMPORTANT NOTICE
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con-
sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-
ERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE
SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PROD-
UCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUS-
TOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF
MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE
CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES,
BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL
LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc.
All other brand and product names in this document may be trademarks or service marks of their respective owners.
4
PA50U
相关型号:
©2020 ICPDF网 联系我们和版权申明