PB51ED [CIRRUS]

Operational Amplifier;
PB51ED
型号: PB51ED
厂家: CIRRUS LOGIC    CIRRUS LOGIC
描述:

Operational Amplifier

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PB51 • PB51A  
Power Booster Amplifier  
DESCRIPTION  
FEATURES  
The PB51 is a high voltage, high current amplifier de-  
signed to provide voltage and current gain for a small  
signal, general purpose op amp. Including the power  
booster within the feedback loop of the driver amplifier  
results in a composite amplifier with the accuracy of the  
driver and the extended output voltage range and cur-  
rent capability of the booster. The PB51 can also be  
used without a driver in some applications, requiring  
only an external current limit resistor to function prop-  
erly.  
• WIDE SUPPLY RANGE – ±15V to ±150V  
• HIGH OUTPUT CURRENT –  
1.5A Continuous (PB51),  
2.0A Continuous (PB51A)  
• VOLTAGE AND CURRENT GAIN  
• HIGH SLEW –  
50V/µs Minimum (PB51)  
75V/µs Minimum (PB51A)  
• PROGRAMMABLE OUTPUT CURRENT LIMIT  
• HIGH POWER BANDWIDTH – 320 kHz Mini-  
mum  
• LOW QUIESCENT CURRENT – 12mA Typical  
• EVALUATION KIT – EK29  
The output stage utilizes complementary MOSFETs,  
providing symmetrical output impedance and eliminat-  
ing second breakdown limitations imposed by Bipolar  
Transistors. Internal feedback and gainset resistors are  
provided for a pin-strapable gain of 3. Additional gain  
can be achieved with a single external resistor. Com-  
pensation is not required for most driver/gain configura-  
tions, but can be accomplished with a single external  
capacitor. Enormous flexibility is provided through the  
choice of driver amplifier, current limit, supply voltage,  
voltage gain, and compensation.  
APPLICATIONS  
• HIGH VOLTAGE INSTRUMENTATION  
• ELECTROSTATIC TRANSDUCERS &  
DEFLECTION  
• PROGRAMMABLE POWER SUPPLIES  
UP TO 280V P-P  
This hybrid circuit utilizes a beryllia (BeO) sub-  
strate, thick film resistors, ceramic capaci-  
tors and semiconductor chips to maximize reli-  
ability, minimize size and give top performance.  
Ultrasonically bonded aluminum wires provide reliable  
interconnections at all operating temperatures. The 12-  
pin Power SIP package is electrically isolated.  
EQUIVALENTꢀSCHEMATIC  
+VS  
8
Q2  
Q1  
IN  
1
6
Q4  
Q5  
Q6  
GAIN  
OUT  
ILIM  
12  
9
3.1K  
Q7  
2
5
COM  
CC  
Q11  
Q8  
Q9  
Q10  
–VS  
11  
Copyright © Cirrus Logic, Inc. 2011  
OCTꢀ2011  
APEXꢀ−ꢀPB51UREVF  
(All Rights Reserved)  
ꢀ  
www.cirrus.com  
PB51  
1.ꢀCHARACTERISTICSꢀANDꢀSPECIFICATIONS  
ABSOLUTEꢀMAXIMUMꢀRATINGS  
Parameter  
SUPPLY VOLTAGE, +VS to –VS  
OUTPUT CURRENT, within SOA  
Symbol  
Min  
Max  
300  
2.0  
Units  
V
A
POWER DISSIPATION, internal at TC = 25°C  
(Note 1)  
83  
W
INPUT VOLTAGE, referred to COM  
TEMPERATURE, pin solder–10s max.  
TEMPERATURE, junction (Note 1)  
TEMPERATURE RANGE, storage  
OPERATING TEMPERATURE RANGE, case  
-15  
15  
260  
175  
125  
85  
V
°C  
°C  
°C  
°C  
-55  
-25  
SPECIFICATIONSꢀ(PERꢀAMPLIFIER)  
PB51  
PB51A  
TESTꢀCONDITIONSꢀ  
PARAMETER  
(Noteꢀ2)  
MIN  
TYP MAX MIN TYP MAX UNITS  
INPUT  
OFFSET VOLTAGE, initial  
OFFSET VOLTAGE, vs. tempera- Full temperature range  
±.75  
-4.5  
±1.75  
-7  
*
*
±1.0  
*
V
mV/°C  
ture  
(Note 3)  
INPUT IMPEDANCE, DC  
INPUT CAPACITANCE  
CLOSED LOOP GAIN RANGE  
25  
3
50  
3
*
*
*
*
*
*
*
k
pF  
V/V  
%
10  
25  
*
*
*
GAIN ACCURACY, internal Rg, Rf AV = 3  
±10  
±15  
±15  
±25  
GAIN ACCURACY, external Rf  
PHASE SHIFT  
AV = 10  
%
f = 10kHz, AVCL = 10,  
CC = 22pF  
10  
60  
*
*
°
°
f = 200kHz, AVCL = 10,  
CC = 22pF  
OUTPUT  
IO = 1.5A (PB58),  
2A (PB58A)  
VS–11  
VS–8  
VS–15 VS–11  
V
VOLTAGE SWING  
VOLTAGE SWING  
VOLTAGE SWING  
CURRENT, continuous  
SLEW RATE  
IO = 1A  
VS–10  
VS–8  
1.5  
VS–7  
VS–5  
*
*
*
*
V
V
IO = 0.1A  
2.0  
75  
A
Full temperature range  
Full temperature range  
RL = 100, 2V step  
VC = 100 VP-P  
50  
100  
2200  
2
*
*
*
*
*
V/µs  
pF  
CAPACITIVE LOAD  
SETTLING TIME to .1%  
POWER BANDWIDTH  
µs  
160  
230  
100  
240  
kHz  
Khz  
CC = 22pF, AV = 25,  
VCC = ±100  
SMALL SIGNAL BANDWIDTH  
SMALL SIGNAL BANDWIDTH  
CC = 22pF, AV = 3,  
VCC = ±30  
1
*
MHz  
2ꢀ  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀPB51U  
PB51  
PB51  
PB51A  
TYP MAX UNITS  
TESTꢀCONDITIONSꢀ  
(Noteꢀ2)  
PARAMETER  
MIN  
TYP MAX MIN  
POWERꢀSUPPLY  
±15  
(Note 6)  
VOLTAGE, ±VS (Note 4)  
Full temperature range  
±60  
±150  
18  
*
*
*
*
V
VS = ±15  
VS = ±60  
VS = ±150  
11  
12  
14  
*
*
*
mA  
mA  
mA  
CURRENT, quiescent  
THERMAL  
RESISTANCE,  
AC junction to case (Note 5)  
Full temp. range,  
f > 60Hz  
1.2  
1.3  
1.8  
*
*
*
°C/W  
RESISTANCE,  
DC junction to case  
Full temp. range,  
f < 60Hz  
1.6  
30  
25  
*
*
*
°C/W  
°C/W  
°C  
RESISTANCE, junction to air  
Full temperature range  
Meets full range  
specifications  
TEMPERATURE RANGE, case  
-25  
85  
*
*
NOTES: * The specification of PB51A is identical to the specification for PB51 in applicable column to the left.  
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate  
internal power dissipation to achieve high MTTF (Mean Time to Failure).  
2. The power supply voltage specified under typical (TYP) applies, TC = 25°C unless otherwise noted.  
3. Guaranteed by design but not tested.  
4. +VS and –VS denote the positive and negative supply rail respectively.  
5. Rating applies if the output current alternates between both output transistors at a rate faster than  
60Hz.  
6. +VS/–VS must be at least 15V above/below COM.  
The PB51 is constructed from MOSFET transistors. ESD handling procedures must be observed.  
CAUTION  
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not  
crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes.  
EXTERNALꢀCONNECTIONS  
1
2
3
4
5
6
7
8
9
10  
11  
12  
IN  
NC  
NC NC  
NC  
-VS  
+VS  
RCL  
RG  
COM  
CC  
OUT  
TYPICALꢀAPPLICATION  
CF  
RF  
+15V  
+Vs  
IN  
RCL  
RI  
VIN  
12-pinꢀSIP  
PACKAGEꢀSTYLEꢀDP  
Formed leads available. See package styles ED & EE  
OP  
AMP  
OUT  
CC  
RG  
PB51  
COM  
RL  
–15V  
–Vs  
PB51Uꢀ ꢀ  
3ꢀ  
PB51  
2.ꢀ  
100  
80  
TYPICALꢀPERFORMANCEꢀGRAPHS  
POWER DERATING  
CURRENT LIMIT  
OUTPUT VOLTAGE SWING  
2
1.5  
1
14  
12  
10  
60  
VO  
-
8
6
40  
20  
VO  
+
.5  
0
0
–25  
4
.01  
0
25  
50  
75 100 125  
–25  
0
25  
50  
75 100 125  
.05  
1
1.5  
2
CASE TEMPERATURE, TC (°C)  
CASE TEMPERATURE, TC (°C)  
OUTPUT CURRENT, IO (A)  
SMALL SIGNAL RESPONSE  
SMALL SIGNAL RESPONSE  
SMALL SIGNAL RESPONSE  
0
80  
60  
30  
20  
10  
0
–45  
–90  
AVCL = 3  
AVCL = 25  
–45  
AVCL = 10  
AVCL = 25  
AVCL = 10  
AVCL = 3  
40  
20  
0
–90  
–135  
–180  
0
–135  
–180  
CC = 22pF  
CC = 22pF  
–10  
100  
1K  
10K 100K  
1M  
10M  
1K  
10K  
100K  
1M  
10M  
1K  
10K  
100K  
1M  
10M  
FREQUENCY, F (Hz)  
FREQUENCY, F (Hz)  
FREQUENCY, F (Hz)  
QUIESCENT CURRENT  
INPUT OFFSET VOLTAGE  
SLEW RATE VS. TEMP.  
400  
.5  
0
20  
15  
10  
300  
200  
-.5  
-SLEW  
-1  
5
0
100  
0
-1.5  
–25  
–25  
0
25  
50  
75 100 125  
0
25  
50  
75 100 125  
–25  
0
25  
50  
75 100 125  
CASE TEMPERATURE, TC (°C)  
CASE TEMPERATURE, TC (°C)  
CASE TEMPERATURE, TC (°C)  
POWER RESPONSE  
PULSE RESPONSE  
HARMONIC DISTORTION  
300  
200  
80  
60  
.1  
.03  
.01  
DRIVER = TL070  
VS = 60V  
VO = 95VP-P  
40  
100  
20  
0
50  
40  
-20  
-40  
-60  
-80  
30  
.003  
.001  
20  
10  
100K  
300  
1K  
3K  
10K  
30K  
300K  
1M  
3M  
10M  
1
2
3
4
5
6
7
8
FREQUENCY, F (Hz)  
FREQUENCY, F (Hz)  
TIME, t (µs)  
4ꢀ  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀPB51U  
PB51  
GENERAL  
Please read Application Note 1 "General Operating Considerations" which covers stability, supplies, heat sinking,  
mounting, current limit, SOA interpretation, and specification interpretation. Visit www.Cirrus.com for design tools  
that help automate tasks such as calculations for stability, internal power dissipation, current limit; heat sink selec-  
tion; Apex Precision Power’s complete Application Notes library; Technical Seminar Workbook; and Evaluation Kits.  
CURRENTꢀLIMIT  
For proper operation, the current limit resistor (RCL) must be connected as shown in the external connection dia-  
gram. The minimum value is 0.33 with a maximum practical value of 47. For optimum reliability the resistor value  
should be set as high as possible. The value is calculated as follows:  
+IL=.65/RCL+ .010, -IL = .65/RCL.  
SOA  
SAFEꢀOPERATINGꢀAREA  
3
NOTE: The output stage is protected against transient flyback.  
2
However, for protection against sustained, high energy flyback,  
external fast-recovery diodes should be used.  
1
COMPOSITEꢀAMPLIFIERꢀCONSIDERATIONS  
.5  
.4  
.3  
Cascading two amplifiers within a feedback loop has many  
advantages, but also requires careful consideration of several  
amplifier and system parameters. The most important of these  
are gain, stability, slew rate, and output swing of the driver. Op-  
erating the booster amplifier in higher gains results in a higher  
slew rate and lower output swing requirement for the driver, but  
makes stability more difficult to achieve.  
.2  
.1  
10  
20 30 40 50  
100  
200 300  
SUPPLY TO OUTPUT DIFFERENTIAL VOLTAGE, VS –VO (V)  
GAINꢀSET  
The booster’s closed-loop gain is given by the equation below. The composite amplifier’s closed loop gain is deter-  
mined by the feedback network, that is: –Rf/Ri (inverting) or 1+Rf/Ri (non-inverting). The driver amplifier’s “effective  
gain” is equal to the composite gain divided by the booster gain.  
RG = [(Av-1) • 3.1K] - 6.2K  
RG + 6.2K  
Av =  
+1  
3.1K  
Example: Inverting configuration (figure 1) with  
Ri = 2K, Rf = 60K, Rg = 0 :  
Av (booster) = (6.2K/3.1K) + 1 = 3  
Av (composite) = 60K/2K = – 30  
Av (driver) = – 30/3 = –10  
STABILITY  
Stability can be maximized by observing the following guidelines:  
1. Operate the booster in the lowest practical gain.  
2. Operate the driver amplifier in the highest practical effective gain.  
3. Keep gain-bandwidth product of the driver lower than the closed loop bandwidth of the booster.  
4. Minimize phase shift within the loop.  
A good compromise for (1) and (2) is to set booster gain from 3 to 10 with total (composite) gain at least a factor of 3  
times booster gain. Guideline (3) implies compensating the driver as required in low composite gain configurations.  
Phase shift within the loop (4) is minimized through use of booster and loop compensation capacitors Cc and Cf  
when required. Typical values are 5pF to 33pF.  
Stability is the most difficult to achieve in a configuration where driver effective gain is unity (ie; total gain = booster  
gain). For this situation, Table 1 gives compensation values for optimum square wave response with the op amp  
drivers listed.  
PB51Uꢀ ꢀ  
5ꢀ  
PB51  
DRIVER  
CCH  
CF  
CC  
FPBW  
SR  
OP07  
741  
LF155  
LF156  
TL070  
-
22p  
18p  
4.7p  
4.7p  
15p  
22p  
10p  
10p  
10p  
10p  
4kHz  
20kHz  
60kHz  
80kHz  
80kHz  
1.5  
7
>60  
>60  
>60  
-
-
-
22p  
For: RF = 33K, RI = 3.3K, RG = 22K  
TABLE 1.TYPICAL VALUES FOR CASE WHERE OP AMP  
EFFECTIVE GAIN = 1.  
CF  
RF  
+15V  
CCH  
+Vs  
IN  
RCL  
RI  
OP  
AMP  
OUT  
VIN  
PB51  
COM  
COMP  
–15V  
RL  
CC  
GAIN  
RG  
–Vs  
SLEWꢀRATE  
The slew rate of the composite amplifier is equal to the slew rate of the driver times the booster gain, with a maxi-  
mum value equal to the booster slew rate.  
OUTPUTꢀSWING  
The maximum output voltage swing required from the driver op amp is equal to the maximum output swing from  
the booster divided by the booster gain. The Vos of the booster must also be supplied by the driver, and should be  
subtracted from the available swing range of the driver. Note also that effects of Vos drift and booster gain accuracy  
should be considered when calculating maximum available driver swing.  
CONTACTINGꢀCIRRUSꢀLOGICꢀSUPPORT  
For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.  
For inquiries via email, please contact apex.support@cirrus.com.  
International customers can also request support by contacting their local Cirrus Logic Sales Representative.  
To nd the one nearest to you, go to www.cirrus.com  
IMPORTANT NOTICE  
Cirrus Logic, Inc. and its subsidiaries ("Cirrus") believe that the information contained in this document is accurate and reliable. However, the information is subject  
to change without notice and is provided "AS IS" without warranty of any kind (express or implied). Customers are advised to obtain the latest version of relevant  
information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale  
supplied at the time of order acknowledgment, including those pertaining to warranty, indemnification, and limitation of liability. No responsibility is assumed by Cirrus  
for the use of this information, including use of this information as the basis for manufacture or sale of any items, or for infringement of patents or other rights of third  
parties. This document is the property of Cirrus and by furnishing this information, Cirrus grants no license, express or implied under any patents, mask work rights,  
copyrights, trademarks, trade secrets or other intellectual property rights. Cirrus owns the copyrights associated with the information contained herein and gives con-  
sent for copies to be made of the information only for use within your organization with respect to Cirrus integrated circuits or other products of Cirrus. This consent  
does not extend to other copying such as copying for general distribution, advertising or promotional purposes, or for creating any work for resale.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROP-  
ERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). CIRRUS PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED TO BE  
SUITABLE FOR USE IN PRODUCTS SURGICALLY IMPLANTED INTO THE BODY, AUTOMOTIVE SAFETY OR SECURITY DEVICES, LIFE SUPPORT PROD-  
UCTS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF CIRRUS PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUS-  
TOMER’S RISK AND CIRRUS DISCLAIMS AND MAKES NO WARRANTY, EXPRESS, STATUTORY OR IMPLIED, INCLUDING THE IMPLIED WARRANTIES OF  
MERCHANTABILITY AND FITNESS FOR PARTICULAR PURPOSE, WITH REGARD TO ANY CIRRUS PRODUCT THAT IS USED IN SUCH A MANNER. IF THE  
CUSTOMER OR CUSTOMER’S CUSTOMER USES OR PERMITS THE USE OF CIRRUS PRODUCTS IN CRITICAL APPLICATIONS, CUSTOMER AGREES,  
BY SUCH USE, TO FULLY INDEMNIFY CIRRUS, ITS OFFICERS, DIRECTORS, EMPLOYEES, DISTRIBUTORS AND OTHER AGENTS FROM ANY AND ALL  
LIABILITY, INCLUDING ATTORNEYS’ FEES AND COSTS, THAT MAY RESULT FROM OR ARISE IN CONNECTION WITH THESE USES.  
Cirrus Logic, Cirrus, and the Cirrus Logic logo designs, Apex Precision Power, Apex and the Apex Precision Power logo designs are trademarks of Cirrus Logic, Inc.  
All other brand and product names in this document may be trademarks or service marks of their respective owners.  
6ꢀ  
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀPB51U  

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