CM118B_技术文档

CM118B

Highly Integrated & Configurable USB Audio Single Chip

DESCRIPTION

FEATURES

The CM118B is a highly integrated, crystal-less USB

audio single chip solution optimized for USB

headset, headphone, dongle, microphone and

application such as VoIP (voice over Internet



Compliant with USB 2.0 Full Speed Operation

Compliant with USB Audio Device Class v1.0

Supports USB Suspend/Resume Mode and Remote

Wakeup with Volume Control pins

protocol).

All essential analog modules are

embedded in the CM118B, including dual DAC and

ADC, earphone driver, microphone booster, PLL,

regulator, and USB transceiver. It also supports 3

GPIO pins. In addition, audio adjustment can be

easily controlled via specific HID compliant volume

control pins. Many features such as headset,

headphone and microphone only topologies are

programmable with jumper pins. Vender can

customize unique USB VID / PID / Product String /

Manufacture String and min/max/initial volumes to

the external EEPROM. The CM118B also offers

anti-pop noise circuits design and internal oscillator

which can operate without an external crystal

oscillator.



On-chip oscillator to provide reference sources for

PLL and embedded USB transceiver

Jumper pin for Headset Mode (Playback +

Recording), Microphone Mode (Stereo and Mono

Recording),or

Speaker/Headphone

Mode

(Playback Only)



Jumper pin for Mixer Unit enable/disable under

Headset Mod, and Power Mode setting

I2C interface to access internal registers, and I2S

Output for external DAC

In Headset Mode, USB audio function topology has

2 Input Terminals, 2 Output Terminals, 1 Mixer

Unit, 1 Selector Unit, and 3 Feature Units



In Speaker Mode, USB audio function topology has

1 Input Terminal, 1 Output Terminal, and 1

Feature Unit.

In Microphone Mode, USB audio function topology

has 1 Input Terminal, 1 Output Terminal, 1

Selector Unit and 1 Feature Unit.

BLOCK DIAGRAM

Anti-pop noise design for plug and unplug.

VOLUP

DASCLK

DALRCK

SCLK DAMCLK

PWRSEL

MODE

VOLDN

MUTER

MUTEP

LEDO

LEDR GPIOs

AREG36 DREG33 DREG18

3.6V 3.3V 1.8V

PDSW

MSEL

SDAT SDOUT

I2C

Interface Logics

I2S Out

Regulator

5->3.6, 3.3 & 1.8

LOBS

LOR

USB Control

VRE

F

16 bit

DAC

0 ~ -37dB

ISO Out

Processing

16 bit

DAC

DW

DR

SK

CS

USB

Interface

LOL

EEPROM

SPI

Interface

0 ~ -37dB

8 ~ -22dB

SRAM

USBDP

USBDN

USB

USB TRX

MICINR

16 bit

ADC

12dB/22dB

Booster

23 ~ -22dB

8 ~ -22dB

ISO In

Processing

PLL

RF

48M

12M

MICINL

16 bit

ADC

12dB/22dB

Booster

VREF

23 ~ -22dB

VREF

(1.75V)

VBIAS

(3V)

bandgap

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

RELEASE NOTES

Revision

Date

Description

1.00

23 May 2014

-

First release

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

LIST OF CONTENTS

1. Ordering Information ....................................................................................................................4

2. Pin Descriptions..............................................................................................................................4

2.1 Pin Assignment by Pin Number.....................................................................................................4

2.2 Pin-Out Diagram............................................................................................................................4

2.3 Pin Signal Descriptions..................................................................................................................5

3. USB Topology ..................................................................................................................................7

3.1 Headset Topology with Mixer .......................................................................................................7

3.2 Speaker Topology ..........................................................................................................................8

3.3 Microphone Topology....................................................................................................................9

4. Function Description...................................................................................................................10

4.1 Content Format for EEPROM (93C46).......................................................................................10

4.2 EEPROM SPI Interface Timing Information .............................................................................. 11

4.3 Jumper Pins and Mode Settings...................................................................................................12

4.4 MCU Interface.............................................................................................................................13

4.5 HID Feature and Descriptor.........................................................................................................17

4.6 Internal Registers.........................................................................................................................18

5. Electrical Characteristics...........................................................................................................22

5.1 Absolute Maximum Rating.......................................................................................................22

5.2 DC Specifications ......................................................................................................................22

5.3 Operation Conditions................................................................................................................22

5.4 Electrical Parameters...............................................................................................................23

6. Package dimensions.....................................................................................................................24

Reference................................................................................................................................................25

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

1. Ordering Information

Transport

Media

Storage

Temperature

Product

Package Marking

CM118B

Package Type

LQFP-48 (7 x 7mm)

Green Package

CM118B

Tray

-45 to 120℃

2. Pin Descriptions

2.1 Pin Assignment by Pin Number

Pin #

1

2

3

4

5

6

7

8

Signal Name

DALRCK

DASCLK

VOLDN

SPDIFO

DW

Pin #

13

14

15

16

17

18

19

20

21

22

23

24

Signal Name Pin # Signal Name

Pin #

37

38

39

40

41

42

43

44

45

46

47

48

Signal Name

DREG18

MICONLY

MSEL

MODE

LEDO

DVSS

25

26

27

28

29

30

31

32

33

34

35

36

MICINL

VBIASR

MICINR

AVDD

LOL

GPIO4

GPIO5

GPIO6

MUTEP

LEDR

VOLUP

PDSW

DREG33

USBDP

USBDM

SCLK

SDOUT

DAMCLK

SDAT

DR

SK

CS

LOBS

LOR

AVSS

9

MUTER

PWRSEL

DREG18

DREG33

TEST

AVSS

VBIASL

VREF

AVDD

DVDD

DVSS

10

11

12

AREG36

2.2 Pin-Out Diagram

DREG18

37

38

39

40

41

42

43

44

45

46

47

48

24

23

22

21

20

19

18

17

16

15

14

13

VREF

MICONLY

MSEL

VBIASL

AVSS

VOLUP

PDSW

TEST

LEDR

CM118B

DREG33

USBDP

USBDM

SCLK

MUTEP

GPIO6

GPIO5

GPIO4

DVSS

LQFP-48

SDOUT

DAMCLK

SDAT

LEDO

MODE

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

2.3 Pin Signal Descriptions

Pin #

Symbol

DALRCK

DASCLK

VOLDN

SPDIFO

DR

DW

SK

CS

MUTER

Type

Description

DAC I2S left/right clock

DAC I2S serial clock

Volume down (edge trigger with de-bouncing)

SPDIF Output

EEPROM interface data read from EEPROM

EEPROM interface data write to EEPROM

EEPROM Interface Clock (100KHz)

EEPROM Interface Chip Select

Mute Recording (Edge Trigger with de-Bouncing)

H: Pull Up to 3.3V; L: Pull Down to Ground

Speaker Mode H：Self Power with 100mA；L：Bus Power with

500mA

1

2

3

4

5

6

7

8

9

DO, 2mA, SR

DI, ST, PU

DO, 4mA, SR

DI, 8mA, PD, 5VT

DO, 4mA, SR

DI, ST, PU

10

PWRSEL

DI, ST, PU

Headset Mode H：Bus Power with 100mA；L：Bus Power with

500mA

11

12

13

DREG18

DREG33

MODE

P

1.8V Regulator Output for Digital Core

3.3V Regulator Output for Digital I/O

H: Pull Up to 3.3V; L: Pull Down to Ground

When MICONLY:H

DI, ST, PD

MODE

L：Headset Mode: Playback & Recording

H：Speaker Mode: Playback Only

When MICONLY:L

MODE

L：Stereo MIC Mode: Stereo Recording

H：Mono MIC Mode: Mono Recording

LED for Operation; Output H for Power On; Toggling for Data

Transmit

14

LEDO

DO, SR, 4mA

P

15

16

17

18

19

20

DVSS

GPIO4

GPIO5

GPIO6

MUTEP

LEDR

Digital Ground

DIO, 8mA, PD, 5VT GPIO Pin

DI, ST, PU

DO, SR, 4mA

Mute Playback (Edge Trigger with de-Bouncing)

LED for Mute Recording Indicator; Output H when Recording is

Muted

21

TEST

DI, ST, PD

Test Mode Select Pin; Pull Low for Normal Operation

22

23

24

AVSS

VBIASL

VREF

P

AO

Analog Ground

Microphone Bias Voltage Supply for Left Channel (3V)

Connecting to External Decoupling Capacitor for Embedded

Bandgap Circuit; 1.75V Output

25

26

27

28

29

30

31

32

33

34

35

36

MICINL

VBIASR

MICINR

AVDD

LOL

LOBS

LOR

AVSS

AI

AO

AI

P

AO

P

Microphone Input for Left Channel

Microphone Bias Voltage Supply for Right Channel (3V)

Microphone Input for Right Channel

5V Analog Power for Analog Circuit

Line Out Left Channel

DC 1.75V Output for Line Out Bias

Line Out Right Channel

Analog Ground

AVDD

DVDD

DVSS

5V Analog Power for Analog Circuit

5V Power Supply to Internal Regulator

Digital Grounding

AREG36

3.6V analog power for analog circuit

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

37

38

DREG18

MICONLY

P

1.8V Regulator Output for Digital Core

Microphone only and Headset Topology Selection

H: Pull Up to 3.3V; L: Pull Down to Ground

MICONLY

DI, ST, PU

H: Headset or Speaker Topology

L: Microphone Only Topology

Mixer Enable/Disable or Selector On/Off Pin

H: Pull Up to 3.3V, L: Pull Down to Ground

When MICONLY: H

39

MSEL

DI, ST, PU

MSEL

L: Without AA Mixer

H: With AA Mixer (Default Mute)

When MICONLY: L

MSEL

L: Selector is off

H: Selector is on

Descriptors are changed accordingly

Volume Up (Edge Trigger with de-Bouncing)

Power Down Switch Control (for PMOS Polarity)

0: Normal Mode, 1: Power Down Mode

3.3V Regulator Output for Digital I/O

USB Data D+

USB Data D-

External MCU Serial Bus Clock Pin for I2C

DAC I2S data output

40

41

VOLUP

PDSW

DI, ST, PU

DO, 4mA , OD

42

43

44

45

46

DREG33

USBDP

USBDM

SCLK

P

AIO

DI, ST, PD, 5VT

DO, 2mA, SR

SDOUT

DAC MCLK

47

48

DAMCLK

SDAT

DO, 2mA, SR

11.2896 MHz output for 44.1KHz sampled data and

12.288 MHz output for 48KHz sampled data

DIO, 8mA, PD, 5VT External MCU Serial Bus Data Pin for I2C

Note: DI / DO / DIO – Digital Input / Output / Bi-Directional Pin, AI / AO / AIO – Analog Input / Output / Bi-Directional

Pin, SR – Slew Rate Control, ST – Schmitt Trigger, PD / PU – Pull Down / Pull Up, 5VT – 5 Volt Tolerant (3.3V Pin), OD –

Open Drain, P – Power Supply Pin

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

3. USB Topology

The CM118B supports USB Headset / USB Speaker / USB Microphone topology that can be selected by pins.

Detail setting please refer to chapter 6.4 – Jumper Pins and Mode Setting

3.1 Headset Topology with Mixer

0X09

FEA

0X0F

MIXER

0X06

OT

0X01

IT

0X0D

FEA

0X02

IT

0X0A

FEA

0X07

OT

0X08

SEL

Device Descriptor

Offset

Field

bLength

bDescriptorType

bcdUSB

bDeviceClass

bDeviceSubClass

bDeviceProtocol

bMaxPacketSize0

idVendor

Size

1

2

1

2

Value (Hex)

Description

0

1

2

4

5

6

7

8

10

12

01

0110

00

Total 18 Bytes

Device descriptor

USB 1.1 compliant

Device class specified by interface

Device subclass specified by interface

Device protocol specified by interface

Endpoint zero Size = 8 bytes

Vendor ID

8

0d8c

0016

idProduct

2

Product ID

Device compliant to the Audio Device Class specification

version 1.00

Index of string descriptor that characterizes the

manufacturer

12

14

15

bcdDevice

2

1

0100

01

iManufacturer

iProduct

02

Index of string descriptor that characterizes the product

iSerialNumber

Index of string descriptor that characterizes the device’s

serial number

Configurations number = 1

16

17

1

00

01

bNumConfigurations

Configuration Descriptor

Offset

Field

bLength

bDescriptorType

wTotalLength

Size

1

Value (Hex)

Description

Total 9 Bytes

Configuration descriptor

Total length of data returned for this configuration:

Programmable by MSEL and MODE pin

Number of interfaces supported by this configuration:

0

1

09

02

XXXX

2

4

2

1

bNumInterfaces

04

0: control interface

1: ISO-OUT interface

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

2: ISO-IN interface

Configuration value

Index of string descriptor that characterizes this

configuration

3: INT-IN(HID) interface

5

6

bConfigurationValue

iConfiguration

1

01

00

7

8

bmAttributes

bMaxPower

1

2

80

32

Bus Power and support Remote Wakeup

Maximum power consumption of the USB Device: 100mA

3.2 Speaker Topology

0X01

IT

0X06

OT

0X09

FEA

Device Descriptor

Offset

Field

bLength

bDescriptorType

bcdUSB

bDeviceClass

bDeviceSubClass

bDeviceProtocol

bMaxPacketSize0

idVendor

Size

1

2

1

2

Value (Hex)

Description

0

1

2

4

5

6

7

8

10

12

01

0110

00

Descriptor length

Device descriptor

USB 1.1 compliant

Device class specified by interface

Device subclass specified by interface

Device protocol specified by interface

Endpoint zero packet size

08

0d8c

0016

0100

Vendor ID

Product ID

Device release number

idProduct

bcdDevice

2

Index of string descriptor that characterizes the

manufacturer

Index of string descriptor that characterizes the product

Index of string descriptor that characterizes the serial

number

14

15

16

17

iManufacturer

iProduct

1

01

02

00

01

iSerialNumber

bNumConfigurations

Number of configuration

Configuration Descriptor

Offset

Field

bLength

bDescriptorType

wTotalLength

Size

Value (Hex)

Description

Descriptor length

Configuration descriptor

Total length of data returned for this configuration

Number of interfaces supported by this Configuration:

00: Control

0

1

2

1

2

09

02

008A

4

bNumInterfaces

1

03

01: ISO-Out

02: INT-IN (HID)

5

6

bConfigurationValue

iConfiguration

1

01

00

Configuration value

Index of string descriptor that characterizes this

configuration

7

8

bmAttributes

bMaxPower

1

80

32

Attributes(PWRSEL=0:Bus Powered, 1:SELF Powered)

Maximum power consumption from bus = 100mA

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

3.3 Microphone Topology

0X0A

FEA

0X02

IT

0X08

SEL

0X07

OT

Device Descriptor

Offset

Field

bLength

bDescriptorType

bcdUSB

bDeviceClass

bDeviceSubClass

bDeviceProtocol

bMaxPacketSize0

idVendor

Size

1

2

1

2

Value (Hex)

Description

0

1

2

4

5

6

7

8

10

12

01

0110

00

Descriptor length

Device descriptor

USB 1.1 compliant

Device class specified by interface

Device subclass specified by interface

Device protocol specified by interface

Endpoint zero packet size

08

0d8c

0016

0100

Vendor ID

Product ID

Device release number

idProduct

bcdDevice

2

Index of string descriptor that characterizes the

manufacturer

Index of string descriptor that characterizes the product

Index of string descriptor that characterizes the serial

number

14

15

16

17

iManufacturer

iProduct

1

01

02

00

01

iSerialNumber

bNumConfigurations

Number of configuration

Configuration Descriptor

Offset

Field

bLength

bDescriptorType

wTotalLength

Size

Value (Hex)

Description

Descriptor length

Configuration descriptor

Total length of data returned for this configuration

Number of interfaces supported by this Configuration:

00: Control

0

1

2

1

2

09

02

xxxx

4

bNumInterfaces

1

03

01: ISO-IN

02: INT-IN (HID)

5

6

bConfigurationValue

iConfiguration

1

01

00

Configuration value

Index of string descriptor that characterizes this

configuration

7

8

bmAttributes

bMaxPower

1

80

32

Attributes(PWRSEL=0:Bus Powered, 1:SELF Powered)

Maximum power consumption from bus = 100mA

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

4. Function Description

4.1 Content Format for EEPROM (93C46)

The CM118B integrates USB transceiver, internal oscillator and regulator so that only several passive

components are necessary for the USB interface connection. Default USB descriptors are embedded in the CM118B;

therefore there is no additional design effort needed for a generic USB operation. For customized product,

customer can attach a SPI interface 93C46 EEPROM to override the embedded VID, PID and initial/max/min volume

settings. The CM118B automatically detects 93C46 existence and performs the overwrite function during power up.

Each address has 2-byte data, prefix `0x` means hex number

Address

Description

(Hex)

bit[15:4] Magic Word -- 0x670X where X = bit 4, 3, 2, 1

bit[3] The value within address 0x2A, 0x2B, 0x32 is valid 1: valid 0: invalid

0x00

bit[2] reserved, should be 1

bit[1] serial number enable control 1: enable, 0: disable(default)

bit[0] reserved, should be 1

0x01

0x02

VID 2-byte

PID 2-byte

Serial number 1st byte

(bit15-bit8, first character)

Serial number 12-byte

Product string 1st byte

(bit15-bit8, first character)

Serial number length

(bit7-bit0)

0x03

0x04 ~ 0x09

0x0A

Product string length

(bit7-bit0) [0x3E->30,0x40->31Char]

0x0B ~ 0x19

0x1A

Product string 30-byte (default: USB Audio Device)

Manufacturer string 1st byte Manufacturer string length

(bit15-bit8, first character)

(bit7-bit0) [0x3E->30,0x40->31Char]

0x1B ~ 0x29

Manufacturer string 30-byte (default: C-Media Electronics Inc.)

bit[15: 9] DAC initial volume (7-bit, default = -10dB)

bit[8: 3] ADC initial volume (6-bit, default = 8dB)

bit[2] DAC EEPROM MAX/MIN volume valid

bit[1] ADC EEPROM MAX/MIN volume valid

bit[0] AA EEPROM MAX/MIN volume valid

bit[15:11] AA initial volume (5-bit, default = -7dB)

bit[10] Reserved, should be 0

bit[9] Boost mode 0: 22dB 1:12dB (default)

bit[8] Reserved, should be 0

bit[7] Total Power Control 1:enable, 0:disable(default)

bit[6] Reserved, should be 0

0x2A

0x2B

bit[5] MIC High Pass Filter

bit[4] MIC PLL Adjust

bit[3] MIC BOOST

1:enable(default), 0:disable

1:enable, 0:disable(default)

1:enable (default), 0:disable

bit[2] DAC Output Terminal property 1: Headset, 0: Speaker(default)

bit[1] HID, 1: enable (default), 0: disable

bit[0] Remote wakeup, 1:enable, 0:disable(default)

bit[15:0] DAC Minimum Volume (0xD300, DAC-Min.=-45dB, default=-37dB)

bit[15:0] DAC Maximum Volume (0x0000, DAC-Max.=0dB, default=0dB)

bit[15:0] ADC Minimum Volume(0xEA00, ADC-Min.=-22dB, default=-12dB)

bit[15:0] ADC Maximum Volume(0x1700, ADC-Max.=+23dB, default=+23dB)

bit[15:0] AA Minimum Volume (0xE900, AA-Min.=-23dB, default=-23dB)

bit[15:0] AA Maximum Volume (0x0800,AA-Max.+8dB, default=+8dB)

EE_OPTION2 Register

0x2C

0x2D

0x2E

0x2F

0x30

0x31

bit[3] Reserved, should be 0

0x32

bit[2] Reserved, should be 0

bit[1] Reserved, should be 1

bit[0] EE_Stereo, 1: stereo ADC for headset topology, 0: mono ADC for headset

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

topology

~ END

4.2 EEPROM SPI Interface Timing Information

CS

t_CSS

t_SKH

t_SKL

t_CSH

SK

DI

t_DIS

t_DIH

t_DF

t_PD0

t_PD1

DO(READ)

DO(PROG)

t_SV

STATUS VALID

Symbol

Parameter

Test Condition*

Min

Typ

Max

Units

f_SK

SK Clock Frequency

SK High Time

2.7V<=Vcc<=5.5V

0

200

KHz

t_SKH

2.7V<=Vcc<=5.5V

250

ns

t_SKL

t_CS

SK Low Time

Minimum CS Low Time

CS Setup Time

2.7V<=Vcc<=5.5V

250

50

ns

t_CSS

t_DIS

t_CSH

t_DIH

DI Setup Time

CS Hold Time

DI Hold Time

2.7V<=Vcc<=5.5V

100

0

ns

100

t_PD1

t_PD0

t_SV

Output Delay to"1"

Output Delay to"0"

CS to Status Valid

2.7V<=Vcc<=5.5V

250

ns

CS to DO in High

Impedance

t_DF

2.7V<=Vcc<=5.5V

4.5V<=Vcc<=5.5V

100

10

ns

t_WP

Write Cycle Time

0.1

3

ms

* based on ATMEL 93C46 EEPROM data

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

4.3 Jumper Pins and Mode Settings

Jumper pins can be used to set the configuration of CM118B. These jumper pin settings affect both USB

descriptors and USB audio topology.

4.3.1 MICONLY Pin / Mode Pin and MSEL Pin

If MICONLY pin is switched to 0 (Microphone mode), the recording only function of CM118B is activated and

there’s no playback function declared to the host. At this setting, MODE pin selects MONO/STEREO inputs, and MSEL

pin selects whether the descriptor will have SELECTOR Unit or not. In other cases, when the MICONLY pin is

switched to 1, the device preserved its playback function.

Speaker mode is when MICONLY pin is switched to 1, and MODE pin is also switched to 1, the playback only

function of CM118B is activated and there is no recording function declared to the host. At this setting, MSEL pin is

ignored while only one input terminal, one output terminal and one feature unit is declared in the USB audio

topology. Headset mode is when MICONLY is switched to 1, and MODE pin is switched to 0, the full duplex playback

and recording function is declared to the host. The MSEL pin setting decides to activate MIXER Unit or turn it off.

EEPROM register EE_Stereo, 0x32[0] can be used to determined headset mode with stereo ADC (value set to 1) or

mono ADC (value set to 0) channels.

Topology

MICONLY

MODE

MSEL

EE_Stereo¹

Headset

Headset(Stereo MIC, with Mixer)

Headset (Mono Mic, with Mixer)

Headset (Stereo Mic, without Mixer)

Headset (Mono Mic, without Mixer)

Speaker Only

1

0

1

0

1

0

1

0

Speaker

1

X

Microphone Only

Mono-Mic (with Selector)

Mono-Mic (without Selector)

Stereo-Mic (with Selector)

Stereo-Mic (without Selector)

0

1

0

1

0

1

0

X

1

EE_Stereo is only configurable with EEPROM, and for IC default value EE_Stereo is set to 0.

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

4.3.2 Mode Pin and PWRSEL Pin

PWRSEL pin affects the power configuration of CM118B; together with MODE pin there are four

combinations that are programmable. As show in the table, only speaker mode can switch to self-power

status.

MODE

For Speaker and

Headset Modes

3.3V (Speaker)

GND (Headset)

3.3V

PWRSEL

Self-Powered with 100mA

Bus Power with 100mA

GND

Bus Power with 500mA

MICONLY

3.3V (Microphone)

For Microphone

Mode

3.3V

PWRSEL

Bus Power with 100mA

Bus Power with 500mA

GND

4.4 MCU Interface

On MCU serial interface, the CM118B functions as a slave device with bit rate up to 400Kbps (fast mode). MCU

can read/write 3 bytes to the CM118B device with a 2-bit register address. Since host side and MCU can both access

all of the internal registers, access contention should be avoided on application when both try to access the same

register. The7-bit slave address of the CM118B is assigned as 7’b0111000.

When a one-byte data is written by MCU, the CM118B will transfer totally 4 bytes to the USB host via an

additional interrupt pipe. The sequence of the upward HID report is given by: the button status first (address00);

then register with address01; followed by register with address02; lastly, register with address03. The USB host

will keep polling the upward HID report every 2mS. When there is any button pressed or released, or MCU data

coming, the CM118B will transfer the 4 bytes of HID report to the USB host again.

The CM118B can also transfer one byte MCU data from the USB host to its register. This is accomplished by a

‘Set Output Report’ HID class request via default control pipe. MCU can get this downward byte by polling.

The CM118B has one input pin ‘SCLK’ where it gets serial clock from MCU, and one open-drain output pin ‘SDAT’

where it sends or receives serial signal to or from MCU. As shown below, ‘SDAT’ should best able when ‘SCLK’ is high,

and can only have transition when ‘SCLK’ is low.

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

START and STOP conditions shown below are the exception. Every transaction begins from a STARTand ends with

a STOPor another START (repeated START).

The figure below demonstrates a typical transaction. After every 8 bits sent by the transmitter, the receiver

should send one bit low for positive acknowledgement or one bit high for negative acknowledgement. After the

negative acknowledgement, a STOP or repeated START should follow. The next figure shows more detailed display

about acknowledgement bit. Note that ‘SCLK’ is always driven by the master.

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

The figure below shows a complete data transfer. After a START, MCU should send 7-bit slave address

(7’b0111000) first and then the 8th bit denotes a read transfer when it’s high; or a write transfer when it’s low. The

first acknowledgement is always from the CM118B.

In the write transfer, MCU keeps acting as the master and the transfer direction is not

figure gives an example of one byte write transfer.

changed. The following

The CM118B regards the first DATA byte as the register address. The second DATA byte is the content that MCU

writes at the register address. If there is the third DATA byte, the CM118B will auto-increment this byte to the next

register address.

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

The figure below shows an example of two bytes read transfer. Because the CM118B has auto-increment

function, the second DATA byte will be the register data on the next address.

Note: The USB host tries to get new HID data every 2mS. It’s quite slow. If the continuous write transfers are

too close in terms of time, the former transfer may have no effect.

The figure below shows typical transactions between MCU and t h e CM118B. After a START, MCU should send

7-bit slave address (0111000) first and then the 8^thbit denotes a read transfer when it’s high; or a write transfer

when it’s low.

In a write transfer, MCU keeps acting as the transmitter. The CM118B regards the first DATA byte as the start

register address (it’s better to be 0x00). The next four DATA bytes are the contents that MCU writes to the register

addresses. In a read transfer, two transactions are necessary. MCU resets start register address by the first

transaction. Then MCU changes in order to be the receiver during the second transaction to get four bytes of data.

Note: Bits 0~3 of the first HID byte always reflect the button activity, so they cannot be written by MCU.

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

4.5 HID Feature and Descriptor

HID feature is provided by CM118B, so user settings (volume up / volume down / playback mute button) were

all reported to the host to synchronize host side setting. In addition, CM118B internal registers can be accessed via

HID function call.

USB protocols can configure devices at start up or when they are plugged in at run time. These devices are

broken down into various device classes. Each device class defines the common behavior and protocols for devices

that has similar functions. The HID (Human Interface Device) class is one of the device classes.

The HID class consists primarily of devices that are used by humans to control the operation of computer

systems. Typical examples of HID class devices include keyboards and pointing devices (i.e. mouse, trackballs, and

joysticks)

HID Interface Descriptor

Offset

Field

Size

Value(Hex)

Description

0

1

2

3

bLength

1

09

04

03

00

Sizeofthisdescriptor:9byte

INTERFACE descriptor type

Number of interface: 3

Alternate 0

bDescriptorType

bInterfaceNumber

bAlternateSetting

Number of endpoints used by this

interface:1

4

bNumEndpoints

1

01

5

6

7

bInterfaceClass

bInterfaceSubClass

bInterfaceProtocol

1

03

00

HID Interface Class

No Subclass

Must be set to 0

Index of a string descriptor that describes this

interface

8

iInterface

1

00

HID Descriptor

4.

Offset

Field

Size

Value(Hex)

Description

Total 9 bytes

HID descriptor type

HID class version 1.00

-

0

1

2

4

5

6

bLength

1

2

1

09

21

bDescriptorType

bcdHID

0100

00

bCountryCode

bNumDescriptors

bDescriptorType

01

-

22

Report descriptor

Numeric expression equal to the total size of the

optional descriptor: 60 Bytes

7

wDescriptorLength

2

003C

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

Interrupt in Endpoint Descriptor

5.

Offset

Field

bLength

Size

Value(Hex)

Description

Total 7 bytes

0

1

07

05

bDescriptorType

ENDPOINT descriptor type

IN Endpoint

Endpoint number=3

2

bEndpointAddress

1

87

3

4

6

bmAttributes

wMaxPacketSize

bInterval

1

2

1

03

0004

2

Interrupt endpoint type

Maximum packet size: 4 bytes

2ms

4.6 Internal Registers

All internal registers of the CM118B can be accessed via generic HID functional calls without the need to

develop kernel mode driver. Total of 4bytes of data can be read or write from HID. Input report is for read while

output report is for write. Internal registers of the CM118B are used to control GPIO, S/PDIF output, EEPROM and

MCU data access. Host side HID or external MCU can access the CM118B internal registers. With both sides

accessed to the same set of registers, two-way communication can be achieved.

4.6.1 Access via HID Class Command

HID interrupt will occur when HID_IR0-3 are updated by button status, or updated by MCU (and GPI in

case HID_IR0[7:6] == 2’b00).

HID Get_Input_Report Format

Command Format:

bmRequestType

bRequest

wValue

wIndex

wLength

Data

16’h 00 02

16’h 00 03

(Interface)

8’h 01

16’h 01 00

16’h 00 04

(4 bytes)

8’h A1

Report

(Get_Report)

(Rpt Type + Rpt ID)

Input Data Format:

byte 0

byte1

byte2

byte3

HID IR0[7:0]

HID IR1[7:0]

HID IR2[7:0]

HID IR3[7:0]

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

HID Set_Output_Report Format

Command Format:

bmRequestType

bRequest

wValue

wIndex

wLength

Data

16’h 00 02

16’h 00 03

(Interface)

8’h 09

16’h 02 00

16’h 00 04

(4 bytes)

8’h 21

Report

(Set_Report)

(Rpt Type + Rpt ID)

Output Data Format:

HID OR0[7:0]

byte 0

byte1

byte2

byte3

HID OR1[7:0]

HID OR2[7:0]

HID OR3[7:0]

4.6.2 Register Definitions

Offset 0x00--HID_IR0 (HID input report byte 0)

Bits

7-6

Read/Write

R

Description

When HID_OR0[7] == 1’b0:

Default

0x0

HID_IR0-3 are programmed by MCU (and GPI)

0: HID_IR1 is used as GPI

1: HID_IR0-3 are used as generic HID registers

2: Values written to HID_IR0-3 are also mapped

to MCU_CTRL, EEPROM_DATA0-1, EEPROM_CTRL

3: Reserved

When HID_OR0[7] == 1’b1:

Always 2’b11

5

R

When HID_OR0[7] == 1’b0:

0x0

Generic registers programmed by MCU

When HID_OR0[7] == 1’b1:

Mapped from MCU_CTRL[5]

4

3

R

Reserved

0x0

0: No activity on Record-Mute button

1: Record-Mute button pressed then released

0: No activity on Playback-Mute button

1: Playback-Mute button pressed then released

0: Volume-Down button released

1: Volume-Down button pressed

0: Volume-Up button released

1: Volume-Up button pressed

2

1

0

R

0x0

Offset 0x01--HID_IR1 (HID input report byte 1)

Bits

7-0

Read/Write

R

Description

When HID_OR0[7] == 1’b0:

Default

0x00

GPI (when HID_IR0[7:6] == 2’b00); or Generic

registers programmed by MCU (otherwise)

When HID_OR0[7] == 1’b1:

Mapped from EEPROM_DATA0

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

Offset 0x02--HID_IR2 (HID input report byte 2)

Bits

7-0

Read/Write

R

Description

When HID_OR0[7] == 1’b0:

Default

0x00

Generic registers programmed by MCU

When HID_OR0[7] == 1’b10:

Mapped from EEPROM_DATA1

When HID_OR0[7:6] == 2’b11:

Mappped to ANA_REG1( {2’b11, ANA_REG1[5:0]} )

Offset 0x03--HID_IR3 (HID input report byte 3)

Bits

7-0

Read/Write

R

Description

When HID_OR0[7] == 1’b0:

Default

0x00

Generic registers programmed by MCU

When HID_OR0[7] == 1’b10:

Mapped from EEPROM_CTRL

When HID_OR0[7:6] == 2’b11:

Mapped to ANA_REG2( {1’b0, ANA_REG2[6:0]} )

Offset 0x04--HID_OR0 (HID output report byte 0) (When HID_OR0[7:6] != 2’b11)

Bits

7-6

Read/Write

R/W

Description

0x00: HID_OR1-2 are used for GPO;

HID_OR0, 3 are used for SPDIF

0x01: HID_OR0-3 are used as generic HID registers

0x10: Values written to HID_OR0-3 are also mapped to

MCU_CTRL, EEPROM_DATA0-1, EEPROM_CTRL

(see Note)

Default

0x0

0x11: HID_OR0 Mapped to

Analog Option Reg1 (ANA_REG1[5:0])

5

4

R/W

Reserved

When HID_OR0[7] == 1’b0:

0x0

Valid bit in SPDIF frame

When HID_OR0[7] == 1’b1:

Mapped to MCU_CTRL[4]

When HID_OR0[7:6] == 2’b11

Mapped to T_IAD_[0]

3-0

R/W

When HID_OR0[7] == 1’b0:

0x0

First nibble of SPDIF status channel

When HID_OR0[7:6] == 2’b11:

[3:1] Mapped to [TIADBUF_, T_IREF_, TMOD_]

Note 1: When EEPROM access is done, HID interrupt will occur. USB host will get the result from interrupt pipe

Note 2: HID_OR0 is used for SPDIF when SPDIF_CONFIG[5] == 1’b0

Offset 0x05--HID_OR1 (HID output report byte 1)

Bits

7-0

Read/Write

R/W

Description

When HID_OR0[7:6] == 2’b00:

0: GPO drives L

Default

0x00

1: GPO drives H

When HID_OR0[7:6] == 2’b01:

Generic HID registers

When HID_OR0[7:6] == 2’b10:

Mapped to EEPROM__DATA0

When HID_OR0[7:6] == 2’b11:

Mapped to Power Down Control Register

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

Offset 0x06--HID_OR2 (HID output report byte 2)

Bits

7-0

Read/Write

R/W

Description

When HID_OR0[7:6] == 2’b00:

0: Set GPIO to input mode

Default

0x00

1: Set GPIO to output mode

When HID_OR0[7:6] == 2’b01:

Generic HID registers

When HID_OR0[7:6] == 2’b10:

Mapped to EEPROM_DATA1

When HID_OR0[7:6] == 2’b11:

Mapped to ADC_CTRL2 Control Register

Offset 0x07--HID_OR3 (HID output report byte 3)

Bits

7-0

Read/Write

R/W

Description

When HID_OR0[7:6] == 2’b00:

Category byte of SPDIF status channel

When HID_OR0[7:6] == 2’b10:

Mapped to EEPROM_CTRL

Default

0x00

When HID_OR0[7:6] == 2’b11

Mapped to Analog Option Reg2(ANA_REG2[6:0]

( [6:4] Mapped to TP_INAD_[2:0];

[3:0] Mapped to B_PLL[3:0] )

Note: HID_OR3 is used for SPDIF when SPDIF_CONFIG[5] == 1’b0

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

5. Electrical Characteristics

5.1 Absolute Maximum Rating

Symbol

Dvmin

Parameter

Min Digital Supply

Voltage

Value

– 0.3

Unit

V

Dvmax

Avmin

Max Digital Supply

Voltage

Min Analog Supply

Voltage

Max Analog Supply

Voltage

Voltage on any

Digital Input or

Output Pin

+ 6

– 0.3

V

Avmax

Dvinout

+ 6

–0.3 to +5.5

Avinout

Voltage on any

Analog Input or

Output Pin

–0.3 to +3.96

V

TBstgB

Storage

-40 to +125

+-4000

。C

Temperature Range

ESD Human Body

Mode

ESD (HBM)

V

ESD (MM)

Latch Up

ESD Machine Mode

JEDEC Standard

No.78, Mar 1997

+-200

200

V

mA

5.2 DC Specifications

Min^*

Max^*

Units

Symbol

Parameter

Condition

V_IL

V_IH

V_OL

V_OH

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage

-0.3

2.0

0.0

2.4

0.8

5.5

0.4

3.6

V

I_OL= -2, -4, -8 mA

I_IH= 2, 4, 8 mA

*For digital IO pins only

5.3 Operation Conditions

Operation conditions

Min

Typ

Max

Unit

Analog Supply Voltage

Digital Supply Voltage

4.5

5.0

5.5

V

Total Power Consumption*

Suspend Mode Power Consumption

Operating ambient temperature

-

-15

37.25

1.58

-

mA

。C

70

*Test Conditions: AVDD = 5V, DVDD = 5V, Playback Signal = 1kHz Sine Wave @ full scale, Output Loading = 10kOhm,

LEDs are removed, ADC are operating but Inputs are opened.

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

5.4 Electrical Parameters

Min

Typ

Max

Unit

DAC (10K Ohm Loading)

Resolution

THD + N (-3dBr)

SNR

-

16

-72

93

-

Bits

dB

Silent SNR

-

98

dB

Dynamic range

-

92

-

dB

Frequency response 48KHz

Frequency Response 44.1KHz

Output Voltage (rms)

20

-

20K

-

Hz

Vrms

0.995

DAC (32 Ohm Loading)

Resolution

THD + N (-3dBr)

SNR

-

16

-70

93

-

Bits

dB

Silent SNR

98

dB

Dynamic range

-

92

-

dB

Frequency response 48KHz

Frequency Response 44.1KHz

Output Voltage (rms)

100

-

20K

-

Hz

Vrms

0.442

ADC

Resolution

THD + N (-3dBr)

SNR

Dynamic Range

Frequency Response 48KHz

Frequency Response 44.1KHz

Input Range

-

16

-84

90

88.5

-

bit

dB

Hz

-

100

0

20K

1.000

-

Hz

Vrms

Amplification

Volume Control Initial Value

Volume Control Level

Volume Control Step

-10

-

38

dB

Steps

-37

-

0

-

Microphone Input

Boost Gain

-

12 / 22 (EEPROM)

-

dB

Steps

dB

Gain Adjustment Initial Value

Gain Adjustment Range

Gain Adjustment Steps

Mixer Gain Initial Value

Mixer Gain Adjustment

Mixer Gain Adjustment Steps

8

-

36

-7

-

-12

-

23

-

-23.0

-

8.0

-

32

Steps

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

6. Package dimensions

Dimensions in mm

Symbol

Minimum

8.90

6.90

8.90

6.90

－

Normal

－

Maximum

9.10

7.10

9.10

7.10

－

A

B

C

D

E

F

G

H

I

－

0.50

0.20

－

1.35

－

1.45

1.60

－

0.10

－

J

K

α

0.45

0.10

0°

0.75

0.20

7°

－

Datasheet Revision: 1.00

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CM118B

Highly Integrated & Configurable USB Audio Single Chip

Reference



Universal Serial Bus Specification, Version 2.0

Universal Serial Bus Device Class Definition for Audio Devices, Version 1.0.

Universal Serial Bus Device Class Definition for Human Interface Devices, Version 1.11

－End of Datasheet－

C-MEDIA ELECTRONICS INC.

6F., 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106 R.O.C.

TEL：+886-2-8773-1100

FAX：+886-2-8773-2211

E-MAIL：sales@cmedia.com.tw

Disclaimer:

Information furnished by C-Media Electronics Inc. is believed to be accurate and reliable. However, no responsibility is assumed by C-Media Electronics Inc. for its use, nor for any infringements of

patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent

rights of C-Media. Trademark and registered trademark are the property of their respective owners.

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型号：	CM118B
厂家：	C-MEDIA ELECTRONICS
描述：	Highly Integrated & Configurable USB Audio Single Chip
文件：	总25页 (文件大小：605K)
中文：	中文翻译
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