CM6302 [CMEDIA]
USB High-Quality Dolby® Headphone Solution;
| 型号： | CM6302 |
| 厂家： | 
C-MEDIA ELECTRONICS |
| 描述： | USB High-Quality Dolby® Headphone Solution |
| 文件： | 总40页 (文件大小：1275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CM6302
USB High-Quality Dolby® Headphone Solution
FEATURES
DESCRIPTION
USB specification 2.0 full speed-compliant and
The CM6302 is a highly integrated single-chip USB
audio solution. All essential analog and digital
modules are integrated into the chip, including 2-ch
DAC and 2-ch ADC, earphone/speaker driving
capable, DRC (default off), linear microphone gain
control, PLL, regulator and USB transceiver
modules. As for DAC and ADC quality, this single
chip supports 8khz/16Khz/ 44.1Khz/48Khz sampling
rates with 16-bit resolution.
USB IF-certified
Compatible with Win98SE/WinME/Win2000/
WinXP/Vista without additional drivers
USB audio device specification 1.0 and USB HID
specification 1.1-compliant
Supports control/interrupt/isochroous data
transfers
USB suspend/resume and remote wake-up
support
For higher performance, the CM6302 supported I2S
and I2C interfaces communicate with external
codecs or the MCU for further processing. The
CM6302 is the world’s first multi-channel software-
integrated DSP with Xear 3D and Dolby® Digital
sound. This audio solution is highly suitable for
high-end USB headsets, earphone, audio interface
box or proprietary wireless audio applications.
Embedded USB transceiver and power-on reset
circuit
Single 12MHz crystal input with on-chip PLL
Bus-power and self-power mode options
High-power (500mA) and low-power (100mA)
mode options
SCMS-compliant (Serial Copy Management
System)
BLOCK DIAGRAM
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CM6302
USB High-Quality Dolby® Headphone Solution
TABLE OF CONTENTS
1
2
3
Description and Overview ..............................................................................................4
Features ...................................................................................................................4
Pin Descriptions ..........................................................................................................7
3.1
3.2
3.3
Pin Assignment by Pin Number...............................................................................7
Pin-Out Diagram................................................................................................7
Pin Signal Description .........................................................................................8
4
5
6
7
Block Diagram .......................................................................................................... 10
Ordering Information.................................................................................................. 11
Introduction to Dolby Headphone Technology .................................................................... 12
USB Audio Topology and Descriptors................................................................................ 14
7.1
7.2
7.3
7.4
7.5
7.6
USB Topology.................................................................................................. 14
Device Descriptors ........................................................................................... 15
Configuration Descriptors................................................................................... 16
Standard HID Interface Descriptors....................................................................... 17
Class-specific HID Interface Descriptors ................................................................. 17
Standard HID Interrupt In Endpoint Descriptors ........................................................ 17
8
Function Block Descriptions.......................................................................................... 18
8.1
8.2
8.3
I2C Interface................................................................................................... 18
8.1.1
8.1.2
Master Mode......................................................................................... 18
Slave Mode .......................................................................................... 18
Square S Interface (I2S I/F) ................................................................................ 22
8.2.1
8.2.2
I2S Mode ............................................................................................. 22
Left Justified Mode ................................................................................ 22
Serial Peripheral Interface ................................................................................. 22
8.3.1
the SPI Design Goal and SPI Transactions ...................................................... 23
2-bit Leading Mode ................................................................................ 27
The Serial Interface ............................................................................... 27
8.3.2
8.3.3
8.4
8.5
LED Behavior and Software Control....................................................................... 29
EEPROM Content Data Format ............................................................................. 30
9
Electrical Characteristics............................................................................................. 31
9.1
9.2
9.3
Absolute Maximum Rating .................................................................................. 31
Operation Conditions........................................................................................ 31
Electrical Parameters ....................................................................................... 32
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CM6302
USB High-Quality Dolby® Headphone Solution
10 Frequency Response Graphs.......................................................................................... 33
10.1
10.2
10.3
10.4
10.5
Digital Playback for Line Output Frequency (10K Ohm Loading) .................................... 33
10.1.1
10.1.2
Frequency Response 48Ks/Sec (10K Ohm Loading)........................................... 33
Frequency Response 44.1Ks/Sec (10K Ohm Loading) ........................................ 33
Digital Playback for Line Output Frequency (32 Ohm Loading)...................................... 34
10.2.1
10.2.2
Frequency Response 48Ks/Sec (32 Ohm Loading) ............................................ 34
Frequency Response 44.1Ks/Sec (32 Ohm Loading).......................................... 34
Digital Playback for Line Output Frequency (16 Ohm Loading)...................................... 35
10.3.1
10.3.2
Frequency Response 48Ks/Sec (16 Ohm Loading) ............................................ 35
Frequency Response 44.1Ks/Sec (16 Ohm Loading).......................................... 35
Digital Playback for Line Output Frequency (8 Ohm Loading) ....................................... 36
10.4.1
10.4.2
Frequency Response 48Ks/Sec (8 Ohm Loading).............................................. 36
Frequency Response 44.1Ks/Sec (8 Ohm Loading) ........................................... 36
Digital Playback for Line Output Frequency (4 Ohm Loading) ....................................... 37
10.5.1
10.5.2
Frequency Response 48Ks/Sec (4 Ohm Loading).............................................. 37
Frequency Response 44.1Ks/Sec (4 Ohm Loading) ........................................... 37
10.6
10.7
ADC (Line In) Frequency Response ........................................................................ 38
ADC (Mic In) Frequency Response ......................................................................... 38
Reference ...................................................................................................................... 39
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CM6302
USB High-Quality Dolby® Headphone Solution
1 Description and Overview
The CM6302 is a highly integrated single-chip USB audio solution. All essential analog and digital modules are
integrated into the chip, including 2-ch DAC and 2-ch ADC, earphone/speaker driving capable, DRC function
(default off), linear microphone gain control, PLL, regulator and USB transceiver modules. As for DAC and ADC
quality, this single chip supports 8khz/16Khz/44.1Khz/48Khz sampling rates with 16-bit resolution.
For higher performance, the CM6302 supported I2S and I2C interfaces communicate with external codecs or
the MCU for further processing. The CM6302 is the world’s first multi-channel software- integrated DSP with
Xear 3D and Dolby® Digital sound. This audio solution is highly suitable for high-end USB headsets, earphone,
audio interface box or proprietary wireless audio applications.
Many features are programmable with jumper pins or by external EEPROM. In addition, audio adjustments can
be easily controlled via specific HID-compliant volume control pins. Also, 8 GPIO pins can be accessed with
customer application software for additional value-added applications.
Furthermore, Dolby® Headphone technology provides an amazing sound experience for PC audio and gaming
entertainment. This technology works by creating an acoustic illusion: it makes you think you are hearing a
five-speaker home theater system, when in fact you are listening to headphones. This illusion is based on a
fundamental understanding of how we are able to judge which direction a sound is coming from, how far away
it is, and whether it is in motion. It can even locate and track many sounds at the same time.
2 Features
USB specification 2.0 full speed-compatible and USB IF-certified
Compatible with Win98SE/WinME/Win2000/WinXP/Vista without additional drivers
USB audio device class specification 1.0- and USB HID class specification 1.1-compliant
Supports control/interrupt/isochroous data transfers
USB suspend/resume and remote wake-up support
Embedded USB transceiver and power-on reset circuit
Single 12MHz crystal input with on-chip PLL
Bus-power and self-power mode options supported
High-power (500mA) and low-power (100mA) mode options supported
For the mixer enable mode, the USB audio topology has 4 input terminals, 2 output terminals, 1 mixer
unit, 1 selector unit and 5 feature units
For mixer disable mode, USB audio function topology has 3 input terminals, 1 output terminals, 1 selector
unit and 3 feature units
AES/EBU IEC60958 specification-compliant (consumer format S/PDIF input/output with loop-back support)
SCMS-compliant (Serial Copy Management System)
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CM6302
USB High-Quality Dolby® Headphone Solution
Customizable PID/VID/product string/manufacturer string for device naming
Supports a series number string for operation system detection
Serial EEPROM programming interface supported for customizing VID/PID/product string,configuration and
24C02 data formats
2-channel DAC output:
DAC sampling rate from 8Khz, 16Khz, 44.1Khz to 48Khz, with 16-bit resolution
Dynamic range: 95db, THD+N -85db ~! -91dB
Earphone buffer driving for output
1.2Vrms biased at 2.25V output swing
2CH ADC:
ADC sampling rate from 8Khz, 16Khz, 44.1Khz to 48Khz, with 16-bit resolution
Dynamic Range: 88db, THD+N -79db ~ -84dB
Digital linear microphone gain control function (-6db~33db)
1Vrms biased at 2.25V input swing supported stereo-mixer function
Playback with soft-mute function
Microsoft HID volume control with Vol_Up, Vol_Dn, Playback_Mute and Record_Mute
2-ch MIC mode support with single mixer control on Microsoft mixer UI
Supports I2C & SPI (master/slave) control interface for external controller used
MCU read/write support 8-byte data transfer bandwidth
Supports 3 LED indicator pins:
1. On/Off/Operation
2. Playback mute
3. Recording mute
I2S interface supports u-Law, A-Law, and linear PCM formats
I2C interface support master/slave mode and with 3-wire serial interface
I2C Interface to communicate with the MCU for advanced applications
MCU/EEPROM/GPIO control via HID/vendor command interface
Supports 8 GPIO pins
Isochronous transfer adaptive mode with an internal PLL for synchronization
Embedded power-on-reset block
Single 5V power supply with embedded 5V to 3.3V regulator
Embedded anti-pop circuit with internal feedback structure
Industry-standard LQFP 64-pin package
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CM6302
USB High-Quality Dolby® Headphone Solution
Supported Xear-3D® and Dolby Digital® Added Software:
Supports Dolby® Headphone DSP sound technology software for a high-performance listening experience
Xear 3D Sound (C-Media patented driver) Software with Speaker Shifter and virtual 7.1-ch effects on
Windows operation systems
Application Reference:
(a) High-quality USB Dolby-certified headsets
(b) High-end USB earphones
(c) USB audio interface boxes
(d) Proprietary USB wireless audio
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CM6302
USB High-Quality Dolby® Headphone Solution
3 Pin Descriptions
3.1 Pin Assignment by Pin Number
Pin
1
Signal Name
DAC_BCLK
DAC_MCLK
DAC_DOUT
DAC_LRCK
PWRSEL_2
TEST
Pin
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Signal Name
LED_3
Pin
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Signal Name
AVSS
Pin
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Signal Name
REGV_4V5
AVSS
2
XTAL_I
MICL
3
XTAL_O
SPI_MOSI
SPI_MISO
HID_EN
MICR
MIXER_EN
I2S_ENB
4
LINIL
5
LINIR
ADC_BCLK
ADC_MCLK
ADC_DIN
ADC_LRCK
VOL_UP
6
VREF
7
GPIO_1
SPI_SCK
SPI_CS0
I2C_SCLK
I2C_SDAT
I2C_INT
USB_DP
USB_DM
DVSS
VBIAS_1
VBIAS_2
AVDD
8
GPIO_2
9
GPIO_3
10
11
12
13
14
15
16
GPIO_4
AVSS
VOL_DN
GPIO_5
LNOUTL
AVDD
SPDIF_I
GPIO_6
MUTE_REC
MUTE_PLAY
SPDIF_O
DVSS
GPIO_7
LNOUTR
AVSS
GPIO_8
LED_2
REGV_3V3
DVDD_5V
AVDD
LED_1
AVDD
PDSW
3.2 Pin-Out Diagram
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CM6302
USB High-Quality Dolby® Headphone Solution
3.3 Pin Signal Description
No.
Symbol
Type
Description
I2S bit clock for DAC
1
2
3
4
DAC_BCLK
DAC_MCLK
DAC_DOUT
DAC_LRCK
DO
DO
DO
DO
I2S master clock for DAC
I2S data output for DAC
I2S left/right word clock for DAC
Power consumption selector
(0: 500mA; 1: 100mA)
Test mode select
5
6
PWRSEL_2
TEST
DIO, PU
DI, PD
(0: Normal mode; 1: Test mode)
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
General purpose I/O pin
LED (Mute Play)
LED (Play or Record)
LED (Mute Record)
XTAL IN
XTAL OUT
SPI
7
8
9
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
GPIO_6
GPIO_7
GPIO_8
LED_2
LED_1
LED_3
XTAL_I
XTAL_O
SPI_MOSI
SPI_MISO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DIO
DO
DO
DO
DI
DO
10
11
12
13
14
15
16
17
18
19
20
21
DIO
DIO
SPI
HID bottom function enable
(0: Disable; 1: Enable)
SPI
22
HID_EN
DI, PU
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
SPI_SCK
SPI_CS0
I2C_SCLK
I2C_SDAT
I2C_INT
USB_DP
USB_DM
DVSS
DIO
DIO
OD, DIO
OD, DIO
DO
AIO
AIO
P
SPI
I2C serial clock/EEPROM 24c02 serial clock
I2C serial data/EEPROM 24c02 serial data
I2C interrupt output
USB D+
USB D-
Digital ground
5V->3.3V regulator output
Digital power pin 5V
Analog ground
MIC0 in left channel
MIC0 in right channel
Line in left channel
Line in right channel
Bandgap reference output 2.25V
Mic bias voltage 2.25V/4.5V
Mic bias voltage 2.25V/4.5V
Analog power
REGV_3V3
DVDD_5V
AVSS
AO
P
P
AI
AI
AI
AI
AO
AO
AO
P
MICL
MICR
LINIL
LINIR
VREF
VBIAS_1
VBIAS_2
AVDD
AVSS
LINOUTL
AVDD
P
AO
P
Analog ground
Line out for left channel
Analog power
LINOUTR
AO
Line out for right channel
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CM6302
USB High-Quality Dolby® Headphone Solution
No.
Symbol
Type
Description
46
47
48
49
50
AVSS
AVDD
AVDD
P
P
P
AO
P
Analog ground
Analog power
Analog power
4.5V regulator output
Analog ground
REGV_4V5
AVSS
Mixer AA-path enable
51
52
MIXER_EN
I2S_ENB
DI, PU
DI, PU
(0: Disable; 1: Enable)
External I2S codec enable
(0: Enable; 1: Disable)
I2S for ADC
I2S for ADC
I2S for ADC
53
54
55
56
57
58
59
60
61
62
63
ADC_BCLK
ADC_MCLK
ADC_DIN
ADC_LRCK
VOL_UP
VOL_DN
SPDIF_I
MUTE_REC
MUTE_PLAY
SPDIF_O
DVSS
DO
DO
DI, PD
DO
DI, PU
DI, PU
DI
DI, PU
DI, PU
DO
I2S for ADC
HID volume up
HID volume down
SPDIF IN
HID Recoding Mute
HID Playback Mute
SPDIF OUT
P
Digital ground
Power down switch output
(0: Normal Operation; 1: Suspend)
64
PDSW
OD, 5V tor
*Notes:
DI -> Digital Input
AI -> Analog Input
OD -> Open Drain
5V -> 5V Torrent
DO -> Digital Output
DIO -> Digital I/O
AO -> Analog Output
PU -> Internal Pull Up
AIO -> Analog I/O
PD -> Internal Pull Down
P
-> Power
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CM6302
USB High-Quality Dolby® Headphone Solution
4 Block Diagram
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CM6302
USB High-Quality Dolby® Headphone Solution
5 Ordering Information
Operating Ambient
Temperature
Model Number
Package
Supply Range
64-Pin LQFP
CM6302
0oC to +70oC
DVdd = 5V, AVdd = 5V
10mm × 10mm × 1.7mm (plastic)
Note: Physical Dimensions shown in inches and millimeters
64-Lead Thin Plastic Quad Flatpack (LQFP)
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CM6302
USB High-Quality Dolby® Headphone Solution
6 Introduction to Dolby Headphone Technology
Have you ever imagined having a home theater system that will not disturb your neighbors? Have you ever
imagined watching a film and enjoy cinema-quality sound? Have you ever imagined you would enjoy listening
to a symphony orchestra through earphones?
With Dolby® audio technology, your imagination can turn into reality. Dolby's earphone technology has a
revolutionary signal processing system that can handle audio frequency signals on up to five sound channels,
from any source, resulting in some serious 3D surround sound. C-media integrates this technology into its audio
drivers.
Any kind of audio or video products can use Dolby's earphone technology if they have an audio frequency
output interface. The more important thing is this technology can improve the sound quality of any pair of
stereo earphones.
Dolby Headphone technology allows users to wear any set of headphones and listen to music, watch movies, or
play video games with the dramatic surround effects of a 5.1-channel soundtrack. Listeners can enjoy the
spacious, natural sound field for hours without feeling fatigued.
Also, Dolby’s powerful processing technology offers specific filters that may be used with any type of program
content. They differ in the sense of the “spatial dimension” they impart. These filters include:
DH1---Reference room: Small, acoustically damped room
DH2---Livelier room: More acoustically live than DH1
DH3---Larger room: Larger room than DH1; more distant and diffuse effect
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CM6302
USB High-Quality Dolby® Headphone Solution
*** Reference documents are from the Dolby website: http://www.dolby.com ***
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CM6302
USB High-Quality Dolby® Headphone Solution
7 USB Audio Topology and Descriptors
7.1 USB Topology
Mixer
FEA
IT
OT
USB STREAM
SPEAKER
FEA
FEA
IT
FEA
FEA
MIC
SEL
OT
USB STREAM
IT
LINE-IN
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CM6302
USB High-Quality Dolby® Headphone Solution
7.2
Device Descriptors
Offset
0
Field
bLength
Size
1
Value (Hex)
Description
12
01
Descriptor length
Device descriptor
USB 1.1-compliant
1
bDescriptorType
bcdUSB
1
2
2
0110
00
4
bDeviceClass
bDeviceSubClass
bDeviceProtocol
bMaxPacketSize0
idVendor
1
Device class specified by interface
Device subclass specified by interface
Device protocol specified by interface
Endpoint zero packet size
5
1
00
6
1
00
7
1
40
8
2
0d8c
010F
0100
03
Vendor ID
10
12
14
15
16
17
idProduct
2
Product ID
bcdDevice
2
Device release number
iManufacturer
iProduct
1
String descriptor Index describing manufacturer
String descriptor Index describing product
1
01
iSerialNumber
bNumConfigurations
1
00 or 02(*) String descriptor Index describing serial number
01 Number of configurations
1
Note 1: When a valid EEPROM is detected, the Vendor ID and Product ID will be replaced with the contents of the EEPROM
Note 2: iSerialNumber is valid only if the external EEPROM contains this information
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CM6302
USB High-Quality Dolby® Headphone Solution
7.3 Configuration Descriptors
Offset
Field
Size
Value (Hex)
Description
0
1
2
bLength
1
1
2
09
02
Descriptor length
bDescriptorType
wTotalLength
Configuration descriptor
0131
Total length of data returned for this configuration:
305 bytes
4
bNumInterfaces
1
04
Number of interfaces supported by configuration:
00: Control
01: ISO-OUT
02: ISO-IN
03: INT-IN (HID)
5
6
7
bConfigurationValue
iConfiguration
1
1
1
01
00
Configuration value
String descriptor index describing this configuration
Bus-powered with remote wakeup support: 8’ha0
(PWRSEL_1 = 1, HID_EN = 1)
bmAttributes
a0 or
80 or
e0 or
c0
Bus-powered with no remote wakeup: 8’h80
(PWRSEL_1 = 1, HID_EN = 0)
Bus-powered with support remote wakeup: 8’he0
(PWRSEL_1 = 0, HID_EN = 1))
Bus-powered with no remote wakeup: 8’hc0
(PWRSEL_1 = 0, HID_EN = 0))
8
bMaxPower
1
32 or fa
Maximum power consumption from bus = 100mA:
8’h32 (50x2 mA) (PWRSEL_2 = 1)
Maximum power consumption from bus = 500mA:
8’hfa (250x2 mA) (PWRSEL_2 = 0)
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CM6302
USB High-Quality Dolby® Headphone Solution
7.4 Standard HID Interface Descriptors
Offset
Field
Size
Value (Hex)
Description
1
0
1
2
3
4
5
6
7
8
bLength
09
04
03
00
01
03
00
00
00
Descriptor length
1
1
1
1
bDescriptorType
bInterfaceNumber
bAlternateSetting
bNumEndpoints
bInterfaceClass
bInterfaceSubClass
bInterfaceProtocol
iInterface
Interface descriptor
Interface number: 03
Alternate interface
Number of endpoints used by this interface
HID interface class
1
1
1
1
Subclass code
Protocol code
Interface string descriptor index
7.5 Class-specific HID Interface Descriptors
Offset
Field
Size
Value (Hex)
Description
0
1
2
4
5
6
7
bLength
1
1
2
1
1
1
2
09
21
Descriptor length
HID descriptor type
HID class version
No country code
bDescriptorType
bcdHID
0100
00
bCountryCode
bNumDescriptors
bDescriptorType
wDescriptorLength
01
One HID class descriptor
Report Descriptor
22
0032 / 001a HID class descriptor length in byte: 50/26 bytes
(Enable/Disable HID Button)
7.6 Standard HID Interrupt In Endpoint Descriptors
Offset
Field
Size
Value (Hex)
Description
0
1
2
3
4
6
bLength
1
1
1
1
2
1
07
05
Descriptor length
bDescriptorType
bEndpointAddress
bmAttributes
wMaxPacketSize
bInterval
Endpoint descriptor
87
IN endpoint, endpoint number: 7
Interrupt endpoint
03
0010
01
Maximum packet size: 16 bytes
1ms
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CM6302
USB High-Quality Dolby® Headphone Solution
8 Function Block Descriptions
8.1 I2C Interface
8.1.1 Master Mode
8.1.2 Slave Mode
“7-bit slave address = 7’b0111000”
On the MCU serial interface, the CM6302 serves as a slave device with bit rate up to 400Kbps (fast mode). The
MCU can write data to the CM6302 or read data from the CM6302 (no size limitations when using the I2C
Interface). Since the host side and MCU both have access to all the internal registers, access contention when
both host and MCU try to access the same register should be avoided upon application. The CM6302’s 7-bit
slave address is assigned as 7’b0111000.
When data is written by the MCU, the CM6302 will NOT transfer any interrupts to the PC until the INT bit of the
I2C control register has been set by the MCU. The USB host will keep polling the upward HID report every 1ms.
When any button is pressed or released, or there is incoming MCU data, the CM6302 will transfer 16 bytes of
HID report to the USB host.
In I2C Slave Mode, the CM6302 has one open-drain input pin (SCLK) from where it receives the serial clock from
the MCU, and one open-drain I/O pin (SDAT) from where it sends or receives serial signals to/from the MCU. As
shown below, SDAT should be stable when SCLK is high, and can transition only when SCLK is low.
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CM6302
USB High-Quality Dolby® Headphone Solution
START and STOP conditions shown below are the exception. Every transaction begins from a START, and ends
with a STOP, or another START (repeated START).
The figure below demonstrates a typical transaction. After every 8 bits sent by the transmitter, the receiver
should send one bit low for positive acknowledgement or one bit high for negative acknowledgement. After
the negative acknowledgement, a STOP or repeated START should follow. The next figure shows more details
about the acknowledgement bit. Note that SCLK is always driven by the master.
P
SDAT
Sr
MSB
Acknowledgement
Acknowledgment
Signal from Receiver
Signal from Receiver
SCLK
Sr
or
P
S
or
Sr
2
2
1
8
9
3 - 8
9
1
7
ACK
ACK
START or Repeated
START Condition
STOP or Repeated
START Condition
Data Transfer on the MCU Interface
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CM6302
USB High-Quality Dolby® Headphone Solution
The figure below shows a complete data transfer. After a START, the MCU should send a 7-bit slave address
(7’b0111000) first, with the 8th bit denoting a read transfer when it’s high, or a write transfer when it’s low.
The first acknowledgement always comes from the CM6302.
During the write transfer, the MCU continues acting as the master, and the transfer direction is not
The following figure gives an example of one byte write transfer.
changed.
MCU write:
S
0x70
0
addr
0
Byte 0
0
Byte 1
0
….
0
Byte N
0
P
From CM6302 to MCU
START condition
From MCU to CM6302
STOP condition
S
0
P
1
Positive acknowledge
One byte data
Negative acknowledge
Byte N
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CM6302
USB High-Quality Dolby® Headphone Solution
0x70 is the slave address that tells the CM6400 when it’s receiving a write command. The CM6302 regards the
first incoming data byte as the register address. The second data byte is the content that the MCU writes at
the register address. The CM6302 will then auto-increment the register address to the next register address
for the following data writes.
The MCU read command cannot set the register address, so the MCU may use a write command to set the
register address first, before starting the read command. Because the CM6302 auto-increments the register
address, the second data byte will be the register data on the next address. The figure below shows an
example of a read transfer:
MCU read:
0
0
addr
0
0
S
S
0x70
0x71
Byte 0
Byte 1
0
…..
0
Byte N
1
P
From CM6302 to MCU
START condition
From MCU to CM6302
STOP condition
S
0
P
1
Positive acknowledge
One byte data
Negative acknowledge
Byte n
The figure below gives a complete picture of a typical transaction between the MCU and CM6302. After a
START, the MCU should send a 7-bit slave address (7’b0111000) first, with the 8th bit denoting a read transfer
when it’s high, or a write transfer when it’s low.
MCU write:
S
0x70
0
addr
0
Byte 0
0
Byte 1
0
…..
0
Byte N
0
P
MCU read:
S
S
0x70
0x71
0
0
addr
0
Byte 0
0
Byte 1
0
…..
0
Byte N
1
P
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CM6302
USB High-Quality Dolby® Headphone Solution
From CM6302 to MCU
From MCU to CM6302
STOP condition
S
0
START condition
Positive acknowledge
One byte data
P
1
Negative acknowledge
Byte N
During a write transfer, the MCU acts as the transmitter. The CM6302 will regard the first byte of data
received as the start register address. The following DATA bytes are the contents of the registers that the MCU
has requested. In a read transfer, two transactions are necessary. The MCU resets the start register address by
the first transaction, then direction changes for the MCU to receive data in the second transaction.
8.2 Square S Interface (I2S I/F)
8.2.1 I2S Mode
8.3 Serial Peripheral Interface
The SPI interface is used to transfer control data between the CM6302 and external codecs. However, it is not
a standard interface. Every vendor has their own implementation, and each implementation is different.
Generally speaking, all of them are comprised of four signals: spi_cen, spi_clock, spi_data_o, spi_data_i.
Their meanings are as follows:
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CM6302
USB High-Quality Dolby® Headphone Solution
spi_cen: the SPI chip enable signal that is used to inform a codec when it should latch the data
spi_clock: the SPI clock signal
spi_data_o: the SPI data output to codec
spi_data_i: the SPI data input from codec
8.3.1 SPI Design Goal and SPI Transactions
Our goal is to design a robust SPI interface that suits all existing codecs. After analyzing the SPI codecs, we
have listed the following difference among them:
1)
An SPI interface that can read data from a codec and write data to a codec has 4 wires, but some
codecs only support input data. In other words, the data in the codec registers cannot be retrieved
by the audio processor. This later kind of codec only needs 3 wires.
An SPI transaction length is 2 or 3 bytes depending on the codec.
2)
3)
Some codec latch control data is at the SPI clock high state, but some codec latch control data is at
the SPI clock low state
4)
The upmost SPI clock frequencies are different for each codec.
In response to point one, we have designed a 4-wire SPI interface, which is able to accommodate the 3-wire
SPI interface as well. For points 2 and 3, control bits in the SPI interface of the CM6302 are used to initiate
2-byte or 3-byte data transfers, and maintain SPI clock high or low at codec latching data. All of these can be
observed in the following figures A ~ E.
SPI 3-byte Write Transaction
codec latch data at spi_clk = 1
spi_cen
spi_clk
data in address offset B0h
data in address offset B1h
data in address offset B2h
spi_data_o 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LSB
MSB
R/W bit is somewhere between bit23~bit16,
depending on different codecs
spi_data_i
High impedance
Fig. A. An SPI 3-byte write transaction with codec latching data at spi_clk high state
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CM6302
USB High-Quality Dolby® Headphone Solution
SPI 3-byte Write Transaction
codec latch data at spi_clk = 0
spi_cen
spi_clk
data in address offset B0h
data in address offset B1h
data in address offset B2h
spi_data_o 23 22 21 20 19 18 17 16 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LSB
MSB
R/W bit is somewhere between bit23~bit16,
depending on different codecs
spi_data_i
High impedance
Fig. B. An SPI 3-byte write transaction with codec latching data at spi_clk low state
SPI 3-byte Read Transaction (R/W bit is embedded in spi_data_o[23:16],
CMI8788 latch data at spi_clk=1
but this bit position is dependent on codecs)
spi_cen
spi_clk
data in address offset 9Bh
spi_data_o 23 22 21 20 19 18 17 16
Don’t care
LSB
MSB
MSB
LSB
spi_data_i
High impedance
15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
The bit length of the high
impedance is dependent on
the individual codec.
data will be captured in
address offset B1h, B2h
This line is not fixed. It can be moved to
the left or right depending on codecs
Fig. C. An SPI 3-byte read transaction with codec latching data at spi_clk high state.
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CM6302
USB High-Quality Dolby® Headphone Solution
SPI 2-byte Write Transaction
codec latch data at spi_clk = 1
spi_cen
spi_clk
data in address offset B0h
data in address offset B1h
spi_data_o 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LSB
MSB
R/W bit is somewhere between bit15~bit8,
depending on different codecs
spi_data_i
High impedance
Fig. D. An SPI 2-byte write transaction with codec latching data at spi_clk high state.
SPI 2-byte Read Transaction (R/W bit is embedded in spi_data_o[15:8],
but this bit position is dependent on codecs)
CMI8788 latch data at spi_clk=0
spi_cen
spi_clk
data in address offset 9Ah
spi_data_o 15 14 13 12 11 10
9
8
Don’t care
LSB
MSB
MSB
LSB
spi_data_i
High impedance
7
6
5
4
3
2
1
0
The bit length of the high
impedance is dependent on
the individual codec.
data will be captured in
address offset B1h
This line is not fixed. It can be moved to
the left or right depending on codecs
Fig. E. An SPI 2-byte read transaction with codecs latching data at spi_clk low state.
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CM6302
USB High-Quality Dolby® Headphone Solution
In order for our SPI interface to be capable of interfacing with all codecs, the content of the data registers
(address offset 9Bh-99h, which includes address, r/w, and data bits) that are written to or read from the
codec are not translated by the hardware SPI interface, but by the system driver. The meaning of the bits in
this register should be interpreted according to the individual codec.
It is important to notice that the contents of this register, after a write transaction completes, have no
meaning. However, after a read transaction completes, you should reference the codec’s documentation to
see how many bits in this register are valid. For example, if the codec is Analog Device AD1837, then
SPI_Data_Reg[9:0] will be valid data.
As the highest SPI clock frequencies are different for many codecs, two control bits are used to adjust the
spi_clk frequency to gain the maximum transfer speed. The CM6302 can control up to six codecs through the
SPI interface, as shown in Fig. F below.
Fig. F. The SPI connection topology
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CM6302
USB High-Quality Dolby® Headphone Solution
8.3.2 2-bit Leading Mode
The 2-bit leading mode is designated for LCM controllers. Its waveform is almost the same as the general SPI
except for two extra bits, RW and RS, in the beginning of each transaction. See the following figure:
8.3.3 The Serial Interface
The serial data is read from the serial data input pin on the rising edge of the serial clocks D7, D6 through D0,
in this order. This data is converted to 8 bits of parallel data on the rising edge of the 8th serial clock cycle for
the processing. The A0 input is used to determine whether or not the serial data input is displaying data or
command data; when A0 = “H”, the data is display data, and when A0 = “L” then the data is command data.
The A0 input is read and used for detection every 8th rising edge of the serial clock after the chip active.
Figure 1 is a serial interface signal chart.
When the CM6302 acts as a SPI slave, the external MCU can read/write registers within the CM6302 through
the SPI interface. Each transaction is 3-bytes long. The first byte is a read/write command indicator. When the
MSB of the first byte is low, it means a read transaction is occurring; otherwise it is a write transaction. The
other bits of the first byte are meaningless. The second byte is the address of the desired register. The third
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CM6302
USB High-Quality Dolby® Headphone Solution
byte, for a read transaction, is meaningless, and meanwhile the MISO would output the data of register. The
third byte, for write transactions, is data.
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CM6302
USB High-Quality Dolby® Headphone Solution
8.4 LED Behavior and Software Control
LED1 (Configure & Play/Rec)
LED2 (Configure & Play Mute)
LED3 (Configure & Rec Mute)
3 times/sec
Always on
1 time/sec
The LED Signal resembles a PWM waveform:
LEDn_ON_Time
LEDn_Cycle_Time
LEDn_ON_Time
…….
LED_Dut
LED_Freq
* Notes: 1) Unit for LED_Duty / LED_Freq (Resolution) = 42.67 uS
2) Unit for LEDn_ON_Time / LEDn_Cycle_Time (Resolution) = 21.85 mS
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CM6302
USB High-Quality Dolby® Headphone Solution
8.5
EEPROM Content Data Format
24c02 (256 x 8 bit)
[ADDR]
[DATA]
0x00,
0x01,
0x02,
0x03,
Magic Word (“C”, 8’h43)
Magic Word (“M”, 8’h4D)
Total Data Length in EEPROM
EEPROM Content Setting
bit 0:
bit 1:
bit 2:
bit 3:
bit 4:
bit 5:
bit 6:
bit 7:
Manufacture String Valid?
Product String Valid?
Serial Number Valid?
Reserved
Playback (DAC) Control Valid?
Recording (ADC) Control Valid?
Mixer (AA-Path) Control Valid?
Enable Remote Wakeup?
(0: No, 1: Yes)
(0: No, 1: Yes)
(0: No, 1: Yes)
(Default 0)
(0:No, 1:Yes)
(0: No, 1: Yes)
(0: No, 1: Yes)
(0: Disable, 1: Enable)
0x04,
0x05,
Reserved
Playback (DAC) Control
bit[5:0]: DAC (Unit f9) initial Volume
(6’h3f ~ 6’h1a, -2.6 ~ -34.5dB/Mute, linear step)
Mute_f9 (DAC) initial Value (0: Un-Mute, 1: Mute)
DRC initial Value (0: Disable, 1: Enable)
bit 6:
bit 7:
0x06,
0x07,
Recording (ADC) Control
bit[4:0]: ADC (Unit fa / fb) initial Volume
(5’h1f ~ 5’h04, +33 ~ -6dB/Mute,
-1.5dB/step)
(Default 0)
Mute_fb (ADC Line) initial Value (0: Un-Mute, 1: Mute)
Mute_fa (ADC Mic) initial Value (0: Un-Mute, 1: Mute)
bit 5:
bit 6:
bit 7:
Reserved
Mixer (AA-Path) Control
bit[5:0]: AA-Path (Unit fd / fe) initial Volume
(6’38 ~ 6’h10,
+22.5 ~ -36dB/Mute,
Mute_fe (AA Line) initial Value
Mute_fd (AA Mic) initial Value
-1.5dB/step)
(0: Un-Mute, 1: Mute)
(0: Un-Mute, 1: Mute)
bit 6:
bit 7:
0x08,
VID (Low Byte)
VID (High Byte)
PID (Low Byte)
PID (High Byte)
0x09,
0x0A,
0x0B,
0x0C ~ 0x29
0x2A ~ 0x65
0x66 ~ 0x75
0x76 ~ 0xFF
Manufacture String (30 bytes)
Product String (60 bytes)
String of Serial Number (16 bytes)
Reserved (Default 0x00)
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CM6302
USB High-Quality Dolby® Headphone Solution
9 Electrical Characteristics
9.1 Absolute Maximum Rating
Symbol
Parameter
Min. digital supply voltage
Max. digital supply voltage
Min. analog supply voltage
Max. analog supply voltage
Voltage on any digital input or output pin
Voltage on any analog input or output pin
Storage temperature range
ESD human body mode
Value
– 0.3
Unit
V
Dvmin
Dvmax
Avmin
Avmax
Dvinout
Avinout
Tstg
+ 6
V
– 0.3
V
+ 6
V
–0.3 to +5.5
–0.3 to +5.5
-40 to +125
3500
V
V
0C
V
ESD (HBM)
ESD (MM)
ESD machine mode
200
V
9.2 Operation Conditions
Operation conditions
Min
Typ
Max
Unit
Analog supply voltage
Digital supply voltage
4.5
4.5
5.0
5.0
300
110
85
5.5
5.5
330
120
-
V
V
Operation power consumption, 4 Ohm loading*
Operation power consumption, 10K Ohm loading*
Standby power consumption
-
-
mA
mA
mA
uA
0C
-
Suspend mode power consumption
-
380
-
-
Operating ambient temperature
0
70
*Notes: Test environment under 25oC, 5.0V, 48K sample rate
Max. output is playing 1K full-scale sine wave, typical output is playing music
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CM6302
USB High-Quality Dolby® Headphone Solution
9.3 Electrical Parameters
Min
Typ
Max
Unit
DAC (10K Ohm Loading)
Resolution
-
-85
-
16
-
Bits
dB
THD + N (20 ~ 20KHz)
Dynamic range (20 ~ 20KHz)
Cross talk (20 ~ 20KHz)
Frequency response 48KHz
Frequency response 44.1KHz
Output voltage (rms)
-
-91
-
95
dB
-100
20
20
-
-
-112
20K
20K
-
dB
-
Hz
-
1.27
-
Hz
Vrms
Deg.
Inter channel phase delay
0.03
ADC
-
0.09
Resolution
16
-
-
-84
-
bit
dB
THD + N (20 ~ 20KHz)
Dynamic range (20 ~ 20KHz)
Frequency response 48KHz
Frequency response 44.1KHz
Input voltage (rms)
-79
-
88
-
dB
20
20
-
20K
20K
-
Hz
-
Hz
1
Vrms
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CM6302
USB High-Quality Dolby® Headphone Solution
10 Frequency Response Graphs
10.1 Digital Playback for Line Output Frequency (10K Ohm Loading)
10.1.1 Frequency Response 48Ks/Sec (10K Ohm Loading)
Audio Precision
08/09/06 15:47:40
dx=-19.980kHz
dy=+0.287 dB
+1
+0.5
-0
-0.5
-0.664
-0.951
-1.5
-2
d
B
r
-2.5
-3
A
-3.5
-4
-4.5
-5
-5.5
-6
20
19.998k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-0.951 dBr A *-0.664 dBr A
-0.952 dBr A -0.664 dBr A
Vista-FrequencyResponse-M48k.at27
10.1.2 Frequency Response 44.1Ks/Sec (10K Ohm Loading)
Audio Precision
08/09/06 16:20:55
dx=19.9774kHz
dy=-4.217 dB
+1
+0.5
-0
-0.346
-1
-1.5
-2
d
B
r
-2.5
-3
A
-3.5
-4
-4.5
-4.563
-5
-5.5
-6
21.5332
19.999k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-0.346 dBr A *-4.563 dBr A
-0.346 dBr A -4.564 dBr A
Vista-FrequencyResponse-M44k.at27
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CM6302
USB High-Quality Dolby® Headphone Solution
10.2 Digital Playback for Line Output Frequency (32 Ohm Loading)
10.2.1 Frequency Response 48Ks/Sec (32 Ohm Loading)
Audio Precision
08/09/06 16:30:39
dx=19.9805kHz
dy=+1.402 dB
+1
+0.5
-0
-0.5
-0.946
-1.5
-2
d
B
r
-2.348
-3
-3.5
-4
A
-4.5
-5
-5.5
-6
20
19.998k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-2.348 dBr A *-0.946 dBr A
-2.387 dBr A -0.946 dBr A
Vista-FrequencyResponse-M48k.at27
10.2.2
Frequency Response 44.1Ks/Sec (32 Ohm Loading)
Audio Precision
08/09/06 16:39:28
dx=19.9774kHz
dy=-3.012 dB
+1
+0.5
-0
-0.5
-1
-1.5
-1.561
d
B
r
-2
-2.5
-3
A
-3.5
-4
-4.5
-4.573
-5
-5.5
-6
21.5332
19.999k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-1.561 dBr A *-4.573 dBr A
-1.590 dBr A -4.572 dBr A
Vista-FrequencyResponse-M44k.at27
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CM6302
USB High-Quality Dolby® Headphone Solution
10.3 Digital Playback for Line Output Frequency (16 Ohm Loading)
10.3.1 Frequency Response 48Ks/Sec (16 Ohm Loading)
Audio Precision
08/09/06 16:56:01
dx=-19.980kHz
dy=-4.032 dB
+1
+0.5
-0
-0.5
-0.941
-1.5
-2
d
B
r
-2.5
-3
A
-3.5
-4
-4.5
-4.973
-5.5
-6
20
19.998k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-0.941 dBr A *-4.973 dBr A
-0.940 dBr A -4.962 dBr A
Vista-FrequencyResponse-M48k.at27
10.3.2
Frequency Response 44.1Ks/Sec (16 Ohm Loading)
Audio Precision
08/09/06 17:03:08
dx=19.9774kHz
dy=-1.229 dB
+1
+0.5
-0
-0.5
-1
-1.5
-2
d
B
r
-2.5
-3
A
-3.5
-3.665
-4
-4.5
-4.894
-5.5
-6
21.5332
19.999k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-3.665 dBr A *-4.894 dBr A
-3.657 dBr A -4.893 dBr A
Vista-FrequencyResponse-M44k.at27
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CM6302
USB High-Quality Dolby® Headphone Solution
10.4 Digital Playback for Line Output Frequency (8 Ohm Loading)
10.4.1 Frequency Response 48Ks/Sec (8 Ohm Loading)
Audio Precision
08/09/06 18:01:23
dx=-19.980kHz
dy=-7.380 dB
+1
+0
-1
-1.214
-2
-3
-4
-5
-6
-7
d
B
r
A
-8
19.998k
20
50
100
200
500
1k
2k
5k
10k
-8.594
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
-1.216 dBr A
*-1.214 dBr A *-8.594 dBr A
-8.597 dBr A
Vista-FrequencyResponse-M48k.at27
10.4.2
Frequency Response 44.1Ks/Sec (8 Ohm Loading)
Audio Precision
08/09/06 18:00:37
dx=19.9774kHz
dy=+5.799 dB
+1
+0
-1
-1.181
-2
-3
-4
-5
-6
d
B
r
A
-6.98
-8
21.5332
19.999k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-6.980 dBr A *-1.181 dBr A
-6.977 dBr A -1.179 dBr A
Vista-FrequencyResponse-M44k.at27
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Rev. 1.9 ︱ Page 36/40
CM6302
USB High-Quality Dolby® Headphone Solution
10.5 Digital Playback for Line Output Frequency (4 Ohm Loading)
10.5.1 Frequency Response 48Ks/Sec (4 Ohm Loading)
Audio Precision
08/09/06 17:39:57
dx=-19.980kHz
dy=-12.604 dB
+1
-0
-0.908
-2
-3
-4
d
B
r
-5
-6
-7
A
-8
-9
-10
-11
-12
-13
19.998k
20
50
100
200
500
1k
2k
5k
10k
-13.512
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-0.908 dBr A *-13.512 dBr A
-0.904 dBr A -13.481 dBr A
Vista-FrequencyResponse-M48k.at27
10.5.2 Frequency Response 44.1Ks/Sec (4 Ohm Loading)
Audio Precision
08/09/06 17:52:58
dx=19.9774kHz
dy=+7.069 dB
+1
-0
-1
-2
-3
-4
-4.52
d
B
r
-5
-6
-7
A
-8
-9
-10
-11
-11.589
-13
21.5332
19.999k
50
100
200
500
1k
2k
5k
10k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
Cursor2
1
1
1
2
Cyan
Yellow Solid
Solid
1
1
Fasttest.Ch.1 Ampl!Normalize Left
Fasttest.Ch.2 Ampl!Normalize Left
*-11.589 dBr A *-4.520 dBr A
-11.559 dBr A -4.516 dBr A
Vista-FrequencyResponse-M44k.at27
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Rev. 1.9 ︱ Page 37/40
CM6302
USB High-Quality Dolby® Headphone Solution
10.6 ADC (Line In) Frequency Response
Audio Precision
A-D FREQUENCY RESPONSE
08/11/06 11:32:41
dx=-2.4475kHz
dy=+0.235 dB
+0.5
+0
-0.5
-1
d
B
F
S
-1.5
-1.703
-1.938
-2.5
-3
20
3.32k 5.7675k
50
100
200
500
1k
2k
10k
20k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
1
1
1
2
Yellow Solid
Cyan Solid
1
1
DSP Anlr.Level A Left
DSP Anlr.Level B Left
*-1.703 dBFS
-1.782 dBFS
Vista-A-D FrequencyResponse.at2c
10.7 ADC (Mic In) Frequency Response
Audio Precision
A-D FREQUENCY RESPONSE
08/11/06 11:35:01
dx=-3.3025kHz
dy=+0.252 dB
+0.5
+0
-0.5
-1
d
B
F
S
-1.5
-1.775
-2.027
-2.5
-3
20
3.32k 6.6225k
5
50
100
200
500
1k
2k
10k
20k
Hz
Sweep Trace Color
Line Style Thick Data
Axis Comment
Cursor1
1
1
1
2
Yellow Solid
Cyan Solid
1
1
DSP Anlr.Level A Left
DSP Anlr.Level B Left
*-1.775 dBFS
-1.600 dBFS
Vista-A-D FrequencyResponse.at2c
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Copyright© C-Media Electronics Inc.
Rev. 1.9 ︱ Page 38/40
CM6302
USB High-Quality Dolby® Headphone Solution
Reference
USB-IF-, USB specification 1.1/2.0-, and USB audio device class specification 1.0-compliant
www.cmedia.com.tw
Copyright© C-Media Electronics Inc.
Rev. 1.9 ︱ Page 39/40
CM6302
USB High-Quality Dolby® Headphone Solution
－End of Datasheet－
C-MEDIA ELECTRONICS INC.
6F., 100, Sec. 4, Civil Boulevard, Taipei, Taiwan 106 R.O.C.
TEL：+886-2-8773-1100
FAX：+886-2-8773-2211
E-MAIL：sales@cmedia.com.tw
Disclaimer:
Information furnished by C-Media Electronics Inc. is believed to be accurate and reliable. However, no responsibility is assumed by C-Media Electronics Inc. for its use, nor for any
infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise
under any patent or patent rights of C-Media. Trademark and registered trademark are the property of their respective owners.
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Copyright© C-Media Electronics Inc.
Rev. 1.9 ︱ Page 40/40
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