CM8888 [CMEDIA]
High-Performance PCI Express Audio Processor;
| 型号： | CM8888 |
| 厂家： | 
C-MEDIA ELECTRONICS |
| 描述： | High-Performance PCI Express Audio Processor PC |
| 文件： | 总25页 (文件大小：482K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
DESCRIPTION
FEATURES
The Oxygen Express™-series HD CM8888 is a high-
quality PCI Express multi-channel audio processor
with an Intel HD Audio specification-compatible
audio chip. It is also a controller that can link HDA
codecs or bridge high-quality I2S codecs. The
CM8888 can be built into home audio electronics or
personal computers to provide high-fidelity sound,
providing a professional audio processing center.
Compatible with PCI Express 1.1 interface, with
bus mastering and burst modes
Embedded 8051-based MCU transcodes HD Audio
commands to link various external I2S codecs
(external 4 or 8KB serial EEPROM is required)
Built-in HD Audio and I2S controllers
I2S interface sample rate supports
192K/176.4K/96K/88.2K/48K/44.1K and
16/24/32-bit resolutions
It supports up to 14 outgoing channels and 12
ingoing channels. The 14 outgoing channels are
composed of 4 playback DMA’s, including a
multi-channel DMA (32 bits, 8 channels, 192k), a
S/PDIF & HDMI DMA (each 32 bits, 2 channels,
192k), and a RTC (real-time communication) DMA
(32 bits, 2 channels, 192k) channels. The 12
ingoing channels are spread out in 3 recording
DMAs (up to 32 bits, 192k).
Integrated 192K/176.4K/96K/88.2K/48K/44.1K
and 16/24-bit S/PDIF transmitter/receiver
Supports SPI/I2C control interface
24.576MHz crystal input required with embedded
PLL for adaptive clock rate
Block Diagram
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Copyright© C-Media Electronics Inc.
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
TABLE OF CONTENTS
Revision History .................................................................................................................3
1
2
3
4
5
6
Description and Overview ..............................................................................................4
Features ...................................................................................................................5
Applications...............................................................................................................8
Software and Features Option.........................................................................................8
Block Diagram ............................................................................................................9
Pin Assignment.......................................................................................................... 10
6.1
Pin-Out Diagram.............................................................................................. 10
7
Electrical Characteristics............................................................................................. 16
7.1
7.2
7.3
7.4
7.5
Maximum Ratings............................................................................................. 16
Recommended Operation Conditions..................................................................... 16
Power Consumption.......................................................................................... 16
DC Characteristics ........................................................................................... 16
AC Timing Characteristics .................................................................................. 17
7.5.1
I2S Signal Timing ................................................................................... 17
Control Interface Timing - 3-Wire Mode ....................................................... 18
EEPROM Interface Timing......................................................................... 20
EEPROM AC Timing Characteristics.............................................................. 21
HD Audio-Link Timing Characteristics: ......................................................... 22
7.5.2
7.5.3
7.5.4
7.5.5
8
Mechanical Specifications ............................................................................................ 24
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Copyright© C-Media Electronics Inc.
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Revision History
Date
Rev.
Release Note
2011/2/24
2011/2/15
2011/05/25
2011/12/02
2012/06/20
2012/11/05
2013/04/24
Rev. 0.5
Rev. 0.6
Rev 0.7
Rev 0.92
Rev 0.93
Rev 1.00
Rev 1.01
First version
Add software and features option chapter
Remove MIDI support
Update electronic characteristics: modified 3.3v power range
Update recommended components: modified some typos
Formal release
Modify Pin39, 40 and 125 description
Modify software features
2013/05/06
2015/06/30
Rev 1.02
Rev 1.1
Modify Pin27, 28, 29, 30 and 31 definition
Modify software features
Remove O.S. information
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
1 Description and Overview
The Oxygen Express™-series HD CM8888 is a high- quality PCI Express multi-channel audio processor with
an Intel HD Audio specification-compatible audio chip. It is also a controller that can link HDA codecs or
bridge high-quality I2S codecs. The CM8888 can be built into home audio electronics or personal computers
to provide high-fidelity sound, providing a professional audio processing center.
It supports up to 14 outgoing channels and 12 ingoing channels. The 14 outgoing channels are composed of
4 playback DMA’s, including a multi-channel DMA (32 bits, 8 channels, 192k), a S/PDIF & HDMI DMA (each
32 bits, 2 channels, 192k), and a RTC (real-time communication) DMA (32 bits, 2 channels, 192k) channels.
The 12 ingoing channels are spread out in 3 recording DMAs (up to 32 bits, 192k).
The Oxygen Express™-series HD CM8888 is a MCU-based audio processor that can link all the currently
popular codecs, from I2S codecs with over 120dB quality to regular HDA codecs. The audio topology for
HDA specifications is flexible only by changing the firmware. The flexibility to change the firmware gives
customers added flexibility when designing their products. The I2S, HDA-Link, 2-wire master bus, and SPI
interfaces are used to transfer audio data and control data between the CM8888 and codecs. To facilitate
the connection with the existing home audio electronics, the CM8888 has incorporated an S/PDIF
transmitter and receiver with a 192k sampling rate.
A built-in master I2C interface connects to the serial EEPROM to store and retrieve non-evaporable data
for firmware code and the customer applications, including as board configuration, sub-vender and
sub-system IDs, or any dynamic data that customers want to save and restore on system power up.
The Oxygen Express™ HD CM8888 series has an independent 2-wire slave bus to communicate with the MCU.
Strictly speaking, this interface is used as a medium system driver and MCU communication. An MPU-401
MIDI UART is also integrated. There are eight GPI phone jack detect pins, which can be used to distinguish
if a device is plugged into a phone jack. In total there are 10 GPIO pins, however, some of them are shared
with other functions.
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
2 Features
Bus
Compatible with PCI Express 1.1 interface, with bus mastering and burst modes
Architecture
Embedded 8051-based MCU transcodes HD Audio commands to link various external I2S codecs
(external 4 or 8KB serial EEPROM is required)
Embedded ROM code for MCU transcoding of HD Audio commands for embedded DACs and ADCs
Built-in HD Audio and I2S controllers offer flexibility in choosing external codecs for different product
applications
Digital mixer to mix all input data to output streams
DMA Controller
Four playback DMAs and three recording DMAs that support MS Vista/Win7 HD Audio controller
requirements, and are WaveRT-port-friendly:
Cyclic DMA engine with a scatter/gather list
Position register is separate from other hardware registers (can be a copy)
Ability to loop on buffers without software intervention
Playback DMA#A supports up to 8-ch audio output (2/4/6/8-ch configurable by SW driver control)
Playback DMA#B supports independent 2-ch audio output (e.g. front headphone out for RTC)
Playback DMA#C supports independent 2-ch audio output (e.g. back headphone out) or S/PDIF for
HDMI output
Playback DMA#D supports independent 2-ch audio output (for S/PDIF output or other purposes)
Recording DMA#A supports up to 8-ch audio input (2/4/6/8-ch configurable by SW driver control)
Recording DMA#B supports independent 2-ch audio input (for RTC headsets)
Recording DMA#C supports independent 2-ch audio input (for S/PDIF input stream or other purposes)
Sampling rates: all DMA channels support 192K/176.4K/96K/88.2K/48K/44.1K PCM data
Resolution (Word-length): all DMA channels support 16/24/32-bit PCM data transfer modes
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Audio I/O
Intel HD Audio Link supports 1 external HDA codec
Six pairs of I2S serial audio output interfaces (12-ch out)
Pair 1~4 use playback DMA#A
Pair 5 uses playback DMA#B
Pair 6 uses playback DMA#C
Six pairs of I2S serial audio input interfaces (12-ch in)
Pair 1~4 use recording DMA#A
Pair 5 uses recording DMA#B
Pair 6 uses recording DMA#C
Integrated 192K/176.4K/96K/88.2K/48K/44.1K, and 16/24/32-bit S/PDIF transmitter with a 2-source
selector/mux (from playback DMA digital mixing, S/PDIF input), including WMA-Pro output support
Integrated 192K/176.4K/96K/88.2K/48K/44.1K, and 16/24/32-bit S/PDIF receiver with 2-input
internal selector/switch for media center/AV receiver features
Built-in MPU-401 MIDI UART I/O port for pro audio applications
All input data can be mixed to output streams for low-latency record monitoring/mixing output
Control Interface
SPI control interfaces with up to 8 external audio devices (5 output devices and 3 input devices)
I2C Interface supports both master and slave modes (master for external audio devices and slave for
additional MCU applications such as remote controls)
Interrupt pin for external MCU read transaction
Serial EEPROM programming interface for customizing sub-vendor and sub-device IDs (and
vendor/device IDs as well), storing HDA power-on pin configuration data (replacing the MB BIOS
function) and 8051 ROM codes (HDA command transcoder)
Maximum 8 jack-detection pins (5 for output jacks and 3 for input jacks)
Maximum 16 GPIO pins for external devices control and other purposes
LED indicator control pin functions while protected content is playing
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Copyright© C-Media Electronics Inc.
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
General
24.576MHz crystal input required with embedded PLL for adaptive clock rate
Single 3.3V power supply
3.3 V digital I/O pads with 5V tolerance
Fully compatible with all mainstream southbridges (Intel, nVIDIA, VIA, SiS)
LQFP-128 package
Default target codecs: CM9882A for HDA; CS5381 (ADC)+PCM1795(DAC) for I2S
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
3 Applications
High-definition PCIe sound cards for the high-performance consumer market
Pro audio/high-end studio applications
Gaming audio devices
Bundling with high-profile VGA cards or motherboard
Embedded system/industrial computer audio
Embedded with high-quality audio HTPC
4 Software and Features Option
Features
Dolby® Home Theater® V4
Dolby® Master Studio
DTS® UltraPC II™
DTS® Connect
CM8888DHT
CM8888DMS
CM8888
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Xear™ 3D EX 1.0
Xear™ Living
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Xear™ VoClear
Xear™ Sonic
Xear™ SingFX
Xear™ Fidelity
Xear™ Pro
FaceLift II GUI
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
5 Block Diagram
Figure 1. Block Diagram for OxygenTM Express CM8888
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Copyright© C-Media Electronics Inc.
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
6 Pin Assignment
6.1 Pin-Out Diagram
81 80 79 78 77 76 75 74 73 72
69 68 67 66 65
71 70
102 101100
84 83 82
99 98 97 96 95 94 93 92 91 90 89 88 87 86 85
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
XMDAC_SDOUT3 103
XMDAC_SDOUT2 104
XSADC_SDIN
XSADC_LRCK
XSADC_SCLK
XSADC_MCLK
DGND
XMDAC_SDOUT1
XMDAC_SDOUT0
DVCC
105
106
107
XGPIO4
XMDAC_LRCK 108
XMDAC_SCLK
XMDAC_MCLK 110
XGPIO3
109
XGPIO2
XGPIO1
DGND
XSPI_CLK
XSPI_DIN
111
112
113
XGPIO0
DVCC
XMADC_SDIN3
XMADC_SDIN2
XMADC_SDIN1
VDD18
XSPI_DOUT 114
VDD18 115
DVCC 116
XSPI_CEN0 117
XSPI_CEN1 118
XSCI_0
XSCO_0
119
120
XSPI_CEN2
XSPI_CEN3
47
46
45
44
43
42
41
40
39
DGND
CM8888 series
XOSC49
DGND 121
XGPI_5 122
XGPI_6 123
XOSC45
XGPIO3
XGPIO2
PCI-E HD Sound Processor
Lot No.-Date Code-GS
UGG1AVC
124
DVCC
XGPIO1
XGPIO0
XSPDIFO_1 125
XSPDIFO_0 126
DGND 127
XSPDIFI_1
XSPDIFI_0
XGPI_7
128
1
2
6
5 7
4 8
3
9
10 11
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38
Figure 2. Pin-Out Diagram for OxygenTM Express-series CM8888
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Pin Descriptions
The following table gives the pin descriptions for the Oxygen ExpressTM-series HD CM8888 series. The
abbreviations used in the pin description table are explained here:
DI:
digital input signal
DO:
DIO:
AI:
digital output signal
digital bidirectional signal
analog input
PU:
PD:
pull-up with 75KΩ resistor
pull-down with 75KΩ resistor
#: low active signal
Table 5.1 Pin description table of Oxygen ExperssTM HD CM8888 series
Pin No.
Pin Name
VDDRX
Type
P
Description
1
2
3
4
5
6
7
8
9
PHY VDD
HSIP
AI
PHY Signal
PHY Signal
PHY GND
HSIN
AI
GNDRX
G
REFCLK_P
REFCLK_M
VDDPLL / VDDTX
HSOP
AI
PHY Signal
PHY Signal
PHY VDD
AI
P
AO
AO
PHY Signal
PHY Signal
HSON
10
11
12
13
14
15
16
17
18
GNDPLL / GNDTX
VDDBIAS
REXT
G
PHY GND
PHY VDD
PHY Signal
PHY GND
P
AO
GNDBIAS
VDD18
G
P
Digital 1.8V Power
Digital Core power
GPIO9, default Input
GPIO10, default Input
GPIO11, default Input
DVCC
P
XGPIO_9
XGPIO_10
XGPIO_11
DIO,PD
DIO,PD
DIO,PD
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
19
DVCC
P
Digital core power
20
21
22
XGPIO_12
XGPIO_13
XGPIO_14
DIO,PD
DIO,PD
DIO,PD
GPIO12, default Input
GPIO13, default Input
GPIO14, default Input
23
24
25
26
27
28
29
30
31
XGPIO_15
GND
DIO,PD
G
GPIO15, default Input
Digital ground
VDD18
P
Digital 1.8V power
DVCC
P
Digital core power
XHDA_SDO
XHDA_BCLK
XHDA_SDI
XHDA_SYNC
XHDA_RSTN
DO
HDA serial data output to codec
HDA 24MHz serial clock output
1st HDA serial data input from codec
HDA frame synchronization
HDA codec reset 0
DO
DIO,PD
DO
DO
SPI chip enable, which select the codec #7 to
be controled
32
33
34
35
XSPI_CEN7
XSPI_CEN6
XSPI_CEN5
XSPI_CEN4
DIO,PU
DIO,PU
DIO,PU
DIO,PU
SPI chip enable, which select the codec #6 to
be controled
SPI chip enable, which select the codec #5 to
be controled
SPI chip enable, which select the codec #4 to
be controled
36
37
XPERSTN
XTEST
DI,PU
DI,PD
PCIe PHY reset no.
Test mode enable
Digital core power
1st S/PDIF receiver
38
39
DVCC
P
XSPDIFI_0
DI
40
41
42
43
44
45
46
XSPDIFI_1
XGPIO_0
XGPIO_1
XGPIO_2
XGPIO_3
XOSC45
DI
2nd S/PDIF receiver
GPIO0, default input
GPIO1, default input
GPIO2, default input
GPIO3, default input
45.1584 MHz Osc in
49.1520 MHz Osc in
DIO,PD
DIO,PD
DIO,PD
DIO,PD
DI,PD
XOSC49
DI,PD
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
47
48
49
50
GND
G
DIO
DIO
P
Digital ground
XSCO_0
XSCI_0
VDD18
24.576 crystal out
24.576 crystal in
Digital 1.8V power
I2S ADC stream A channel 2, channel 3 serial
data input
51
52
53
XMADC_SDIN1
XMADC_SDIN2
XMADC_SDIN3
DIO,PD
DIO,PD
DIO,PD
I2S ADC stream A channel 4, channel 5 serial
data input
I2S ADC stream A channel 6, channel 7 serial
data input
54
55
56
57
58
59
60
61
62
63
DVCC
XGPI_0
P
Digital core power
DIO,PD
DIO,PD
DIO,PD
DIO,PD
DIO,PD
G
JACK A detection input
JACK B detection input
JACK C detection input
JACK D detection input
JACK E detection input
Digital ground
XGPI_1
XGPI_2
XGPI_3
XGPI_4
GND
XSADC_MCLK
XSADC_SCLK
XSADC_LRCK
DO
I2S stream C master clock output
I2S ADC stream C bit clock
I2S ADC stream C left/right sample clock
I2S ADC stream C channel 0/channel 1 serial
data input
DIO,PD
DIO,PD
64
XSADC_SDIN
DI,PD
65
66
67
68
GND
G
Digital ground
X2ADC_MCLK
X2ADC_SCLK
X2ADC_LRCK
DIO,PD
DIO,PD
DI, PD
I2S stream B master clock output
I2S ADC stream B bit clock
I2S ADC stream B left/right sample clock
I2S ADC stream B channel 0/channel 1 serial
data input
69
X2ADC_SDIN
DI,PU
70
71
72
73
DVCC
XMCU_INT
XSSDA
P
Digital core power
DIO,PD
DIO,PU
DIO,PU
2-wire serial bus interupt
2-wire serial bus data
XSSCL
2-wire serial bus clock
I2S ADC stream A channel 0/channel 1 serial
data input
74
75
XMADC_SDIN0
GND
DIO,PD
G
Digital ground
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
76
77
78
79
80
81
82
83
XMADC_MCLK
XMADC_SCLK
XMADC_LRCK
DVCC
DIO,PD
DIO,PD
DIO,PD
P
I2S ADC stream A master clock output
I2S ADC stream A bit clock.
I2S ADC stream A left/right sample clock
Digital core power
XPWDN
DIO,PU
DIO,PD
DIO,PD
DIO,PD
Codec reset (low active)
XGPIO_4
XGPIO_5
XRXD
GPIO4, default input
GPIO5, default input
MPU401 MIDI receiver input (5V tolerance)
MPU401 MIDI transmitter output (5V
tolerance)
84
XTXD
DIO,PD
85
86
87
88
89
90
91
92
VDD18
XGPIO_6
XGPIO_7
GND
P
Digital 1.8V power
DIO,PD
DIO,PD
GPIO6, default input
GPIO7, default input
Digital ground
XGPIO_8
DVCC
DIO,PD
P
GPIO8, default input
Digital core power
XMSDA
XMSCL
DIO,PU
DIO,PU
2-wire serial bus data
2-wire serial bus clock
I2S DAC stream C channel 0/channel 1 serial
data output
93
XSDAC_SDOUT
DO
94
95
96
97
XSDAC_LRCK
XSDAC_SCLK
XSDAC_MCLK
DVCC
DIO,PD
DIO,PD
DIO,PD
P
I2S DAC stream C left/right sample clock
I2S DAC stream C bit clock
I2S ADC stream A master clock output
Digital core power
I2S DAC stream B channel 0/channel 1 serial
data output
98
X2DAC_SDOUT
DIO,PD
99
X2DAC_LRCK
X2DAC_SCLK
X2DAC_MCLK
GND
DIO,PD
DIO,PD
DIO,PD
G
I2S DAC stream B left/Right sample clock
I2S DAC stream B bit clock
I2S DAC stream B master clock output
Digital ground
100
101
102
I2S DAC stream A channel 6/channel 7 serial
data output
103
XMDAC_SDOUT3
DIO,PD
I2S DAC stream A channel 4/channel 5 serial
data output
104
105
XMDAC_SDOUT2
XMDAC_SDOUT1
DIO,PD
DIO,PD
I2S DAC stream A channel 2/channel 3 serial
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
data output
I2S DAC stream A channel 0/channel 1 serial
data output
106
XMDAC_SDOUT0
DIO,PD
107
108
109
110
111
112
113
114
115
116
DVCC
P
Digital core power
XMDAC_LRCK
XMDAC_SCLK
XMDAC_MCLK
GND
DIO,PD
DIO,PD
DIO,PD
G
I2S DAC stream A left/right sample clock
I2S DAC stream A bit clock
I2S DAC stream A master clock output
Digital ground
XSPI_CLK
XSPI_DIN
XSPI_DOUT
VDD18
DIO,PD
DIO,PD
DIO,PD
P
SPI clock output
SPI data input
SPI data output (master) / data input (slave)
Digital 1.8V power
DVCC
P
Digital core power
SPI chip enable, selects codec #0 to be
controlled
117
118
119
120
XSPI_CEN0
XSPI_CEN1
XSPI_CEN2
XSPI_CEN3
DIO,PU
DIO,PU
DIO,PU
DIO,PU
SPI chip enable, selects codec #1 to be
controlled
SPI chip enable, which select the codec #2 to
be controlled
SPI chip enable, which select the codec #3 to
be controlled
121
122
123
124
125
126
127
128
GND
G
Digital ground
XGPI_5
XGPI_6
DVCC
DIO,PD
DIO,PD
P
JACK F detection input
JACK G detection input
Digital core power
XSPDIFO_1
XSPDIFO_0
GND
DO
2nd S/PDIF transmitter
1st S/PDIF transmitter
DO
G
Digital ground
XGPI_7
DIO,PD
JACK H detection input
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
7 Electrical Characteristics
7.1 Maximum Ratings
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC
Parameter
Storge temperature
Symbol
Min
-25
0
Typ
-
Max
+120
70
Units
oC
oC
V
-
-
-
Operating ambient temperature
DC supply voltage(DVCC)
DC supply voltage(AVDD)
I/O pin voltage
25
3.3
1.8
-
3.1
1.62
GND
-
3.6
1.98
VDD
-
V
-
-
V
Power dissipation
W
7.2 Recommended Operation Conditions
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC
Parameter
DVCC Input voltage range
Symbol
Min
VDD-0.2
0
Typ
VDD
-
Max
VDD+0.3
VDD
Units
-
-
V
V
V
DVCC Output voltage range
AVDD Input voltage range
Vavdd-5% Vavdd Vavdd+5%
7.3 Power Consumption
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC
Parameter
Symbol
Min
Typ
203
0.2
Max
Units
mA
Supply current : power up(DVCC+VDD3.3V)
Supply current : power down(DVCC+VDD3.3V)
-
-
-
-
-
-
uA
7.4 DC Characteristics
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC
Parameter
Symbol
Vin
Min
VDD-0.2
0
Typ
Max
VDD+0.3
VDD
Units
Input voltage range
VDD
V
V
Output voltage range
High level input voltage
Low level input voltage
High level output voitage
Low level output voltage
Input leakage current
Vout
Vih
-
-
-
-
-
-
0.7VDD
-
-
V
Vil
0.3VDD
-
V
Voh
Vol
2.4
V
0.4
V
Iil
-10
10
uA
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Output leakage current
Iol
-
-10
-
10
-
uA
mA
mA
Output buffer driver current
SPDIF transmit output driver current
-
-
8
8
-
-
7.5 AC Timing Characteristics
7.5.1 I2S Signal Timing
a.
System Clock Timing
System Clock Timing Diagram
Test Conditions: DVCC = 3.3V, DGND =0V,TA=+25oC,fs=96KHz,MCLK=512fs,24 bit data, unless otherwise stated
System Clock Timing Parameters
Parameter
MCLK clock cycle time
Symbol
tmclk
Min
20
Typ
Max
Units
ns
-
-
-
-
MCLK pulse width high
MCLK pulse width high
MCLK duty cycle
tmclkh
tmclkl
10
ns
10
-
-
ns
40
50
60
%
b.
Audio Interface Timing
Audio Interface Timing Diagram
Test Conditions: DVCC = 3.3V, DGND =0V,TA=+25oC,fs=96KHz,MCLK=512fs,24 bit data, unless otherwise stated
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Audio Interface Timing Parameters
Parameter
Symbol
Tdl
Min
5
Typ
Max
Units
ns
LRCK propagation delay from BCLK falling edge
SDOUT propagation delay from BCLK falling edge
-
-
-
-
Tdd
5
ns
7.5.2 Control Interface Timing - 3-Wire Mode
Control Interface Timing - 3-Wire Diagram
Note: latch data at XSPI_CEN clock low mode, XSPI_CEN clock can be low or high mode
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC, SPI clock 160 ns, unless otherwise stated
Control Interface Timing - 3-Wire Parameters
Parameter
XSPI_CLK rising edge to XSPI_CEN rising edge
XSPI_CLK pulse cycle time
Symbol
Tscs
Min
120
160
80
Typ
Max
Units
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
Tscy
XSPI_CLK pulse width low
Tscl
XSPI_CLK pulse width high
Tsch
Tdsu
Tdho
Tcss
80
XSPI_DOUT to XSPI_CLK set-up time
XSPI_DOUT to XSPI_CLK hold time
XSPI_CEN rising to SCLK rising
40
40
40
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Control Interface Timing - 2–Wire Mode
Control Interface Timing - 2-Wire Diagram
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC, 2-wire, fast-speed mode, unless otherwise stated
Control Interface Timing - 2-Wire Parameters
Parameter
Symbol
Min
400
650
1.3
650
650
650
100
100
650
650
Typ
Max
Units
KHz
ns
XMSCL frequency
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
XMSCL pulse width low
XMSCL pulse width high
Hold time (start condition)
Set-up time (start condition)
Data set-up time
t1
t2
t3
t4
t5
t6
t7
t8
t9
us
ns
ns
ns
XMSDI,XMSCL rise time
ns
XMSDI,XMSCL fall time
ns
Set-up time (stop condition)
Data hold time
ns
ns
Note: test parameters at 2 wire, fast-speed mode
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
7.5.3 EEPROM Interface Timing
EEPROM Interface Timing Diagram
Test Conditions: DVCC = 3.3V, DGND =0V, TA=+25oC, unless otherwise stated
EEPROM Interface Timing Parameters
Parameter
XEESK clock frequency
Symbol
tsk
Min
555
900
900
900
900
900
2
Typ
Max
Units
KHz
ns
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
XEESK high time
tskh
tskl
XEESK low time
ns
XEECS setup time
tcss
tdis
ns
XEEDI setup time
ns
XEECS hold time
tcsh
tdih
tpd1
tpd0
tsv
ns
XEEDI hold time
ns
Output delay to “1”
Output delay to “0”
XEECS to status valid
XEECS to XEEDO in high impedance
900
30
ns
ns
30
ns
tdf
30
ns
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
7.5.4 EEPROM AC Timing Characteristics
Symbol
fsk
Description
SK clock frequency
Min.
0
Max.
Units
MHz
ns
0.5
tskh
tskl
SK high time
500
500
100
0
SK low time
ns
tcss
tcsh
tdis
CS setup time
ns
CS hold time
ns
DI setup time
200
200
ns
tdih
tpd0
tpd1
tsv
DI hold time
ns
Output delay to “0”
Output delay to “1”
CS to status valid
CS to DO high impedance
500
500
500
200
ns
ns
ns
tdf
ns
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
7.5.5 HD Audio-Link Timing Characteristics:
Link Reset and Initialization Timing
Link Reset and Initialization Timing Parameters
Parameter
RESET#Active Low Pulse Width
Symbol
Min
Typ
Max
Units
Trst
1.0
-
-
us
RESET#Inactive to BCLK Startup delay time for PLL
Tpll
20
-
-
-
-
us
ready
SDI Initialization Request time
Tframe
1
FrameTime
Test Conditions: DVCC = 3.3V, DGND =0V,TA=+25oC,unless otherwise stated
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
Link Timing Parameters
Link Timing Parameters
Parameter
Symbol
-
Min
Typ
Max
Units
MHz
ns
BCLK Frequency
BCLK out Period
BCLK Jitter
-
24
-
Tcycle
-
-
41.67
-
-
18.75
2.0
2.0
-
-
-
2.0
ns
BCLK High, Low- Level Width
Thigh/Tlow
Tsetup
Thold
Ttco
22.91
ns
SDO Setup Time at Rising, Falling Edge of BCLK
SDO Hold Time at Rising, Falling Edge of BCLK
SDI Valid Time after Rising Edge of BCLK
SDI Flight Time
-
-
-
-
-
ns
-
ns
7.5
2.0
ns
Tflight
-
ns
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
8 Mechanical Specifications
8.1 Package Dimensions
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OxygenTM Express-series CM8888
High-Performance PCI Express Audio Processor
－End of Datasheet－
C-MEDIA ELECTRONICS INC.
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TEL：+886-2-8773-1100
FAX：+886-2-8773-2211
E-MAIL：sales@cmedia.com.tw
Disclaimer:
Information furnished by C-Media Electronics Inc. is believed to be accurate and reliable. However, no responsibility is assumed by C-Media Electronics Inc. for its use, nor for any
infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or
otherwise under any patent or patent rights of C-Media. Trademark and registered trademark are the property of their respective owners.
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