VPLB54TEDS3-138.8125MHZ [CONNOR-WINFIELD]
LVPECL Output Clock Oscillator, 138.8125MHz Nom, SURFACE MOUNT PACKAGE-14;型号: | VPLB54TEDS3-138.8125MHZ |
厂家: | CONNOR-WINFIELD CORPORATION |
描述: | LVPECL Output Clock Oscillator, 138.8125MHz Nom, SURFACE MOUNT PACKAGE-14 机械 振荡器 |
文件: | 总2页 (文件大小:208K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
THE CONNOR-WINFIELD CORP.
2111 COMPREHENSIVE DRIVE.
AURORA, IL 60505.
FAX (630) 851-5040.
PHONE (630) 851-4722.
www.conwin.com
P R O D UC T D ATA S H E E T
CRYSTAL CONTROLLED OSCILLATORS
3.3V SURFACE MOUNT SELECTABLE OUTPUT
VCXO OSCILLATOR
ABSOLUTE MAXIMUM RATINGS
PARAMETER
TABLE 1.0
NOTE
UNITS
MINIMUM NOMINAL MAXIMUM
UNITS
°C
Storage Temperature
Supply Voltage
-40
-0.5
-0.5
-
-
-
85
7.0
7.0
(Vcc)
Vdc
Vdc
VPLB54TEDS1, VPLB54TEDS2,
VPLB54TEDS3, VPLB54TEDS4
Input Voltage
MODEL SPECIFICATIONS:
MODEL VPLB54TEDS1
TABLE 2.0
-
-
-
-
Center Frequency: Output Select “0”
Center Frequency: Output Select “1”
MODEL VPLB54TEDS2
(Fo)
(Fo)
155.5200
166.6286
MHz
MHz
DESCRIPTION
-
-
-
-
Center Frequency: Output Select “0”
Center Frequency: Output Select “1”
MODEL VPLB54TEDS3
Center Frequency: Output Select “0”
Center Frequency: Output Select “1”
MODEL VPLB54TEDS4
(Fo)
(Fo)
156.2500
167.4107
MHz
MHz
The Connor-Winfield VPLB54TEDS1,
VPLB54TEDS2, VPLB54TEDS3 and
VPLB54TEDS4 are 3.3V Voltage
Controlled Crystal Oscillators (VCXO)
with selectable output frequencies
and LVPECL Differential outputs. The
VPLB54TEDS* series are designed
for use with PLL systems in
SDH/SONET systems requiring low
jitter and tight stability. No uses of
multiplication schemes are used in
this oscillator design.
-
-
-
-
(Fo)
(Fo)
138.8125
142.2991
MHz
MHz
-
-
-
-
Center Frequency: Output Select “0”
Center Frequency: Output Select “1”
(Fo)
(Fo)
155.5200
167.3316
MHz
MHz
OPERATING SPECIFICATIONS
PARAMETER
TABLE 3.0
MINIMUM NOMINAL MAXIMUM
UNITS
ppm
NOTE
Total Frequency Tolerance
Operating Temperature Range
Supply Voltage
-20
-
-
20
1
0
70
°C
(Vcc)
(Icc)
3.135
3.3
-
3.465
Vdc
Supply Current
-
-
-
-
-
-
-
100
mA
Jitter (BW=10Hz to 20MHz)
Jitter (BW=12kHz to 80MHz)
SSB Phase Noise at 100Hz offset
SSB Phase Noise at 1KHz offset
SSB Phase Noise at 10KHz offset
SSB Phase Noise at 100KHz offset
-
5
1
-
ps rms
ps rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
-
-60
-90
-130
-140
FEATURES
-
-
-
SELECTABLE OUTPUT FREQUENCY:
INPUT CHARACTERISTICS
PARAMETER
TABLE 4.0
NOTE
VPLB54TEDS1 - 155.52MHZ or 166.6286MHz
VPLB54TEDS2 - 156.25MHz or 167.4107MHz
VPLB54TEDS3 - 138.8125MHz or 142.2991MHz
VPLB54TEDS4 - 155.52MHZ or 167.3316MHz
MINIMUM NOMINAL MAXIMUM
UNITS
Vdc
ppm
%
Control Voltage Range
(Vc)
0.3
1.65
3.0
Absolute Pull Range (APR)
Monotonic Linearity
+/-50
-
-
2
-10
-
10
Input Impedance
-
50K
-
Ohm
KHz
Vdc
Vdc
Vdc
Vdc
LOW PROFILE, SURFACE MOUNT PACKAGE
3.3V SUPPLY VOLTAGE
LOW JITTER <1pS RMS
FREQUENCY TOLERANCE: ±20ppm
TEMPERATURE RANGE: 0 TO 70°C
DIFFERENTIAL LVPECLOUTPUTS
ENABLE/DISABLE FUNCTION
TAPEAND REEL PACKAGING
-
-
-
-
Modulation Bandwidth (3dB)
Enable Input Voltage (Low)
Disable Input Voltage (High)
Output “0” Select Voltage (Low) (FS)
Output “1” Select Voltage (High) (FS)
10
-
(Vil)
(Vih)
“0”
-
2.275
-
1.68
3
3
-
<30% Vcc
-
-
“1”
>70% Vcc
LV PECL OUTPUT CHARACTERISTICS
TABLE 5.0
PARAMETER
MINIMUM NOMINAL MAXIMUM
UNITS
Ohms
Vdc
NOTE
LOAD
-
2.275
-
-
-
50
-
4
Voltage
(High)
(Low)
(Voh)
(Vol)
-
1.68
55
Vdc
Duty Cycle at 50% Level
45
50
%
PACKAGE CHARACTERISTICS
TABLE 6.0
ORDERING INFORMATION
Package
Non-hermetic package consisting of an FR4 substrate with grounded metal
cover.
VPLB54TEDS1 - 155.52MHz
PROCESS RECOMMENDATIONS
Solder Reflow
TABLE 7.0
The component solder used internal to this device has a melting point of
221°C. The peak temperature inside the device should be less than or
equal to 220°C for a maximum of 10 seconds
VCXO
SERIES
CENTER
FREQUENCY
Wash
Ultrasonic cleaning is not recommended.
Specifications subject to change without notice.
08/01/05
Vx436
1
2
02
REV:
Copyright 2001 Connor-Winfield all rights reserved.
DATASHEET #:
PAGE
OF
DATE:
a
THE CONNOR-WINFIELD CORP.
2111 COMPREHENSIVE DRIVE.
AURORA, IL 60505.
FAX (630) 851-5040.
PHONE (630) 851-4722.
www.conwin.com
P R O D UC T D ATA S H E E T
CRYSTAL CONTROLLED OSCILLATORS
Notes
1.0
Inclusive of calibration @ 25°C, frequency stability vs. temperature, supply and load variations, shock, vibration
and aging for ten years. Control voltage (Vc) = 1.65 Vdc.
2.0
Absolute pull range (APR) is the minimum guaranteed pull range of the VCXO under all conditions over lifetime
operation. The APR is referenced to Fo.
3.0
4.0
Outputs are at high impedance when disabled. Output is enabled with no connection on enable / disable pad 6.
50-ohm termination into Vcc-2V or Thevein equivalent.
Pin Connections
Package Layout and Dimensions
.140 MAX
(3.55mm)
TABLE 8.0
Function
Control Voltage (Vc)
Frequency Select (FS)
Enable / Disable
Ground (Case)
Pad
1
2
6
7
8
Output Q
9
14
Comp Output Q
Supply Voltage (Vcc)
Dimensional Tolerance:
±.005 (.127mm)
Output Waveform
Frequency Select Table
TABLE 9
Model Number
VPLB54TEDS1
VPLB54TEDS1
Frequency Select Logic
Output Frequency
155.5200 MHz
166.6286 MHz
“0” (Default)
“1”
VPLB54TEDS2
VPLB54TEDS2
“0” (Default)
“1”
156.2500 MHz
167.4107 MHz
VPLB54TEDS3
VPLB54TEDS3
“0” (Default)
“1”
138.8125 MHz
142.2991 MHz
VPLB54TEDS4
VPLB54TEDS4
“0” (Default)
“1”
155.5200 MHz
167.3316 MHz
Test Circuit
Suggested Pad Layout
3.3Vdc
3.3Vdc
14
9
8
1
2
6 7
CONTROL
VOLTAGE
FS
E/D
Keep out Area
Specifications subject to change without notice.
08/01/05
Vx436
02
2
2
Copyright 2001 Connor-Winfield all rights reserved.
DATASHEET #:
PAGE
OF
REV:
DATE:
a
相关型号:
VPLB54TEDS4-155.52MHZ
LVPECL Output Clock Oscillator, 155.52MHz Nom, SURFACE MOUNT PACKAGE-14
CONNOR-WINFIE
©2020 ICPDF网 联系我们和版权申明