CCLD-024_15 [CRYSTEKMICROWAVE]
LVDS Clock Oscillator;
| 型号： | CCLD-024_15 |
| 厂家： | 
CRYSTEK CORPORATION |
| 描述： | LVDS Clock Oscillator |
| 文件： | 总3页 (文件大小：84K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CCLD-024 5×7mm SMD
LVDS Clock Oscillator
CCLD-024 Model
5×7 mm SMD, 2.5V, LVDS
Model CCLD-024 is a 162.000 MHz to 250.000 MHz LVDS
Clock Oscillator operating at 2.5 Volts. The oscillator
utilizes a High Q crystal design providing very low
Jitter and Phase Noise. No Sub-Harmonics are present in
the Output Signal.
Applications:
Digital Video
5×7mm SMD
SONET/SDH/DWDM
Storage Area Networks
Broadband Access
Ethernet, Gigabit Ethernet
Rev: K
Date: 16-Oct-2015
Page 1 of 3
12730 Commonwealth Drive • Fort Myers, Florida 33913
Phone: 239-561-3311 • 800-237-3061
CRYSTEK
CORPORATION
Fax: 239-561-1025 • www.crystek.com
CCLD-024 5×7mm SMD
LVDS Clock Oscillator
CCLD-024 Model
5×7 mm SMD, 2.5V, LVDS
Frequency Range:
Frequency Stability Options(ppm):
Temperature Range:
(Option M)
162.000 MHz to 250.000 MHz
±20, ±25, ±50, ±100
(standard) 0°C to +70°C
-20°C to +70°C
(Option X)
-40°C to +85°C
Storage:
-45°C to 90°C
Input Voltage:
Input Current:
Output:
2.5V ±0.125V
43mA Typical, 63mA Max
Differential LVDS
Symmetry:
Rise/Fall Time:
Load:
45/55% Max @ zero crossing point
1nSec Max (20% to 80%)
100 Ohms Connected between OUT and COUT
Logic:
Output Voltage Levels
“0”=0.90 Min, 1.10 Typical
“1”=1.43 Typical, 1.60 Max
247mV Min, 454mV Max
200nSec Max
Differential Output Voltage:
Disable Time:
Enable Time:
2mSec Max
Phase Jitter: 12kHz~80MHz
Phase Noise: (See Plot Below)
Sub-harmonics:
0.5pSec Typical, 1pSec RMS Max
None
Aging:
<3ppm 1st year, <1ppm every year thereafter
Typical Phase Noise Plot CCLD-024-50-250.000
Rev: K
Date: 16-Oct-2015
Page 2 of 3
12730 Commonwealth Drive • Fort Myers, Florida 33913
Phone: 239-561-3311 • 800-237-3061
CRYSTEK
CORPORATION
Fax: 239-561-1025 • www.crystek.com
CCLD-024 5×7mm SMD
LVDS Clock Oscillator
CCLD-024 Model
5×7 mm SMD, 2.5V, LVDS
Crystek Part Number Guide
CCLD - 024 X - 50 - 250.000
#1
#2
#3
#4
#5
Stability Indicator
Blank ± 100ppm
#1 Crystek LVDS Osc.
#2 Model 024
#3 Temp Range: Blank = 0/70°C, M = -20/70°C, X = -40/85°C
#4 Stability: (see Table 1)
50
±
±
±
50ppm
25ppm
20ppm
25
#5 Frequency in MHz: 3 or 6 decimal places
20*
Example:
*not available in -40/85
CCLD-024X-50-250.000
2.5V, -40/85°C, ±50ppm, 250.000 MHz
Table 1
RECOMMENDED REFLOW SOLDERING PROFILE
Ramp-Up
3°C/Sec Max.
Critical
Temperature Zone
Mechanical:
260°C
Ramp-Down
6°C/Sec.
Shock: MIL-STD-883, Method 2002, Condition B
Solderability: MIL-STD-883, Method 2003
217°C
200°C
150°C
Vibration: MIL-STD-883, Method 2007, Condition A
Solvent Resistance: MIL-STD-202, Method 215
Resistance to Soldering Heat: MIL-STD-202, Method 210, Condition I or J
Environmental:
Preheat
Thermal Shock: MIL-STD-883, Method 1011, Condition A
Moisture Resistance: MIL-STD-883, Method 1004
90 Secs. Max.
180 Secs. Max.
8 Minutes Max.
260°C for
10 Secs. Max.
NOTE: Reflow Profile with 240°C peak also acceptable.
0.274 ±0.007
(6.96 ±0.18)
Dimensions inches (mm)
Tristate Function
All dimensions are Max unless otherwise specified.
Part Number
Frequency
DC Lot Code
Function pin 1
Output pin
0.193 ±0.007
(4.90 ±0.18)
Open or N/C
"1" level 0.7×Vdd Min
"0" level 0.3×Vdd Max
Active
Active
High Z
0.071
(1.80)
Denotes pad 1
SUGGESTED PAD LAYOUT
via to
ground
0.01µF
PIN
Connection
Enable/Disable
0.055 Typ
(1.40 Typ)
0.071 SQ
(1.80)
1
2
3
4
5
6
0.045 ±0.008
(1.14 ±0.20)
N/C
GND
Output
#1
#6
#2
#5
#3
#4
0.148
(3.75)
Comp Output
Vcc
0.100
(2.54)
0.200
(5.08)
0.200
(5.08)
Rev: K
0.01uF Bypass Capacitor Recommended
Date: 16-Oct-2015
Page 3 of 3
12730 Commonwealth Drive • Fort Myers, Florida 33913
Phone: 239-561-3311 • 800-237-3061
CRYSTEK
CORPORATION
Fax: 239-561-1025 • www.crystek.com
相关型号：
©2020 ICPDF网 联系我们和版权申明