353NB3A330T [CTS]

HCMOS Output Clock Oscillator;


型号：	353NB3A330T
厂家：	CTS
描述：	HCMOS Output Clock Oscillator 机械振荡器
文件：	总3页 (文件大小：211K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Model 353

HCMOS VCXO

FEATURES

• Standard 5.0mm x 3.2mm 6-Pad Surface Mount Package

• HCMOS Output

• Low Jitter Performance

• Fundamental Crystal Designs

• Frequency Range 1 – 80 MHz

• Operating Voltages +2.5Vdc, +3.3Vdc or +5.0Vdc

• Operating Temperature to -40°C to +85°C

• Output Enable Standard

• Tape & Reel Packaging Standard, EIA-418

• RoHS/Green Compliant [6/6]

APPLICATIONS

Model 353 is ideal for applications such as broadband access, Ethernet/Gigabit Ethernet,

SONET/SDH, xDSL, PCMIA, digital video, Picocells and base stations.

ORDERING INFORMATION

353

SUPPLY VOLTAGE

PACKAGING OPTIONS

T - 1k pcs./reel

R - 3k pcs./reel

N = +2.5 Vdc, Pin 2 Enable

L = +3.3 Vdc, Pin 2 Enable

S = +5.0 Vdc, Pin 2 Enable

T = +2.5 Vdc, Pin 5 Enable

V = +3.3 Vdc, Pin 5 Enable

W = +5.0 Vdc, Pin 5 Enable

FREQUENCY

Product Frequency Code

OPERATING TEMPERATURE RANGE

ABSOLUTE PULL RANGE [APR]

A = -10°C to +60°C

C = -20°C to +70°C

I = -40°C to +85°C ²

B = ± 50 ppm APR

FREQUENCY STABILITY

6 = ± 20 ppm ²

3 = ± 50 ppm

5 = ± 25 ppm

1] Refer to document 016-1454-0, Frequency Code Tables.

3-digits required for frequencies below 100MHz and 4-digits for frequencies 100MHz or greater.

2] Consult factory for availability of 6I Stability/Temperature combination.

Not all performance combinations and frequencies may be available.

Contact your local CTS Representative or CTS Customer Service for availability.

PACKAGING INFORMATION [reference]

Device quantity is 1k pcs. maximum per 180mm reel.

Document No. 008-0369-0

Page 1- 3

Rev. A

www.ctscorp.com

Model 353

5.0mm x 3.2mm HCMOS VCXO

ELECTRICAL CHARACTERISTICS

PARAMETER

Maximum Supply Voltage

Maximum Control Voltage

Storage Temperature

Frequency Range

SYMBOL

V_CC

CONDITIONS

MIN

-0.5

-40

TYP

MAX

5.0

V_CC

UNIT

V_C

T_STG

f_O

+100

°C

1 - 80

MHz

Frequency Stability

Δf/f_O

20, 25 or 50

± ppm

(See Note 1 and Ordering Information)

Absolute Pull Range

(See Note 2 and Ordering Information)

APR

±50

ppm

Δf/f₂₅

First Year @ +25°C, nominal V_CCand V_C

Aging

-3

-10

-20

-40

2.38

3.14

4.75

+60

+70

+86

2.63

3.47

5.25

Operating Temperature

T_A

+25

°C

Model 353N, 353T, ±5%

Model 353L, 353V, ±5%

Model 353S, 353W, ±5%

C_L= 15 pF

2.5

3.3

5.0

Supply Voltage

Supply Current

V_CC

@ +2.5Vdc

@ +3.3Vdc

I_CC

@ +5.0Vdc

C_L

V_C

Output Load

Control Voltage

Model 353N, 353T, V_CC= 2.5V

0.20

1.25

1.65

2.50

2.30

Model 353L, 353V, V_CC= 3.3V

Model 353S, 353W, V_CC= 5.0V

+25°C @ Time of Shipment, over V_Crange

Best Straight Line Fit

0.15

0.50

±100

3.15

4.50

Frequency Deviation

Linearity

Input Impedance

Δf

Z_Vc

ppm

kOhms

Positive

Transfer Function

Output Duty Cycle

Output Voltage Levels

@ 50% Level

Logic '1' Level, CMOS Load

Logic '0' Level, CMOS Load

@ 20%/80% Levels

Application of V_CC

SYM

V_OH

V_OL

T_R, T_F

T_S

0.9V_CC

0.1V_CC

Rise and Fall Time

Start Up Time

8.0

kHz

Modulation Roll-off

Enable Function

Enable Input Voltage

Disable Input Voltage

Enable Time

@ -3dB

V_IH

V_IL

0.7V_CC

Pin 2 or Pin 5 Logic '1', Output Enabled

Pin 2 or Pin 5 Logic '0', Output Disabled

Pin 2 or Pin 5 Logic '1'

0.3V_CC

T_PLZ

tjrms

0.5

100

Phase Jitter, RMS

Notes:

Bandwidth 12 kHz - 20 MHz

2. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1year aging.

Minimum guaranteed frequency shift from f_Oover variations in temperature, aging, power supply and load.

ENABLE TRUTH TABLE

PIN 2 or Pin 5

Logic ‘1’

PIN 4

Output

SINGLE SIDE BAND PHASE NOISE

(typical maximum)

Frequency Phase Noise Frequency Phase Noise

Open

Logic ‘0’

High Imp.

Offset

10 Hz

100 Hz

1k Hz

(dBc/Hz) *

Offset

10k Hz

100k Hz

(dBc/Hz) *

-135

-60

-90

-120

-150

>100k Hz

* Results may vary depending on frequency.

Document No. 008-0369-0

Page 2 - 3

Rev. A

Model 353

5.0mm x 3.2mm HCMOS VCXO

TEST CIRCUIT, CMOS LOAD

OUTPUT WAVEFORM, CMOS

MECHANICAL SPECIFICATIONS

MARKING INFORMATION

PACKAGE DRAWING

1. ** - Manufacturing Site Code.

2. D – Date Code. See Table I for codes.

3. ST – Frequency stability/temperature code.

[Refer to Ordering Information.]

4. V – Voltage code. N or T = 2.5V, L or V = 3.3V,

S or W = 5.0V

5. xxx – Frequency Code.

3-digits, frequencies below 100MHz

Refer to document 016-1454-0, Frequency Code Tables.

CTS**D

353STV

● xxx

NOTES

1. Complete CTS part number, frequency value and

date code information must appear on reel and

carton labels.

2. Termination pads [e4]. Barrier-plating is nickel [Ni]

with gold [Au] flash plate.

3. Reflow conditions per JEDEC J-STD-020; 260°C

maximum, 20 seconds.

4. MSL = 1.

SUGGESTED SOLDER PAD GEOMETRY

C_BYPASSshould be ≥ 0.01 uF.

D.U.T. PIN ASSIGNMENTS

SYMBOL

DESCRIPTION

V_C

Control Voltage

EOH or N.C.

GND

Enable [std] or No Connect

Circuit & Package Ground

RF Output

Output

N.C. or EOH

V_CC

No Connect or Enable [opt]

Supply Voltage

TABLE I – DATE CODE

MONTH

YEAR

JAN

FEB

MAR

APR

MAY

JUN

JUL

AUG

SEP

OCT

NOV

DEC

2001

2002

2003

2004

2005

2006

2007

2008

2009

2010

2011

2012

2013

2014

2015

2016

2017

2018

2019

2020

Document No. 008-0369-0

Page 3 - 3

Rev. A

353NB3A330T [CTS]

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