635P2I2019M4400 [CTS]
Oscillator;
CTS 
Model 635
LVPECL or LVDS CLOCK OSCILLATOR
FEATURES
• Standard 7x5mm Surface Mount Footprint
• Differential LVPECL or LVDS Output
• Low Phase Jitter, NON-Multiplied
• Frequency Range 19.44 – 212.50 MHz
• Frequency Stability, ±50 ppm Standard
(± 25 ppm and ± 100 ppm available)
• +2.5Vdc or +3.3Vdc Operation
• Operating Temperature to –40°C to +85°C
• Output Enable Standard
• Tape & Reel Packaging
• RoHS/Green Compliant
DESCRIPTION
The Model 635 is a ceramic packaged Clock
oscillator offering reduced size and enhanced
stability. The small size means it is perfect for
any application. The enhanced stability means it
is the perfect choice for today’s communications
applications that require tight frequency control.
ORDERING INFORMATION
635
M
OUTPUT TYPE
FREQUENCY IN MHz
P = PECL, Pin 1 Enable Pin 2 N.C. (standard)
L = LVDS, Pin 1 Enable Pin 2 N.C. (standard)
E = PECL, Pin 2 Enable Pin 1 N.C.
M - indicates MHz and decimal point.
Frequency is recorded with minimum 4
significant digits to the right of the "M".
V = LVDS, Pin 2 Enable Pin 1 N.C.
FREQUENCY STABILITY
SUPPLY VOLTAGE
5 = ± 25 ppm
3 = ± 50 ppm (standard)
2 = ± 100 ppm (-40°C to 85°C only)
2 = 2.5 Vdc
3 = 3.3 Vdc
OPERATING TEMPERATURE RANGE
C = 0°C to +70°C (standard)
I = -40°C to +85°C
Example Part Number: 635P3C3155M5200
Document No. 008-0284-0
Page 1 - 4
Rev. B
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CTS Electronic Components, Inc. ٠
171 Covington Drive ٠
Bloomingdale, IL 60108 ٠
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٠
٠
٠
www.ctscorp.com ٠
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Model 635
7x5mm Low Cost
LVPECL or LVDS Clock Oscillator
ELECTRICAL CHARACTERISTICS
PARAMETER
Maximum Supply Voltage
Storage Temperature
Frequency Range
LVPECL and LVDS
Frequency Stability
SYMBOL
VCC
TSTG
CONDITIONS
MIN
-0.5
-55
TYP
-
-
MAX
5.0
125
UNIT
V
°C
-
-
fO
-
-
MHz
19.44
-
-
-
212.50
25, 50
or 100
∆f/fO
± ppm
(See Note 1 and Ordering Information)
Operating Temperature
TA
VCC
ICC
-
°C
V
Commercial
Industrial
Supply Voltage
-20
-40
2.38
3.14
70
85
2.63
3.47
25
2.5
3.3
± 5 %
Supply Current
LVPECL
LVDS
Start Up Time
Phase Jitter
Maximum Load
mA
-
-
-
-
50
25
3
80
60
5
TS
tjms
Application of VCC
ms
ps RMS
Bandwidth 12 kHz - 20 MHz
-
1
Enable Function
Enable Input Voltage
Disable Input Voltage
Disable Current
Enable Time
VIH
VIL
IIL
0.7*VCC
Pin 1 or Pin 2 Logic '1', Output Enabled
Pin 1 or Pin 2 Logic '0', Output Disabled
Pin 1 or Pin 2 Logic '1' , Output Disabled
Pin 1 or Pin 2 Logic '1'
-
-
-
-
-
0.3*VCC
20
V
-
-
-
uA
ms
TPLZ
5
LVPECL WAVEFORM
Output Load
Output Duty Cycle
Output Voltage Levels
Logic '1' Level
RL
SYM
-
-
45
50
-
-
55
Ohms
%
@ VCC - 1.3V
VOH
VOL
TR, TF
VCC - 1.025V
-
V
PECL Load
PECL Load
@ 20% - 80% Levels
-
-
0.4
-
VCC - 1.62V
1.0
Logic '0' Level
Rise and Fall Time
LVDS WAVEFORM
Output Load
Output Duty Cycle
Differential Voltage
Output Voltage Levels
Logic '1' Level
Logic '0' Level
Offset Voltage
Rise and Fall Time
Notes:
ns
RL
SYM
VOD
Between Outputs
@ 1.25V
RL = 100 Ohms
-
45
250
100
-
350
-
55
450
Ohms
%
mV
VOH
VOL
VOS
LVDS Load
LVDS Load
LVDS Load
@ 20% - 80% Levels
-
0.9
-
-
-
1.2
0.4
1.6
-
-
V
TR, TF
-
1.0
ns
1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 10 year aging
at an average operating temperature of +40 °C.
TEST CIRCUIT, PECL LOAD
TEST CIRCUIT, LVDS LOAD
Vcc - 2.0V
CH2
CH1
RL
RL
50
100
+
-
CH2
CH1
mA
+
-
6
1
5
D.U.T.
2
4
3
mA
+
+
-
0.01uF
RL
50
POWER
SUPPLY
6
1
5
D.U.T.
2
4
3
VM
+
+
-
0.01uF
POWER
SUPPLY
-
VM
Vcc - 2.0V
-
Enable Input or N.C.
N.C. or Enable Input
Enable Input or N.C.
N.C. or Enable Input
Document No. 008-0284-0
Page 2 - 4
Rev. B
٠
٠
٠
CTS Electronic Components, Inc. ٠
171 Covington Drive ٠
Bloomingdale, IL 60108 ٠
٠
٠
Model 635
7x5mm Low Cost
LVPECL or LVDS Clock Oscillator
D.U.T. PIN ASSIGNMENTS
PECL/LVDS OUTPUT WAVEFORM
Tr
Tf
PIN
1
2
3
4
SYMBOL
DESCRIPTION
VOH
VOS
EOH or N.C. Enable (std) or optional No Connect
EOH or N.C. No Connect (std) or optional Enable
GND
Output
Output
VCC
OUT
80%
50%
20%
Circuit & Package Ground
RF Output
Complimentary RF Output
Supply Voltage
5
6
OUT
ENABLE TRUTH TABLE
PIN 1 or PIN 2 PIN 4 / PIN 5
VOL
UPTIME (t)
Logic ‘1’
Open
Logic ‘0’
Output
Output
High Imp.
PERIOD (T)
DUTY CYCLE = t/T x 100 (%)
MECHANICAL SPECIFICATIONS
PACKAGE DRAWING
MARKING INFORMATION
(7.0 ±0.2)
0.276 ±0.008
(1.4)
0.055
1. ** - Manufacturing Site Code.
2. YYWW – Date code, YY – year, WW – week.
3. Truncated CTS part number.
PIN 1 IDENTIFIER
(1.27)
4. XXXMXXXX - Frequency marked with 4
significant digits after the ‘M’.
0.050
4
5
2
6
1
CTS ** YYWW
635P3C3
(5.0 ±0.2)
0.197 ±0.008
(3.73)
0.147
3
● XXXMXXXX
NOTES
1. Termination pads (e4), barrier-plating is nickel
(Ni) with gold (Au) flash plate.
2. Reflow conditions per JEDEC J-STD-020.
(2.54)
0.100
(5.08)
0.200
(2.0)
0.079
MAX
(mm)
Inch
Key:
SUGGESTED SOLDER PAD GEOMETRY
SUGGESTED REFLOW PROFILE
.071 [1.80]
300
Maximum 260°C, 10 seconds
Typical 245°C
C BYPASS
6
1
5
4
3
200
100
0
Temp.
(°C)
.165 [4.20]
130°C
.079 [2.00]
2
.100 [2.54]
0
30
60
90
120 150 180 210 240 270 300
[mm]
Key:
Time (Seconds)
.200 [5.08]
Inch
CBYPASS should be ≥ 0.01 uF.
Document No. 008-0284-0
Page 3 - 4
Rev. B
٠
٠
٠
CTS Electronic Components, Inc. ٠
171 Covington Drive ٠
Bloomingdale, IL 60108 ٠
٠
٠
Model 635
7x5mm Low Cost
LVPECL or LVDS Clock Oscillator
TAPE AND REEL INFORMATION
DIMENSIONS IN MILLIMETERS
17.5
Ø13
2.0
4.0
8.0
Ø1.50
1.75
16.0
2.40
2.10
120°
8.40
7.90
Ø180
Ø60
5.70
5.40
Ø23
DIRECTION OF FEED
Device quantity is 1,000 pieces per 180mm reel.
ENVIRONMENTAL SPECIFICATIONS
Temperature Cycle:
Mechanical Shock:
Sinusoidal Vibration:
Gross Leak:
400 cycles from –55°C to +125°C, 10 minute dwell at each temperature, 1
minute transfer time between temperatures.
1,500g’s, 0.5mS duration, ½ sinewave, 3 shocks each direction along 3
mutually perpendicular planes (18 total shocks).
0.06 inches double amplitude, 10 to 55 Hz and 20g’s, 55 to 2,000 Hz, 3 cycles
each in 3 mutually perpendicular planes (9 times total).
No leak shall appear while immersed in an FC40 or equivalent liquid at
+125°C for 20 seconds.
Fine Leak:
Mass spectrometer leak rates less than 2x10-8 ATM cc/sec air equivalent.
Product must survive 3 reflows of +260°C peak, 10 seconds maximum.
2,000 hours at +125°C, maximum bias, disregarding frequency shift.
1,000 hours at +85°C, full bias, less than ±5 ppm shift.
Level 1 per JEDEC J-STD-020.
Resistance to Solder Heat:
High Temperature Operating Bias:
Frequency Aging:
Moisture Sensitivity Level:
QUALITY AND RELIABILITY
Quality systems meet or exceed the requirements of ISO 9000:2000 standards.
Document No. 008-0284-0
Page 4 - 4
Rev. B
٠
٠
٠
CTS Electronic Components, Inc. ٠
171 Covington Drive ٠
Bloomingdale, IL 60108 ٠
٠
٠
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