647H5002I3T [CTS]
HCSL Output Clock Oscillator,;
| 型号： | 647H5002I3T |
| 厂家： | 
CTS |
| 描述： | HCSL Output Clock Oscillator, 机械 输出元件 振荡器 |
| 文件： | 总7页 (文件大小：646K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Model 647H
Very Low Jitter HCSL Clock
Features
. High Speed Current Steering Logic [HCSL] Output
. Ceramic Surface Mount Package
. Low Phase Jitter Performance, 500fs Typical
. Fundamental or 3rd Overtone Crystal Design
. Frequency Range 13.5MHz – 200MHz *
. +2.5V or +3.3V Operation
Part Dimensions:
7.0 × 5.0 × 1.65mm • 174.2mg
. Output Enable Standard
. Tape and Reel Packaging, EIA-418
Standard Frequencies
Applications
- 25MHz
- 27MHz
- 50MHz
- 100MHz
- 106.25MHz
- 125MHz
- 155.52MHz
- 156.25MHz
. PCI Express [PCIe]
. Intel Chipsets
. Data Storage Systems
. Ethernet Line Cards
. Serial ATA Express [SATAe]
. Network Servers
. Switches and Routers
. Set-Top Boxes/DVRs
* Check with factory for availability of frequencies not listed.
Description
CTS Model 647H is a low cost, high performance clock oscillator supporting HCSL output. Employing the latest IC
technology, M647H has excellent stability and low phase jitter performance.
Ordering Information
Model
Output
Type
H
Frequency
Stability
3
Temperature
Supply
Voltage
3
Frequency Code
[MHz]
Packaging
T
Range
I
647
XXX or XXXX
Output
HCSL - Pin 1 Enable
Stability
±25ppm
±30ppm
±50ppm
±100ppm
Voltage
+2.5Vdc
+3.3Vdc
Code
H
Code
Code
2
3
5
4
3
2
Frequency
Product Frequency Code 1
Temp. Range
-20°C to +70°C
-40°C to +85°C
-40°C to +105°C 2
Packing
1k pcs./reel
Code
Code
C
I
Code
T
G
Notes:
1] Refer to document 016-1454-0, Frequency Code Tables. 3-digits for frequencies <100MHz, 4-digits for frequencies 100MHz or greater.
Check factory for availability. Stability codes 2 and 3 only.
2]
Not all performance combinations and frequencies may be available.
Contact your local CTS Representative or CTS Customer Service for availability.
This product is specified for use only in standard commercial applications. Supplier disclaims all express and implied warranties and liability in connection with any use of this
product in any non-commercial applications or in any application that may expose the product to conditions that are outside of the tolerances provided in its specification.
DOC# 008-0582-2 Rev. C
Page 1 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Electrical Specifications
Operating Conditions
PARAMETER
SYMBOL
CONDITIONS
-
MIN
-0.3
TYP
-
MAX
4.0
UNIT
V
Maximum Supply Voltage
VCC
2.375
3.135
2.5
3.3
2.625
3.465
Supply Voltage
Supply Current
VCC
±5%
V
Maximum Load
Maximum Current Value @ +3.3V
ICC
-
-
60
mA
-20
-40
-40
-50
+70
+85
Operating Temperature
Storage Temperature
TA
-
-
+25
-
°C
°C
+105
+125
TSTG
Frequency Stability
PARAMETER
SYMBOL
fO
CONDITIONS
-
MIN
-5
TYP
MAX
5
UNIT
MHz
13.5 - 200
Frequency Range
Frequency Stability
[Note 1]
Δf/fO
-
25, 30, 50 or 100
±3
±ppm
ppm
Aging
Δf/f25
First Year @ +25°C, nominal VCC
1.] Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 1st year aging.
Output Parameters
PARAMETER
Output Type
Output Load
SYMBOL
-
CONDITIONS
MIN
TYP
MAX
UNIT
-
HCSL
-
RL
Terminated to ground
-
50
-
Ohms
VOH
-580
-150
45
-
850
150
55
Output Voltage Levels
HCSL Load
mV
VOL
-
Output Duty Cycle
SYM
VOD
Differential Output, @ VCC - 1.3V
RL = 50 Ohms to ground
-
-
%
Vp-p
ns
Differential Output Voltage
Rise and Fall Time
0.4
-
-
TR, TF
@ 20%/80% Levels, RL = 50 Ohms to ground
0.50
0.70
Output Parameters
PARAMETER
SYMBOL
TS
CONDITIONS
MIN
-
TYP
5
MAX
10
UNIT
ms
Start Up Time
Application of VCC
Enable Function [Standby]
Enable Input Voltage
Disable Input Voltage
Disable Current
VIH
VIL
Pin 1 Logic '1', Output Enabled
Pin 1 Logic '0', Output Disabled
Pin 1 Logic '0', Output Disabled
Pin 1 Logic '1', Output Enabled
Bandwidth 12 kHz - 20 MHz
0.7VCC
-
-
-
V
V
-
-
-
-
0.3VCC
IIL
15
-
-
2
-
µA
ms
fs
Enable Time
TPLZ
tjrms
Phase Jitter, RMS
500
DOC# 008-0582-2 Rev. C
Page 2 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Electrical Specifications
Enable Truth Table
Pin 1
Logic ‘1’
Open
Pin 4 & Pin 5
Output
Output
Logic ‘0’
High Imp.
Test Circuit
HCSL
Output Waveform
HCSL
DOC# 008-0582-2 Rev. C
Page 3 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Electrical Specifications
Performance Data
Phase Noise [typical]
100.00MHz, HCSL, VCC = 3.3V, TA = +25°C
DOC# 008-0582-2 Rev. C
Page 4 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Electrical Specifications
Performance Data
Phase Noise Tabulated
Typical, 100.00MHz, HCSL, VCC = 3.3V, TA = +25°C
PARAMETER
SYMBOL
CONDITIONS
TYP
UNIT
HCSL @ 100.00MHz
Phase Noise
Single Side Band
@ 10Hz
-75.9328
-106.9929
-135.1951
-144.2209
-152.8159
-153.5793
-154.8219
@ 100Hz
@ 1kHz
-
dBc/Hz
@ 10kHz
@ 100kHz
@ 1MHz
@ 10MHz
Phase Jitter, RMS
tjrms
Integration Bandwidth 12kHz - 20MHz 188.2315
fs
DOC# 008-0582-2 Rev. C
Page 5 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Mechanical Specifications
Package Drawing
Marking Information
1. O – Output Type; H = HCSL.
2. ST – Frequency Stability/Temperature Code.
[Refer to Ordering Information]
3. V – Voltage Code; 3 = 3.3V, 2 = 2.5V.
4. D – Date Code. See Table I for codes.
5. xxxx – Frequency Code.
647OSTV
● Dxxxx
3-digits, frequencies below 100MHz
4-digits, frequencies 100MHz or greater
[See document 016-1454-0, Frequency Code Tables.]
Recommended Pad Layout
Notes
1. JEDEC termination code (e4). Barrier-plating is
nickel [Ni] with gold [Au] flash plate.
2. Reflow conditions per JEDEC J-STD-020; +260°C
maximum, 20 seconds.
3. MSL = 1.
Pin Assignments
Pin
Symbol
Function
Enable
1
EOH
2
N.C.
No Connect
3
GND
Output
N.C.
Circuit & Package Ground
RF Output
4
5
No Connect
6
VCC
Supply Voltage
Table I - Date Code
MONTH
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
NOV
DEC
YEAR
2001 2005 2009 2013 2017
2002 2006 2010 2014 2018
2003 2007 2011 2015 2019
2004 2008 2012 2016 2020
A
N
a
B
P
b
p
C
Q
c
D
R
d
r
E
S
e
s
F
T
f
G
U
g
H
V
h
v
J
W
j
K
X
k
x
L
Y
l
M
Z
m
z
n
q
t
u
w
y
DOC# 008-0582-2 Rev. C
Page 6 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
Model 647H
Very Low Jitter HCSL Clock
Packaging - Tape and Reel
Tape Drawing
Reel Drawing
Notes
1. Device quantity is 1k pieces maximum per 180mm reel.
2. Complete CTS part number, frequency value and date code information must appear on reel and carton labels.
DOC# 008-0582-2 Rev. C
Page 7 of 7
©2017 CTS® Corporation. Information/product(s) subject to change. No warranty that product(s) will meet the stated specifications for customer specific applications or test
equipment. Visit www.ctscorp.com for list of applicable patent(s), more information, or to request a quote.
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