NDM2Z-12HS-AA [CUI]
AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER;型号: | NDM2Z-12HS-AA |
厂家: | CUI INC |
描述: | AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER |
文件: | 总14页 (文件大小:1680K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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date 11/07/2014
page 1 of 14
MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
GENERAL CHARACTERISTICS
• 4.5~14 V input range
FEATURES
• compact package
• 0.6~5.0 V programmable output
• voltage tracking
horizontal:
21.0 x 12.7 x 7.2 mm
(0.827 x 0.500 x 0.284 in)
• 12 A output
• voltage margining
• Snapshot™ parametric capture
• voltage/current/temperature monitoring
• synchronization and phase spreading
• remote differential voltage sense
• programmable soft start and soft stop
• fault management
• high efficiency
• auto compensation
• SMBus interface
• PMBus™ Compatible
• Ericsson footprint compatible
input voltage
output voage
output current
output wattage
MODEL
max
(A)
max
(W)
(Vdc)
(Vdc)
NDM2Z-12H
4.5~14
.6~5.0
12
60
PART NUMBER KEY
NDM2Z-12H X - X X - XXX
Base Number
Firmware Configuration:
000~ZZZ
Pityle:
= surface-mount
T = through-hole
Package Option:
Pin Configuration:
A = standard
A = loose parts
B = tape and reel
C = tray
configuration
Example part number: NDM2Z-12HT-AA-002
horizontal module
through-hole pins
standard pin configuration
loose parts package option
firmware configuration 002
CONTNTS
Absolute Maximum Ratings.................................2
Recommended Operating Conditions....................2
Pin Descriptions................................................3
Typical Characteristics.......................................4~5
Mechanical Drawing..............................................6
Operating Information.....................................7~13
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date 11/07/2014 │ page 2 of 14
ABSOLUTE MAXIMUM RATINGS
parameter
conditions/description
min
typ
max
units
Vin
input voltage
15
V
CTRL, DDC, SA0, SALRT, SDA, SCL, SYNC, VSET,
PG
digital pin voltage
-0.3
6.5
V
analog pin voltage
+S, -S, VTRK
(GND - PREF)
TP1
-0.3
-0.3
-40
6.5
0.3
V
ground voltage differential
operating temperature
storage temperature
°C
°C
-55
RECOMMENDED OPERATING CONDITIONS
-30°C < TP1 < +95°C, 4.5 V < Vin < 14 V, typical measurements made at Vin = 12 V, Vout = 1.0 V, Iou= 25°C,
=Cin = 470 μF/10 mΩ, Cout = 470 μF/8 mΩ
INPUT / OUTPUT
parameter
conditions/description
input supply voltage
min
4.5
0
t
max
14
units
Vin
V
A
Iout
output current
12
Vout
adjustable via resistor or PMBus™ commas
adjustable via PMBus commands
.6
0
5.0
110
V
Vout margin
%
over line, load and temperature
measured at +S and -S
voltage accuracy
line regulation
-1
1
%
4.5 V ≤ Vin ≤ 14 V
Vout = 0.6 V
Vout = 1.0 V
Vout = 1.8 V
Vout = 3.3 V
2.4
2.2
1.7
2.8
mV
0 A ≤ Iout ≤ Imax
Vout = 0.6 V
Vout = 1.0 V
Vout 1.8 V
Vout = .3 V
0.4
0.6
0.6
2.6
load regulation
mV
voltage set-point resolution
voltage ripple and noise
when Vout et via PMBucommands
-0.025
0.025
% FS
Vout = 0.6 V
Vo1.0 V
Vut = 1.8 V
Vout = 3.3 V
12
18
21
21
mVp-p
ramp-up time
on time delay
djustabvia PMBus
adsble via PMBus
0
5
200
ms
ms
500,000
Iout: 25% 75% 25% of Imax, dI/dt=2 A/μs
out = 0.6 V
load traient voldeviation Vout = 1.0 V
56
77
mV
µs
Vout = 1.8 V
Vout = 3.3 V
102
160
Iout: 25% 75% 25% of Imax, dI/dt=2 A/μs
Vout = 0.6 V
Vout = 1.0 V
Vout = 1.8 V
Vout = 3.3 V
TBD
20
0
load traent recovery time1
0
Notes:
1. settling to within 3% of Vout
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date 11/07/2014 │ page 3 of 14
POWER / EFFICIENCY
parameter
conditions/description
min
typ
max
units
output power
Vout = 5.0 V + 10% margin
0
66
W
Vout = 0.6 V
Vout = 1.0 V
Vout = 1.8 V
Vout = 3.3 V
85.3
89.8
92.7
94.2
Iout = 50% of max
Iout = max
%
%
efficiency
Vout = 0.6 V
Vout = 1.0 V
Vout = 1.8 V
Vout = 3.3 V
81.1
86.6
90.9
93.3
Vout = 0.6 V
Vout = 1.0 V
Vout = 1.8 V
Vout = 3.3 V
CTRL deasserted
0.45
0.58
94
idle power
W
switching frequency
kHz
FAULT PROTECTION
parameter
conditions/description
min
typ
max
5.6
units
V
output over voltage protection
output over current protection
input under voltage protection
input over voltage protection
over temperature protection
thermal protection hysteresis
(OVP) adjustable via PMBus commands
(OCP) adjustable via PMBus commands
adjustable via PMBus commands
TBD
A
4.5
14
V
adjustable via PMBus commands
V
(OTP) measured on the module
125
15
°C
°C
difference between temture fat and rning
POWER CONNECTIONS
symbol
pin
1A
2A
3A
IO type
description
Input voltage
Power ground
Output voltage
VIN
Power
GND
Ground
Power
VOUT
COMMUNICATION CONNECTIONS
symbol
VTRK/PG
PREF
+S
pin
4A
4B
5
6A
6B
7A
7B
8A
8B
9A
9B
IO pe
Analog/Dtal
Ground
Analog
description
Voltage tracking input or power good output
Pin-strap ground
Output voltage positive sense input
Output voltage negative sense input
SMBus address pinstrap
-S
SA0
Digital
D
Digital
Digital-DC Communications bus (equivalent to Ericsson Power GCB)
SC
Digital
SBMBus clock
SMBus data
SDA
Digital
VSET
SYNC
SALRT
CTRL
Digital
Output voltage pin-strap
Synchronization I/O
SMBus alert
Digital
Digital
Digital
Remote control or enable pin
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date 11/07/2014 │ page 4 of 14
LOGIC INPUT/OUTPUT CHARACTERISTICS
parameter
conditions/description
min
typ
max
0.8
units
input high voltage (VIH)
input low voltage (VIL)
output high voltage (VOH
CTRL, DDC, SA0, SCL, SDA, SYNC, VSET
CTRL, DDC, SA0, SCL, SDA, SYNC, VSET
DDC, SALRT, SDA, SYNC, PG
2
V
V
)
2.25
output low voltage (VOL
)
DDC, SALRT, SDA, SYNC, PG
0.4
OUTPUT DECOUPLING CAPACITOR RECOMMENDATION
parameter
conditions/description
min
typ
nits
COUT
total output capacitance located on host board
300
,000
µF
DDC CONFIGURATION REQUIREMENTS
A pull-up resistor is required on the DDC in order to guarantee the rise time as follows:
Rise TimeDDC = RDDC * CDDC < 1 µs
RDDC is the DDC pull-up resistor and CDDC is the DDC capacitive loading. The pull-up resistor shobe tieto an external 3.3V or 5V
supply. The designer needs to ensure that the resistor pull-up voltage is present rinodule poer-up. Each module connected to
the DDC presents ~10 pF, each inch of FR4 PCB trace introduces ~2 pF of capacitivloading.
SMBUS CONFIGURATION REQUIREMENTS
The complete specifications for the SMBus can be found on the foling web pag: www.pmbus.info , smbus.org
TYPICAL CHARACTERISTICS
Conditions (applies to all graphs unless stated otherwise): TP1 = 25°C, Vin 2 V, Cin = 470 μF0 mΩ, Cout = 470 μF/8 mΩ, Iout = Imax
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date 11/07/2014 │ page 5 of 14
(
)
TYPICAL CHARACTERISTICS CONTINUED
Conditions (applies to all graphs unless stated otherwise): TP1 = 25°C, Vin = 12 V, Cin = 470 μF/10 mΩ, Cout = 470 μF/8 mΩ, Iout = Imax
Start-up
Shut-down
(Vout = 1.0 V)
(Vout = 1.0 V)
Output Load Transient Response
Oupt Ripple and Noise
(Vout = 1.0 V, Iout = 3.0
9.0
3.0 A, 2 A/μs)
(Vout = 1.0
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date 11/07/2014 │ page 6 of 14
MECHANICAL DRAWING
THROUGH-HOLE
units: mm [inches]
tolerance unless specified:
X.X ±0.50 [0.02]
X.XX ±0.25 [0.01]
(not applied on footprint or typical values)
B
12.700 0.500
21.006 0.827
TOP VIEW
PIN
NUMBER
PIN
NAME
MATERIAL PLATING
7.225 0.284
1A
VIN
Au 0.25 μm
over Ni 2.5
μm
2A
GND
VOUT
VTRK/PG
PREF
+S
3A
4A
4B
5A
FRONT VIEW
5B
-S
2.000 0.079
2.000 079
2.000 0.079
2.000 0.079
1.850 0.073
6A
SA0
Copper Alloy
6B
DDC
Au 0.76 μm
9A
9B
8B
7B
6B
A
7A
SCL
7B
SDA
8A
7A
6A
8A
VSET
SYNC
SALRT
CTRL
2.000 0.079
(5 PLCS)
6.200 0.244
8B
13.700 0.539
9A
2A
3A
9B
9.700 0.382
5A
4A
5B
4B
0.889 0.035
(12 PLCS)
16.000 0.630
22.000 0.866
0.040
PLCS)
PCB LAYOUT
TOP VIEW
Recommended keep out area for user components
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MECHANICAL DRAWING (CONTINUED)
SURFACE MOUNT
units: mm [inches]
tolerance unless specified:
X.X ±0.50 [0.02]
X.XX ±0.25 [0.01]
(not applied on footprint or typical values)
A
12.700 0.500
21.006 0.827
TOP VIEW
PIN
NUMBER
PIN
NAME
MATERIAL PLATING
7.225 0.284
1A
VIN
Au 0.1 μm
over Ni 1~3
μm
2A
GND
VOUT
VTRK/PG
PREF
+S
0.90 0.035
(12 PLCS)
3A
1.60 0.063
(3 PLCS)
4A
4B
FRONT VIEW
5A
2.000 0.079
5B
-S
6A
SA0
Copper Alloy
2.000 0.079
000 0.709
6B
DDC
2.0 0.079
9A
Au 0.1 μm
over Ni 2 μm
0.150 0.006
7A
SCL
9B
8B
7B
6B
1A
7B
SDA
8A
7A
6A
8A
VSET
SYNC
SALRT
CTRL
6.200
8B
9A
13.700 0.539
9.700 0.382
2A
3A
9B
5A
4A
5B
4B
2.000 0.079
(5 PLCS)
1.300 0.051
(12 PLCS)
00 0.083
(LCS)
22.000 0.866
PCB LAYOUT
TOP VIEW
Recommended keep out area for user components
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date 11/07/2014 │ page 8 of 14
POWER CONVERSION AND MANAGEMENT
OPERATING INFORMATION
Power Conversion Overview
The NDM2Z-12 modules are available in different
configurations; not all pins and functions are supported by
each configuration. This document describes all pins and
functions.
The Novum Z Products PMBus Commands application note
defines the available PMBus™ commands.
The NDM2Z-12 module has several features to enabe high
power conversion efficiency. Non-linear loop respons(NLR)
improves the response time and reduces the output
deviation as a result of load transients. The incoron
of DFM enhances the performance of CUI modules over hat
available from conventional analog Pings.
REQUIRED CONFIGURATIONS
Power Management Overview
NDM2Z-12 Module Pins
The NDM2Z-12 module incorporates e range of power
management features. All power managment functions
can be configured via the s interface. he NDM2Z-12
can monitor and report meristics of the module
including input voltage, outltage, output current and
internal temperatu. Additiolly, the NDM2Z-12 includes
circuit protection feates that protect the module and load
from damge ue to sysm fauts. Monitoring parameters
can also be onfigured vide alerts for specific
contions. Thability of CUI modules to digitally control,
confire and moitor OS features provides significant
benefits ver traditinal analog POL products.
Each NDM2Z-12 module should have a resistor placed
between VSET and PREF to set the output voltage of the
module. The maximum output voltage which can be
configured by PMBus commands can never exceed 110% of
the voltage set by the VSET pin. The SMBus address of each
module is set by either pin-strap configuration or resis-
tor value associated with the SA0 pin. More information
regarding setting the SMBus address for a module can be
found in the section titled “SMBus”.
PCB Layout
Good performance of any point of load voltage regulator
module can only be achieved with careful PCB layout
considerations. Ground planes or very wide traces should
be used for power and ground routing. Input capacs
should be placed close to the input voltage pins of th
module and output capacitors should be placclose to he
load. The module should also be placed as cloas possibl
to the load.
CONIGURING THE MODULE
Pin Settings
Pin SA0 is used to set the SMBus address of the NDM2Z-12
module. Details of this feature are discussed in the section
titled “SMBus”. Pin SYNC is used to synchronize the switch-
ing clock of the module to an external clock source. More
information regarding synchronization can be found in the
section titled “SWITCHING FREQUENCY AND SYNCHRONI-
ZATION”.
Pin VSET is used to configure the output voltage of the
module. The voltage established by the VSET pin limits the
maximum output voltage that can be configured by SMBus
commands.
INPUT AND OUTPUT CAPACITORS
Input Capacitors
Input capacitors are recomended to be ed ith the
NDM2Z-12 module in oer to mimize inpuvoltage ripple.
A 330 μF POSCAP or electlyc and 3x 22 μF ceramic
capacitors should be placed close apossible to the input
pins of the modditional ipucapacitors may be
used if less ge ripple is desired.
The SA0, SYNC and VSET pin configurations are read by
the module when power is applied or whenever a SMBus
RESTORE command is issued.
Output Capaci
The CTRL pin is active high and can be used to enable the
module. Internal connections on the module will drive the
CTRL pin high if it is left floating.
Pins +S and -S are used for remote voltage sensing of the
output voltage.
Outcitors e recommended to be used with the
Nodule in rder to improve transient response
and ze output voltage ripple. A 330 μF POSCAP or
electroc and 3x 22 μF ceramic capacitors should be
placed as lose as possible to the load. Additional output
capacitors may be used to further improve the output
voltage characteristics.
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date 11/07/2014 │ page 9 of 14
Unused Pins
Table 1 describes the required or allowed connections for unused pins on the NDM2Z-12 module.
Table 1: Unused Pins
VSET
Tie to PREF with 133 kΩ resistor, see VOUT_COMMAND PMBus command
VTRK/PG, SA0, SYNC, CTRL, +S, -S
DDC, SCL, SDA, SALRT
Float
Pulled high with resistor, see "RECOMMENDED OPERATIN CONDITIONS"
Configuration of Parameters Using the SMBus
The NDM2Z-12 module is supplied with default settings. All module settings (except for module ess,
configured by pin SA0) can be re-configured via the SMBus interface. The output voltage can not reater than
110% of the voltage set by the VSET pin.
START-UP PROCEDURE
Start-up Sequence
The NDM2Z-12 module follows an internal start-up procedure after power is applito pin V. Table 2 describes the
start-up sequence. If the module is to be synchronized to an external clock source, te clock equency must be stable
prior to asserting CTRL (or applying input voltage to the module if CTRL noused). Oe this process is completed, the
module is ready to accept assertion of CTRL and commands via the SMBus nterface.
Table 2: NDM2Z-12 Start-up sequence
STEP
STEP NAME
DESCRIPTION
TIME DURATION
Power applied or
RESTORE_FACTORY
Input voltage is applied to NDM2-1module pin or RESTORE_FACTORY
PMBus command issued
Depends on input
supply ramp time
1
Factory configuration
settings
Module loads factory curation ettingThis step is also performed after
using PMBus commando reste he factoconfiguration file.
2
3
SA0, SYNC and VSET
pin settings
Module loads ves configud by the SA0, SYNC and VSET pins.
Approximately 10
ms (module will
ignore a CTRL
signal and PMBus
commands during
this period)
Module loads defauconfiguratiosettings. This data over-rides pin setting
data, except for maxium limit for VOUT_COMMAND. This step also performed
after using PMBus commnds to restore the default configuration file.
Default configuration
settings
4
5
Mole loads user configuion settings. This data over-rides pin setting and
defauconfiguration data, except for maximum limit for VOUT_COMMAND. This
step alserformed aer using PMBus commands to restore the user
configuratifile.
User configuration
settings
6
7
Module ready
Thmodule is dy to accept a CTRL signal.
---
he module requires approximately 5 ms following a CTRL signal and prior to
ramping itoutput. Additional pre-ramp delay may be configured using PMBus
commas.
Approximately
5 ms
Pre-ramp delay
Soft-start p Times
voltage is present on the NDM2Z-12 module output before
the module output voltage is enabled. If a pre-bias voltage
exists, the output voltage of the module is set to match the
existing pre-bias voltage. The output voltage is then ramped
to the final regulation value in the specified ramp time.
The pre-bias voltage can be higher or lower than the final
output voltage. Higher pre-bias output voltages will cause
energy to be pumped into the input voltage rail powering
the module. This condition could cause the module to report
an error condition if the input voltage exceeds the input
over voltage lock out threshold. The module will report an
error condition if the pre-bias output voltage exceeds the
output over voltage protection threshold.
Once CTRL is the NDM2Z-12 module requires a
pre-ramp delay e before the output voltage may be
alloart thramp-up process. After the delay period
hthe outpwill begin to ramp towards the
targge according to the pre-configured soft-start
ramp te that has been set. It is recommended to set the
soft-start mp time to a value greater than 500 μs in order
to prevent fault conditions due to excessive inrush current.
Soft start delay and ramp times may be set using PMBus
commands.
Output Pre-Bias
An output pre-bias condition exists when a non-zero
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date 11/07/2014 │ page 10 of 14
RESISTOR (kΩ) VOUT (V)
Power Good
Table 4: Resistor VOUT voltage settings
The PG pin on the NDM2Z-12 module will assert if the
output of the module is within tolerance of the target
voltage and no fault conditions exist. A PG delay period
is defined as the time from when all conditions within the
module for asserting PG are met to when PG is actually
asserted. By default, PG delay is set equal to the soft-start
ramp time setting. The tolerance, polarity and delay of PG
may be configured via PMBus commands.
RESISTOR (kΩ) VOUT (V)
10.0
11.0
12.1
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
28.7
31.6
34.8
38
42.2
0.60
0.65
0.70
0.75
0.80
0.85
0.90
0.95
1.00
1.0
1.10
1.15
1.20
.25
1.3
1
46.4
51.1
1.50
.60
70
10
1.9
2.00
2.10
2.20
2.30
2.50
3.00
3.30
4.00
5.00
5.50
56.2
61.9
68.1
Soft-stop Delay and Ramp Times
After CTRL is de-asserted the NDM2Z-12 module utilizes
a pre-ramp delay time before the output starts the ramp-
down process. After the delay period has expired, the
output will begin to ramp towards ground according to the
pre-configured soft-stop ramp time that has been set. It is
recommended to set the soft-start ramp down to a value
greater than 500 μs in order to prevent voltage spikes in
the module input supply rail due the energy stored in the
output capacitors. There will be a delay after the output
voltage has reached ground potential and then the output of
the module will be set to high impedance. Once the output
of the module is high impedance the output voltage may
float to a non-zero value if another source or leakage path
is connected to the output. The soft-stop delay and ramp
times may be configured via PMBus commands.
10
110.
121.0
130
147.0
162.0
178.0
SMBuSetting Mthod
The voltae present at the VOUT pin of the NDM2Z-12
odule can e econfigured using PMBus commands. A
voge level econfigured by a PMBus command over-
rides e voltage set by the VSET pin, but cannot be set to
greater than 110% of the voltage set by the VSET pin.
PMBus commands can be used to set the output of e
NDM2Z-12 module to high impedance as soon as the otput
voltage drops below a selectable threshold.
Voltage Tracking
The NDM2Z-12 module includes a feature that allows the
output ramp voltage to track the ramp of a reference
voltage which is applied to the VTRK/PG pin. The voltage
ramp tracking capability can be configured so that member
modules track at either 50% or 100% of the reference
voltage ramp rate. In addition, a member module can be
configured so that the termination voltage either tracks
or ignores perturbations on the reference voltage once it
has stabilized. Tracking at 50% and tracking final voltage
perturbations is intended for DDR memory applications. All
other applications which required voltage tracking should
use 100% tracking and ignore final voltage perturbations.
The reference voltage for tracking must have a target volt-
age which is equal to or greater than the target voltage of
the member modules. The turn-on delay of the reference
voltage must be at least 10 ms greater than that set for the
member modules. In voltage tracking mode, the turn-off
delay of the member modules establishes the time duration
which the member modules will track the reference voltage
after CTRL is de-asserted. The turn-off delay of the member
modules must be at least 5 ms greater than the sum of the
turn-off delay and fall time of the reference voltage.
OUTPUT VOLTAGE SETTING
Pin-Strap and Resistor Setting ethods
Using the pin-strap method, e voltaon the VOT pin
of the NDM2Z-12 module an be set to oof tee default
voltages as shown in Tae 3. Tabe 4 lists tavailable
output voltage settings wh a esistor connected between
VSET and PREF.
Table 3: Pin-T voltage ings
T
VOUT (V)
0.6
LOW < 0.8 V)
OPEN (N/C)
1.2
HIGH (> 2.0 V) 2.5
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Current sharing modules which are also configured to track
a voltage must have all of the VTRK/PG pins tied together.
All of the CTRL pins of the member modules must also be
connected together and driven by a common source. The
rise and fall times of the member modules should be set
between 5 ms and 10 ms to ensure current sharing while
ramping. PMBus commands can be used to configure the
voltage tracking features.
loop every time the output voltage ramps to the regulated
level. PMBus commands can be used to configure when the
module re-compensates the loop.
The user also has the option to manually configure e loop
compensation.
Non-Linear Response (NLR) Settings
The NDM2Z-12 module incorporates a non-linear respoe
(NLR) loop that decreases the respone and the outp
voltage deviation in the event of a tput load
current step. This implementation higher
equivalent loop bandwidth than what d be possible
using a traditional linear lop. PMBus comands can be
used to configure the NLnse of the odule.
Voltage Margining
The NDM2Z-12 module offers a means to vary the output
voltage higher or lower relative to the nominal voltage
setting. The rate of change of the output voltage during
voltage margining is also configurable. The margin feature
can be reconfigured through PMBus commands.
Adaptive Diode Emulatio
Please contact CUtechnical pport regarding the
implementation of adptive dide emulation.
SWITCHING FREQUENCY AND SYNCHRONIZATION
Switching Frequency
Adaptive requey Corol
The switching frequency of the NDM2Z-12 module can
be reconfigured by PMBus commands or controlled by an
external clock source connected to the SYNC pin. If the
module is operated at a switching frequency of other than
the factory default setting, the compensation may need to
be adjusted and the ripple, noise, transient response and
efficiency may be affected.
The DM2Z-module includes adaptive frequency control
to iprove convrsion efficiency. Adaptive frequency control
is not ailable for urrent sharing groups and is not
allowed wen the module is placed in auto-detect mode
nd a clock uce is present on the SYNC pin.
Adtive freuency control is only available while the
moduis operating within adaptive diode emulation mode.
Adaptive frequency control can be enabled and disabled
with PMBus commands.
SYNC Auto Detect
The NDM2Z-12 module will automatically chk for a clo
signal on the SYNC pin after CTRL is asserted (applying
input voltage to the module if CTRL is not used). Ia clock
signal is present, the module will synchronize to the ing
edge of the external clock. The exrnal clock signal mst
be stable and conform to the RECOMENDED OPERATING
CONDITIONS” parameters hen CTRL is sserte(or
applying input voltage tthe mode if CTRinot used).
In the event of a loss of e exrnal clock signal, the
output voltage of the modumay show ransient overshoot
or undershoot ae module will aumatically configure
to switch at y close to previous incoming
frequency. Ing clock signal is present when CTRL
is asserted (or ing input voltage to the module if CTRL
is no, the odule will switch at the frequency set by
ttion file
MULTI-MODULE CONFIGURATION
Output Sequencing
Multiple device sequencing of NDM2Z-12 modules may
be achieved by issuing PMBus commands to assign the
preceding device in the sequencing chain as well as the
device that will follow in the sequencing chain. The CTRL
pins of all devices in a sequencing group must be tied
together and driven high to initiate a sequenced turn-on of
the group. CTRL must be driven low to initiate a sequenced
turnoff of the group.
CONTL LOOP
Adaptive Lop Compensation
The NDM2Z-12 module employs automatic adaptive loop
compensation to increase the performance and stability of
the module over a wide range of conditions. The default
setting configures the module to re-compensate the control
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
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Fault Spreading
The default response to an output voltage fault is to
NDM2Z-12 modules can be configured to broadcast a fault
event over the GCB (Group Communication Bus) to the
other modules in the group. When a nondestructive fault
occurs and the module is configured to shut down on a
fault, the module will shut down and broadcast the fault
event over the GCB. The other modules on the GCB will
shut down together if configured to do so, and will attempt
to re-start in their prescribed order if configured to do so.
PMBus commands can be used to configure the
transmission and reception of faults.
immediately shut down. The module will continuously check
for the presence of the fault condition, when the fault
condition no longer exists the module will be re-enaled.
PMBus commands can be used to set the voltage
thresholds and configure the response of the module o the
fault condition. When operating from an external the
only allowed response to an output voltage fault is an
immediate shutdown.
Output Over Current Protection
Output over current protection will prthe NDM2Z-12
module and load from damage if an overad condition is
imposed on the output. Tule will indate a fault
condition when the output threshold is
exceeded. The default resprom an output current fault
is an immediate shdown of e module. The module will
continuously check fothe preence of the fault condition,
and if the ault ondition o longer exists the module will be
re-enabled. MBus coms can be used to configure the
cunt limit theshold and the response of the module to
the falt conditio
Phase Spreading
When multiple NDM2Z-12 modules share a common DC
input supply, it may be desirable to adjust the clock phase
offset of each module. In order to enable phase spreading,
all modules must be synchronized to the same switching
clock. For modules driven by a common synchronizing clock
the phase offset of each module is controlled by the module
addresses; phase offset = device address x 45°.
For example:
• A module address of 0x00 or 0x20 would configure 0° of
phase offset
• A module address of 0x01 or 0x21 would configure 45° o
phase offset
Thermal verload Protection
Te NDM2Z-module includes a thermal sensor that
meures the temperature of the module and indicates a
fault wen the temperature exceeds a preset limit. The
default response from a temperature fault is an
immediate shutdown of the module. The module will
continuously check for the fault condition and once the fault
has cleared the module will be re-enabled. PMBus
commands can be used to configure the thermal
protection threshold and the response of the module to the
fault condition. Permanent damage to the module may
result if the thermal limit is set too high.
• A module address of 0x02 or 0x22 would configure 90° of
phase offset
The phase offset of each module may also be et via t
PMBus.
POWER FAULT MANAGEMENT
Input Under and Over Voltage Lckout
Input under voltage lockout (VLO) ainput over voltage
lockout (OVLO) indicate falts for the ND2Z-1module
when the input voltage lls outse of preshresholds.
The default response due o ainput voltage fault is
an immediate shutdown of tmodule. he module will
continuously cr the presnce f the fault condition.
Once the fan is no longr present, the module
will be re-enus commands can be used to
configure the thholds and response of the module to the
faun.
SMBUS
SMBus Communications
The NDM2Z-12 module provides a SMBus interface that
enables the user to configure the module operation as well
as monitor input and output parameters. The module can
be used with any standard 2-wire I2C host device, accepts
most standard PMBus commands, is compatible with SMBus
version 2.0 and includes an SALRT line to help mitigate
bandwidth limitations related to continuous fault
monitoring. It is recommended that CTRL be pulled low
while configuring the module with PMBus commands.
Pull-up resistors are required on the SMBus lines as
described in "RECOMMENDED OPERATING CONDITIONS".
Ouer and Over Voltage Protection
The N2Z-12 module employs an output voltage
protectiocircuit that can be used to protect load circuitry
from being ubjected to voltages outside of prescribed
limits. A hardware comparator is used to compare the
voltage seen at the +S pin to voltage thresholds. If the +S
pin voltage is outside of these thresholds the PG pin will
de-assert and the module will indicate a fault condition.
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date 11/07/2014 │ page 13 of 14
SMBus Addresses
SINGLE WIRE COMMUNICATIONS
When communicating with multiple SMBus devices using the
SMBus interface, each device must have a unique address
so the host can distinguish between the devices. The
NDM2Z-12 module address can be set according to the
pin-strap options listed in Table 5; address values are
right-justified.
If additional module addresses are required, a resistor can
be connected to pin SA0 as shown in Table 6 to provide up
to 25 unique module addresses.
Digital-DC Bus
The DDC (Digital-DC Communication Bus) is used t
communicate between NDMxZ modules. This dedicad bus
provides the communication channel between modulfor
features such as sequencing, fault spreading, anunt
sharing. A pull-up resistor is required on the DDC as
defined in “RECOMMENDED OPERATIDITIONS”.
Snapshot™ Parameter Capture
The NDM2Z-12 module offers featuret enable the user
to capture parametric data during normoperation or
following a fault. The Snfeature enaes the user to
read status and parametea block read transfer
through the SMBus. This cdone during normal
operation, althougit should e noted that reading the 22
bytes will occupy the MBus fup to 1400 μs.
Table 5: Pin-strap SMBus Addressing
SA0
ADDRESS
0x25
HIGH
OPEN
LOW
0x24
0x23
The SNAH_CONTRcommand enables the user to
store the spshot parrs to flash memory in
resnse to a ending fault as well as to read the stored
data om flash mmory after a fault has occurred.
Automawrites to ash memory following a fault are
triggered wen any fault threshold level is exceeded,
pvided thahe specific response to that fault is
to st down (writing to flash memory is not allowed if the
module s configured to re-try following the specific fault
condition). It should also be noted that the input voltage to
the module must be maintained during the time when the
module is writing the data to flash memory; a process that
requires between 700 μs to 1400 μs depending on whether
the data is set up for a block write. Undesirable results may
be observed if the input voltage to the module drops too
low during this process. In the event that the module
experiences a fault and power is lost, the user can extract
the last SNAPSHOT parameters stored during the fault
by using the SMBus to transfer data from flash memory to
RAM and then using the SMBus to read data from RAM.
Table 6: Single Resistor SMBus Addressing
RSA0 (kΩ)
10.0
11.0
12.1
13.3
14.7
16.2
17.8
19.6
21.5
23.7
26.1
28.7
31.6
ADDRESS
0x64
0x65
0x66
0x67
0x68
0x69
0x6A
0x6B
0x6C
0x6D
0x6E
0x6F
RSA0 (kΩ)
34.8
ADDRESS
0x71
0x72
0x73
0x74
75
06
0x77
0x78
x79
0xA
0x7
0x7C
38.3
42.2
46.4
51.1
56.2
61.9
68.1
75.0
82.5
90.9
1.0
0x70
Monitoring Via SMBus
A system controller can be ud to motor the NDM2Z-12
module system eters thrgh he SMBus. Fault
conditions ccted by moitoring the SALRT pin,
which will be en pre-configured fault conditions
occur. Modules also be monitored for power conversion
parncludibut not limited to the following:
THERMAL CONSIDERATIONS
Mounting
Heat from the NDM2Z-12 module will be conducted through
the pins to the host board. Provisions must be made for the
host board to accommodate this additional heating.
• Iage
• Outvoltage
• Output urrent
• Module teperature
• Switching frequency
• Duty cycle
Airflow
Airflow past the NDM2Z-12 module will assist in cooling
the module. Factors affecting the efficiency of the cooling
include the rate, direction and temperature of the airflow.
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CUI Inc │MODEL: NDM2Z-12H │ DESCRIPTION: AUTO COMPENSATED, DIGITAL DC-DC POL CONVERTER
date 11/07/2014 │ page 14 of 14
REVISION HISTORY
rev.
date
0.9
12/12/2013
03/13/2014
11/07/2014
0.91
0.92
The revision history provided is for informational purposes only and is believed to be accurate.
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Novum is a traark of CUI.
PMBus is a trademrk of SMIF, Inc.
Digital-DC is a trademark of Intersil Corporation.
CUI Novum products use patented technology licensed from Power-One.
All other trademarks are the property of their respective owners.
CUI offers a two (2) year limited warranty. Complete warranty information is listed on our website.
CUI reserves the right to make changes to the product at any time without notice. Information provided by CUI is believed to be accurate and reliable. However, no responsibility is
assumed by CUI for its use, nor for any infringements of patents or other rights of third parties which may result from its use.
CUI products are not authorized or warranted for use as critical components in equipment that requires an extremely high level of reliability. A critical component is any component of a
life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
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