CY25701_07 [CYPRESS]
Programmable High Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No Spread Spectrum (XO) Option; 可编程高频晶振与扩频（ SSXO ）和No扩频（ XO ）选项
| 型号： | CY25701_07 |
| 厂家： | 
CYPRESS |
| 描述： | Programmable High Frequency Crystal Oscillator with Spread Spectrum (SSXO) and No Spread Spectrum (XO) Option |
| 文件： | 总8页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY25701
Programmable High Frequency Crystal
Oscillator with Spread Spectrum (SSXO)
and No Spread Spectrum (XO) Option
Features
Benefits
■ Crystal Oscillator with Spread Spectrum Clock (SSXO)
■ No Spread Spectrum (XO) Option
■ Provides a wide range of spread percentages for maximum
electromagnetic interference (EMI) reduction to meet
regulatory agency electromagnetic compliance (EMC) require-
ments. Reduces development and manufacturing costs and
time-to-market.
■ Wide operating output clock frequency range of 10 –166 MHz
■ Programmable spread spectrum with nominal 31.5 kHz
modulation frequency
■ This versatile programming feature enables the user to switch
between SSXO (with Spread) and XO (without Spread)
functions with ease.
■ Center spread: ±0.25% to ±2.0%
■ Down spread: –0.5% to –4.0%
■ No spread: ± 0.0%
■ Internal PLL to generate up to 166 MHz output.
■ Suitable for most PC, consumer, and networking applications
■ Application compatibility in standard and low-power systems
■ Integrated phase-locked loop (PLL)
■ 85 ps typical cycle-to-cycle jitter with SSCLK = 133 MHz
■ 3.3V operation
■ In house programming of samples and prototype quantities is
available using CY3672 programming kit and CY3724 socket
adapters. Production quantities are available through Cypress’
value added distribution partners or by using third party
programmers from BP Microsystems, and HiLo Systems, and
others.
■ Output enable function
■ Package available in 4-Pin ceramic LCC SMD
■ Pb-free package
■ Industrial temperature from –40°C to 85°C
Pin Configuration
Logic Block Diagram
CY25701
RFB
4-pin Ceramic SMD
PLL
with
4
3
MODULATION
CONTROL
VDD
SSCLK
CXIN
OUTPUT
DIVIDERS
and
PROGRAMMABLE
CONFIGURATION
3
OE
1
VSS
2
SSCLK
MUX
CXOUT
1
OE
4
2
VDD
VSS
Cypress Semiconductor Corporation
Document Number: 001-07313 Rev. *B
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised August 24, 2007
CY25701
Pin Definition
Pin
Name
Description
Output Enable pin: Active HIGH. If OE = 1, SSCLK is enabled
Power supply ground
1
2
3
4
OE
VSS
SSCLK
VDD
Spread spectrum clock output (with or without spread)
3.3V power supply
Functional Description
Programming Description
The CY25701 is a Spread Spectrum Crystal Oscillator (SSXO)
IC used to reduce the EMI found in today’s high speed digital
electronic systems.
Factory and Field Programmable CY25701
Factory and field programming is available for samples and
manufacturing by Cypress and its distributors. Submit your
request to the local Cypress Field Application Engineer (FAE) or
sales representative. Once the request is processed, you will
receive a new part number, samples, and data sheet with the
programmed values. This part number is used for additional
sample request and the production orders. Contact your local
Cypress FAE or sales representative for details.
The device uses a Cypress proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the embedded input crystal. By frequency
modulating the clock, the measured EMI at the fundamental and
harmonic frequencies are greatly reduced. This reduction in
radiated energy can significantly reduce the cost of complying
with regulatory agency (EMC) requirements and improve
time-to-market without degrading system performance.
Additional information on the CY25701 is available at the
Cypress web site www.cypress.com.
The CY25701 uses a programmable configuration memory array
to synthesize output frequency and spread%.
Output Frequency, SSCLK Output (SSCLK, pin 3)
The spread percentage is programmed to either center spread
or down spread with various spread percentages. The range for
center spread is from ±0.25% to ±2.00%. The range for down
spread is from –0.5% to –4.0%. Contact the factory for smaller
or larger spread percentage amounts if required. Refer to Table 2
for spread selection and no spread values.
The modulated frequency at the SSCLK output is produced by
synthesizing from the embedded crystal oscillator frequency
input. The range of synthesized clock is from 10 to 166 MHz.
Spread Percentage (SSCLK, pin 3)
The SSCLK spread is programmable to various spread
percentage values from ±0.25% to ±2.0% for center spread and
from –0.5% to –4.0% for down spread. Refer to Table 2 for
available spread options. Enter ±0.0% (No spread) for XO
(crystal oscillator) without spread option.
The frequency modulated SSCLK output is programmable from
10 to 166 MHz.
The CY25701 is available in a 4-pin ceramic SMD package with
an operating temperature range of –40 to 85°C.
Frequency Modulation (SSCLK, pin 3)
The default frequency modulation is programmed at 31.5 kHz for
all SSCLK frequencies from 10 to 166 MHz. Alternate frequency
modulations at 30.1 kHz or 32.9 kHz are selectable using Cyber-
ClocksOnline™ software. Contact the factory for other alternate
modulation frequencies if required.
Table 1. Programming Data Requirement
Pin Function
Pin Name
Pin#
Output Frequency
Spread Percent Code[1]
Frequency Modulation
SSCLK
SSCLK
SSCLK
3
3
%
3
kHz
Units
MHz
Program Value
ENTER DATA
ENTER DATA
ENTER DATA 31.5
Note
1. ±0.0% or Code “Z” for XO (No-Spread) option.
Document Number: 001-07313 Rev. *B
Page 2 of 8
CY25701
Table 2. Spread Percent Selection
Center Spread
Code
Percentage
Code
A
B
C
±0.75%
J
D
E
F
Z
±0.25%
G
±0.5%
H
±1.0%
K
±1.5%
L
±2.0%
M
±0.0%
Z
Down Spread
Percentage
–0.5%
–1.0%
–1.5%
–2.0%
–3.0%
–4.0%
±0.0%
Storage Temperature (Non-condensing) .... –55°C to +100°C
Junction Temperature................................ –40°C to +125°C
Data Retention @ Tj = 125°C.................................>10 years
Package Power Dissipation...................................... 350 mW
Absolute Maximum Ratings
Supply Voltage (VDD).....................................–0.5V to +7.0V
DC Input Voltage ................................... –0.5V to VDD + 0.5V
Operating Conditions
Parameter
Description
Min
3.00
–20
–40
–
Typ
3.30
–
Max Unit
V
Supply voltage
3.60
70
V
DD
T
Ambient temperature (commercial)
Ambient temperature (industrial)
Max. load capacitance @ pin 3
°C
°C
pF
A
T
–
85
A
C
–
15
LOAD
SSCLK
MOD
PU
F
F
T
SSCLK output frequency, C
= 15 pF
10
–
166 MHz
LOAD
Spread Spectrum Modulation Frequency
30.0
31.5
–
33.0
500
kHz
ms
Power up time for VDD to reach minimum specified voltage (power ramp must be 0.05
monotonic)
DC Electrical Characteristics
Parameter
Description
Output high current (pin 3)
Output low current (pin 3)
Input high voltage (pin 1)
Input low voltage (pin 1)
Input high current (pin 1)
Input low current (pin 1)
Output leakage current (pin 3)
Input capacitance (pin 1)
Supply current
Condition
= V – 0.5, V = 3.3V (source)
Min
10
Typ
12
12
–
Max Unit
I
I
V
V
–
–
mA
mA
V
OH
OL
OH
OL
DD
DD
= 0.5, V = 3.3V (sink)
10
DD
V
V
I
CMOS levels, 70% of V
CMOS levels, 30% of V
0.7V
V
DD
IH
IL
DD
DD
DD
–
–
–
–
0.3V
V
DD
V
V
= V
= V
–
10
10
10
7
μA
μA
μA
pF
mA
IH
in
in
DD
SS
I
I
–
IL
OZ
Three-state output, OE = 0
Pin 1, or OE
–10
–
–
[2]
C
5
IN
I
V
C
= 3.3V, SSCLK = 10 to 166 MHz,
DD
–
–
50
VDD
= 0, OE = V
DD
LOAD
Δf/f
Initial accuracy at room temp.
Freq. stability over temp. range
T = 25°C, 3.3V
–25
–25
–12
–5
–
–
–
–
25
25
12
5
ppm
ppm
ppm
ppm
A
T = –20°C to 70°C, 3.3V
A
Freq. stability over voltage range 3.0 to 3.6V
Aging T = 25°C, First year
A
Document Number: 001-07313 Rev. *B
Page 3 of 8
CY25701
AC Electrical Characteristics[2]
Parameter
Description
Output Duty Cycle
Condition
SSCLK, Measured at V /2
Min
45
–
Typ
50
–
Max
Unit
%
DC
55
2.7
2.7
200
400
DD
t
t
Output Rise Time
Output Fall Time
20%–80% of V
20%–80% of V
C = 15 pF
ns
R
F
DD,
DD,
L
C = 15 pF
–
–
ns
L
[3]
T
Cycle-to-Cycle Jitter SSCLK (Pin 3) SSCLK ≥133 MHz, Measured at V /2
–
85
215
ps
CCJ1
DD
25 MHz ≤ SSCLK <133 MHz, Measured at
–
ps
V
/2
DD
SSCLK < 25 MHz, Measured at V /2
–
–
–
–
–
1% of
s
DD
1/SSCK
T
T
T
Output Disable Time (pin1 = OE)
Output Enable Time (pin1 = OE)
PLL Lock Time
Time from falling edge on OE to stopped
outputs (Asynchronous)
150
150
–
350
350
10
ns
ns
ms
OE1
Time from rising edge on OE to outputs at a
valid frequency (Asynchronous)
OE2
Time for SSCLK to reach valid frequency
LOCK
Application Circuit
Figure 1. Application Circuit Diagram
0.1 µF
Power
3
4
SSCLK
VDD
CY25701
VSS
2
OE
1
VDD
Note
2. Guaranteed by characterization, not fully tested.
3. Jitter is configuration dependent. Actual jitter depends upon output frequencies, spread percentage, temperature, and output load. For more information, see
the application note, “Jitter in PLL Based Systems: Causes, Effects, and Solutions” available at http://www.cypress.com/clock/appnotes.html or contact your
local Cypress Field Application Engineer.
Document Number: 001-07313 Rev. *B
Page 4 of 8
CY25701
Switching Waveforms
Figure 2. Duty Cycle Waveform
Cycle Timing (DC = t1A/t1B
)
t
1B
t
1A
SSCLK
Figure 3. Output Rise/Fall Time Waveform
VDD
0V
SSCLK
Tr
Tf
Output Rise time (Tr) = (0.6 x VDD)/SR1 (or SR3)
Output Fall time (Tf) = (0.6 x VDD)/SR2 (or SR4)
Refer to AC Electrical Characteristics table for SR (Slew Rate) values.
Figure 4. Output Enable/Disable Timing Waveforms
VDD
0V
VIH
OUTPUT
ENABLE
TOE2
VIL
High Impedance
SSCLK
(Asynchronous)
TOE1
Document Number: 001-07313 Rev. *B
Page 5 of 8
CY25701
Informational Graphs [4]
172.5
171.5
169.5
169
168.5
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= +/-1%
Spread Spectrum Profile: Fnom=166MHz,
Fmod=30kHz, Spread%= -4%
170.5
169.5
168
167.5
167
166.5
168.5
167.5
166.5
Fnominal
166
165.5
165
164.5
164
163.5
163
Fnominal
165.5
164.5
163.5
162.5
161.5
160.5
159.5
162.5
0
20
40
60
80
100 120 140
Time (us)
160 180 200
0
20
40
60
80
100
Time (us)
120
140 160 180
200
68.5
68
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= -4%
67.5
Spread Spectrum Profile: Fnom=66MHz,
Fmod=30kHz, Spread%= +/-1%
67
66.5
66
67.5
67
66.5
66
Fnominal
Fnominal
65.5
65
65.5
64.5
64
65
63.5
64.5
0
20
40
60
80
100
Time (us)
120
140 160
180
200
0
20
40
60 80
100 120 140 160 180 200
Time (us)
Notes
4. The “Informational Graphs” are meant to convey typical performance levels. No performance specifications are implied or guaranteed. Refer to the tables on
pages three and four for device specifications.
Document Number: 001-07313 Rev. *B
Page 6 of 8
CY25701
Ordering Information
Part Number
Package Description
Product Flow
Lead-free (Pb-free)
CY25701FLXCT[5]
CY25701FLXIT[5]
CY25701LXCZZZT[6]
CY25701LXIZZZT[6]
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
4-Lead Ceramic LCC SMD -Tape and Reel
Commercial, –20° to 70°C
Industrial, –40° to 85°C
Commercial, –20° to 70°C
Industrial, –40° to 85°C
Actual Marking[7]
CY25701FLX*
CY25701LX*
F=Field
Programmable
Marketing Part Number (CY25701)
Marketing Part Number (CY25701)
L = LCC
C Y 2 5 7 0 1 L
C Y 2 5 7 0 1 F
X
*
z
z
z
Y W W
X
*
Y W W
L
zzz = Programmable Dash Code YWW = Date Code (Year & WW)
Temp
YWW = Date Code (Year & WW)
Pin 1 mark
X = Pb free
Temp
Pin 1 mark
L = LCC X = Pb free
Package Drawings and Dimensions
Notes
5. “FLX” suffix is used for products programmed in the field by Cypress distributors.
6. “ZZZ” denotes the assigned product dash number. This number is assigned by the factory after the output frequency and spread percent programming data is
received from the customer.
7. Temp can be C (Com’l) or I (Industrial).
Document Number: 001-07313 Rev. *B
Page 7 of 8
CY25701
Document History Page
Document Title: CY25701 Programmable High-frequency Crystal Oscillator with Spread Spectrum(SSXO) and No
Spread Spectrum(XO) Option
Document Number: 001-07313
Orig. of
Change
REV.
ECN NO. Issue Date
Description of Change
**
442944
487736
1414203
See ECN
RGL
New data sheet
*A
*B
See ECN KKVTMP Added Industrial temp
See ECN DPF/VED Replaced the Package Drawing and Dimension figure on page seven and
various copy edits; the reference to the software is now CyberClocksOn-
lineTM rather than CyberClocks software.
© Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any
circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical,
life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical
components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems
application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign),
United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of,
and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress
integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without
the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not
assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where
a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer
assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
Document Number: 001-07313 Rev. *B
Revised August 24, 2007
Page 8 of 8
PSoC Designer™, Programmable System-on-Chip™, and PSoC Express™ are trademarks and PSoC® is a registered trademark of Cypress Semiconductor Corp. All other trademarks or registered
trademarks referenced herein are property of the respective corporations.
Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided
that the system conforms to the I2C Standard Specification as defined by Philips.
All products and company names mentioned in this document may be the trademarks of their respective holders.
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