CY27C512-150ZC [CYPRESS]
OTP ROM, 64KX8, 150ns, CMOS, PDSO28, TSOP-28;
| 型号： | CY27C512-150ZC |
| 厂家： | 
CYPRESS |
| 描述： | OTP ROM, 64KX8, 150ns, CMOS, PDSO28, TSOP-28 OTP只读存储器 光电二极管 内存集成电路 |
| 文件： | 总9页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1CY27C512
fax id: 3019
CY27C512
64K x 8 CMOS EPROM
is also available in windowed packages (28-pin hermetic DIP
and and 32-pin LCC) which allow the device to be erased with
UV light for 100% reprogrammability.
Features
• Very Fast Read Access Time: (45 - 200 ns)
• 5V ± 10% Power Supply
• Capable of withstanding >2001V ESD
• Latch-up Protection up to 200mA
• Two line control functions to prevent bus contention
• Standard JEDEC Packages
The CY27C512 is equipped with a power-down chip enable
(CE) input and output enable (OE) to prevent bus contention.
When CE is deasserted, the device powers down to a
low-power stand-by mode. The OE pin three-states the out-
puts without putting the device into stand-by mode. While CE
offers lower power, OE provides a more rapid transition to and
from three-stated outputs.
— 32-pin PLCC
— 28-pin TSOP
The memory cells utilize proven EPROM floating-gate
technology and byte-wide intelligent programming algorithms.
The EPROM cell requires only 12.75V for the supervoltage
and low programming current allows for gang programming.
The device allows for each memory location to be tested
100%, because each location is written to, erased, and
repeatedly exercised prior to encapsulation. Each device is
also tested for AC performance to guarantee that the product
will meet DC and AC specification limits after customer
programming.
— 28-pin, 600-mil plastic DIP
— 32-pin, hermetic LCC
— 28-pin, 600-mil hermetic DIP
• Available in Commercial, Industrial, and Military
Temperature Ranges
Functional Description
The CY27C512 is a high-performance, 512-Kbit ultraviolet
erasable programmable read-only memory (EPROM)
organized as 64 Kbytes by 8 bits. It is available in
JEDEC-standard, one-time programmable (OTP), 32-pin
PLCC and 28-pin PDIP and TSOP packages. The CY27C512
The CY27C512 is read by asserting both the CE and the OE
inputs. The contents of the memory location selected by the
address on inputs A −A will appear at the outputs O −O .
15
0
7
0
Logic Block Diagram
A0
A1
O 0
A2
PROGRAMMABLE
O 1
A3
A4
A5
ARRAY
O 2
O 3
DATA OUTPUTS
ADDRESS INPUTS
A6
MULTIPLEXER
A7
A8
ADDRESS
DECODER
O 4
O 5
A9
A10
A11
A 12
A13
POWER DOWN
O 6
O 7
A14
A15
CE
OE
OUTPUT ENABLE
DECODER
C512–1
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
April 1995 Revised- March 19, 1997
CY27C512
Pin Configurations
[1]
DIP/WDIP (P and W)
PLCC/LCC (J and Q)
Top View
TSOP (Z)
Top View
Top View
1
28
27
26
A
A
A
V
CC
15
OE/VPP
22
23
21
20
19
A10
CE
O7
O6
O5
O4
O3
GND
O2
O1
O0
A0
A1
A2
2
3
4
A
A
A
A
A
4
3
2
32 31 30
1
12
14
13
8
A11
A 9
A 8
A13
A14
VCC
A15
A12
A7
A6
A5
A4
A3
A8
A9
A 6
29
28
27
7
24
25
26
27
28
1
2
3
4
5
6
7
5
6
7
8
A 5
A 4
A 3
A 2
A 1
A 0
A
25
24
23
22
21
6
18
A 11
A
A
5
6
5
17
16
15
14
13
12
11
10
9
9
26 NC
25 OE/VPP
24
23 CE
4
11
9
A
A
A
7
8
9
10
11
12
13
14
OE/V
3
A10
PP
10
11
12
13
A
2
10
NC
O0
O
1
22
21 O76
14 15 16 17 18 19 20
20
19
18
17
16
CE
A
0
O
O
O
O
7
6
5
O
O
O
0
1
2
4
3
8
O
GND
15
C512–3
C512–4
C512–2
Selection Guide
–45
–55
–70
70
70
25
50
60
15
25
–90
90
90
30
50
60
15
25
–120
–150
150
150
50
–200
200
200
60
Maximum Access Time (ns)
CE Access Time (ns)
45
45
20
50
60
15
25
55
55
20
50
60
15
25
120
120
40
OE Access Time (ns)
[2]
I
(mA)
Com’l(Max)
Mil
50
50
50
CC
Power Supply Current
60
60
60
[3]
I
(mA)
Com’l(Max)
Mil
15
15
15
SB
Stand-by Current
25
25
25
2
UV Erasure................................................... 7258 Wsec/cm
Maximum Ratings
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Latch-Up Current..................................................... >200 mA
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Operating Range
Ambient
Supply Voltage to Ground Potential............... –0.5V to +7.0V
Range
Temperature
V
CC
DC Voltage Applied to Outputs
in High Z State ............................................... –0.5V to +5.5V
Commercial
0°C to +70°C
5V ± 10%
5V ± 10%
5V ± 10%
[4]
DC Input Voltage............................................ –3.0V to +7.0V
Transient Input Voltage................................–3.0V for <20 ns
DC Program Voltage....................................................13.0 V
Industrial
−40°C to +85°C
−55°C to +125°C
[5]
Military
Notes:
1. For LCC/PLCC only: Pins 1 and 17 are designated as DU (DON’T USE) and should not be used.
2.
3.
V
CC = Max., IOUT = 0 mA, f=5 MHz.
CC = Max., CE = VIH
V
.
4. Contact a Cypress representative for industrial temperature range specification.
5. TA is the “instant on” case temperature.
2
CY27C512
[6, 7]
DC Electrical Characteristics Over the Operating Range
Parameter
Description
Output HIGH Voltage
Output LOW Voltage
Input HIGH Level
Test Conditions
Min.
Max.
Unit
V
V
V
V
V
V
= Min., I = –400µA
OH
2.4
OH
OL
IH
CC
CC
= Min., I = 2 mA
0.45
V
OL
Guaranteed Input Logical HIGH
Voltage for All Inputs
2.0
V
+0.5
V
CC
V
Input LOW Level
Guaranteed Input Logical LOW
Voltage for All Inputs
0.8
V
IL
I
I
I
Input Leakage Current
Output Leakage Current
Power Supply Current
GND < V < V
CC
–10
–10
+10
+10
50
µA
µA
LI
IN
GND < V
< V , Output Disable
CC
LO
CC
OUT
V
=Max., I
=0 mA,
Com’l
Mil
mA
mA
mA
mA
CC
OUT
f=5 MHz
=Max.,CE = V
IH
60
I
Stand-By Current
V
Com’l
Mil
15
SB
CC
25
Capacitance[8]
Parameter
Description
Input Capacitance
Output Capacitance
Test Conditions
T = 25°C, f = 1 MHz,
Max
Unit
C
C
10
10
pF
pF
IN
A
V
= 5.0V
CC
OUT
Notes:
6. See the last page of this specification for Group A subgroup testing information.
7. See Introduction to CMOS NVMs in this Data Book for general information on testing.
8. This parameter is sampled only and is not 100% tested.
AC Test Loads and Waveforms
For -70, -90, 120, 150, -200 DEVICES ONLY
R1 1867Ω
5 V
2.4V
OUTPUT
2.0V
0.8V
2.0V
TEST POINTS
0.8V
0.40V
R2
C
L
<
20 ns
<
20 ns
1339Ω
CL INCLUDES JIG
AND SCOPE
INPUT
OUTPUT
INPUTS ARE DRIVEN AT 2.4V FOR A
LOGIC 1 AND 0.40V FOR A LOGIC 0.
THEVENIN EQUIVALENT
780 Ω
For -45 and -55 DEVICES ONLY
TEST POINTS
3.0V
OUTPUT
2.088 V
C
1.5V
1.5V
L
GND
<
5 ns
<
5 ns
Notes: CL = 30pF for −45 and −55 devices
CL = 100pF for −70, −90, −120, −150, and −200 devices
INPUT
OUTPUT
C
L = 5pF for tDF
C512–5
C512–6
INPUTS ARE DRIVEN AT 3.0V FOR A
LOGIC 1 AND 0.0V FOR A LOGIC 0.
3
CY27C512
Switching Characteristics Over the Operating Range
−45
−55
−70
−90
−120
−150
−200
Parame-
ter
Description
Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit
t
t
t
Address to
Output Valid
45
20
20
55
20
20
70
25
25
90
30
30
120
150
200
ns
ns
ns
ACC
OE Active to
Output Valid
35
40
60
OE
[9]
OEorCEInactive
to High Z, which-
ever occurs first
30
30
30
DF
t
t
CE Active to
Output Valid
45
55
70
90
120
150
200
ns
ns
CE
OH
Output Data Hold
0
0
0
0
0
0
0
Note:
9. This parameter is sampled only and is not 100% tested.
Switching Waveform
CE
OE
A
− A
15
0
ADDRA
ADDRB
t
DF
t
t
ACC
ACC
t
OE
t
t
OH
DF
t
CE
DATA B
DATA
A
DATA
B
O
− O
7
0
C512–7
needs to be within 1 inch of the lamp during erasure.
Permanent damage may result if the EPROM is exposed to
high-intensity UV light for an extended period of time. 7258
Erasure Characteristics
Wavelengths of light less than 4000 Angstroms begin to erase
the CY27C512 in the windowed package. For this reason, an
opaque label should be placed over the window if the EPROM
is exposed to sunlight or fluorescent lighting for extended
periods of time.
2
Wsec/cm is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as
from a number of third-party software vendors. For detailed
programming information, including a listing of software
packages, please see the PROM Programming Information
located at the end of this section. Programming algorithms can
be obtained from any Cypress representative.
The recommended dose of ultraviolet light for erasure is a
wavelength of 2537 Angstroms for a minimum dose (UV
intensity multiplied by exposure time) of 15 Wsec/cm2. For an
ultraviolet lamp with a 12 mW/cm power rating, the exposure
time would be approximately 15 minutes. The CY27C512
2
4
CY27C512
Table 1. Programming Electrical Characteristics
Parameter
Description
Min.
Max.
Unit
V
V
Programming Power Supply
12.5
13
50
PP
I
Programming Supply Current
Programming Input Voltage HIGH
Programming Input Voltage LOW
mA
V
PP
V
V
V
3.0
–0.5
6.0
V
CC
IHP
ILP
0.4
6.5
V
Programming V
V
CCP
CC
Table 2. Mode Selection
[10]
Pin Function
Mode
CE
OE/V
A
A
Outputs
Dout
PP
0
9
Read
V
V
A
A
IL
IL
0
9
Output Disable
Stand-by(TTL)
Program
X
V
X
X
High Z
High Z
Din
IH
V
X
X
X
IH
V
V
A
A
ILP
ILP
IHP
PP
0
0
9
9
Program Verify
Program Inhibit
V
V
A
A
Dout
ILP
V
V
X
X
High Z
34H
PP
[12]
Signature Read (MFG)
V
V
V
V
V
[11]
IL
IL
IL
IL
IL
HV
HV
[12]
Signature Read (DEV)
V
V
V
[11]
1FH
IH
Note:
10. X can be V or V
IL
IH
11. VHV=12V±0.5V
12.
A1 - A8 and A10 - A15 = VIL
5
CY27C512
[10]
Ordering Information
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY27C512-45JC
CY27C512-45PC
CY27C512-45WC
CY27C512-45ZC
CY27C512-45QMB
CY27C512-45WMB
CY27C512-55JC
CY27C512-55PC
CY27C512-55WC
CY27C512-55ZC
CY27C512-55QMB
CY27C512-55WMB
CY27C512-70JC
CY27C512-70PC
CY27C512-70WC
CY27C512-70ZC
CY27C512-70QMB
CY27C512-70WMB
CY27C512-90JC
CY27C512-90PC
CY27C512-90WC
CY27C512-90ZC
CY27C512-90QMB
CY27C512-90WMB
CY27C512-120JC
CY27C512-120PC
CY27C512-120WC
CY27C512-120ZC
CY27C512-120QMB
CY27C512-120WMB
Package Type
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
45
J65
P15
W16
Z28
Q55
W16
J65
Commercial
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
Military
55
Commercial
P15
W16
Z28
Q55
W16
J65
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
Military
70
Commercial
P15
W16
Z28
Q55
W16
J65
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
Military
90
Commercial
P15
W16
Z28
Q55
W16
J65
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
Military
120
Commercial
P15
W16
Z28
Q55
W16
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
Military
6
CY27C512
[10]
Ordering Information
(continued)
Speed
Package
Name
Operating
Range
(ns)
Ordering Code
CY27C512-150JC
CY27C512-150PC
CY27C512-150WC
CY27C512-150ZC
CY27C512-150QMB
CY27C512-150WMB
CY27C512-200JC
CY27C512-200PC
CY27C512-200WC
CY27C512-200ZC
CY27C512-200QMB
CY27C512-200WMB
Package Type
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
150
J65
P15
W16
Z28
Q55
W16
J65
Commercial
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
32-Lead Plastic Leaded Chip Carrier
28-Lead (600-Mil) Molded DIP
Military
200
Commercial
P15
W16
Z28
Q55
W16
28-Lead (600-Mil) Windowed CerDIP
28-Lead Thin Small Outline Package
32-Pin Windowed Rectangular Leadless Chip Carrier
28-Lead (600-Mil) Windowed CerDIP
Military
Notes:
13. Contact a Cypress sales representative for industrial temperature offerings.
MILITARY SPECIFICATIONS
Group A Subgroup Testing
DC Characteristics
Parameter
Subgroups
1, 2, 3
V
OH
V
1, 2, 3
OL
V
1, 2, 3
IH
V
1, 2, 3
IL
I
1, 2, 3
LI
I
1, 2, 3
LO
I
1, 2, 3
CC
I
1, 2, 3
SB
Switching Characteristics
Parameter
Subgroups
7, 8, 9, 10, 11
7, 8, 9, 10, 11
7, 8, 9, 10, 11
t
ACC
t
OE
t
CE
Document #: 38-00428-A
7
CY27C512
Package Diagrams
32–Pin Windowed Rectangular Leadless Chip Carrier Q55
MIL-STD-1835 C-12
32–Lead Plastic Leaded Chip Carrier J65
28–Lead (600–Mil) Molded DIP P15
8
CY27C512
Package Diagrams (continued)
W16
28-Lead (600-Mil) WindowedCerDIP
MIL-STD-1835
D- 10Config.A
28-Lead Thin Small Outline Package Z28
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of anycircuitry other than circuitry embodied in a CypressSemiconductor product. Nor does it conveyor imply any license under patent or other rights. CypressSemiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
相关型号：
CY27C512-200WC
UVPROM, 64KX8, 200ns, CMOS, CDIP28, 0.600 INCH, WINDOWED, HERMETIC SEALED, CERDIP-28
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