CY74FCT162373ETPVC [CYPRESS]

Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.025 INCH PITCH, SSOP-48;
CY74FCT162373ETPVC
型号: CY74FCT162373ETPVC
厂家: CYPRESS    CYPRESS
描述:

Bus Driver, FCT Series, 2-Func, 8-Bit, True Output, CMOS, PDSO48, 0.300 INCH, 0.025 INCH PITCH, SSOP-48

驱动 光电二极管 逻辑集成电路
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2373T  
fax id: 7017  
CY74FCT16373T  
CY74FCT162373T  
16-Bit Latch  
CY74FCT162373T Features:  
Features  
• Balanced 24 mA output drivers  
• Reduced system switching noise  
• Low power, pin-compatible replacement for ABT  
functions  
• FCT-E speed at 3.4 ns  
• Typical V  
T = 25°C  
(ground bounce) <0.6V at V = 5V,  
CC  
OLP  
A
• Power-off disable outputs permits live insertion  
Functional Description  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
CY74FCT16373T and CY74FCT162373T are 16-bit D-type  
latches designed for use in bus applications requiring high  
speed and low power. These devices can be used as two  
independent 8-bit latches or as a single 16-bit latch by con-  
necting the Output Enable (OE) and Latch (LE) inputs.  
Flow-through pinout and small shrink packaging aid in  
simplifying board layout. The output buffers are designed with  
power-off disable feature that allows live insertion of boards.  
• Typical output skew < 250 ps  
• ESD > 2000V  
• TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
• Industrial temperature range of 40°C to +85°C  
• V = 5V 10%  
±
CC  
CY74FCT16373T Features:  
The CY74FCT16373T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
• 64 mA sink current, 32 mA source current  
• Typical V  
(ground bounce) <1.0V at V = 5V,  
CC  
OLP  
The CY74FCT162373T has 24-mA balanced output drivers  
with current limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for mini-  
mal undershoot and reduced ground bounce. The  
CY74FCT162373T is ideal for driving transmission lines.  
T = 25°C  
A
Pin Configuration  
Logic Block Diagrams  
SSOP/TSSOP  
Top View  
OE  
1
1
2
3
4
5
6
48  
47  
46  
45  
44  
43  
OE  
O
LE  
1
1
1
LE  
1
D
1
1
1
2
O
D
2
1
1
D
C
D
1
1
GND  
O
GND  
D
O
1
1
1
1
3
4
1
1
3
4
O
D
V
V
CC  
CC  
42  
41  
7
O
D
1
1
5
6
1
1
5
6
8
O
D
9
40  
39  
38  
TO 7 OTHERCHANNELS  
GND  
GND  
10  
O
O
O
O
D
D
D
D
1
1
7
8
1
1
7
8
11  
12  
13  
FCT162373-1  
37  
36  
35  
34  
OE  
LE  
2
2
2
1
2
2
2
1
2
14  
15  
GND  
GND  
2
16  
17  
18  
33  
32  
31  
O
O
D
2
3
4
2
2
3
4
D
C
D
2
1
D
2
O
1
2
V
CC  
V
CC  
O
5
D
5
19  
20  
21  
22  
23  
24  
30  
29  
28  
27  
26  
25  
2
2
2
2
O
6
D
6
GND  
O
GND  
D
2
2
7
8
2
7
8
TO 7 OTHERCHANNELS  
O
D
2
2
OE  
LE  
2
FCT162373-2  
FCT162373-3  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
August 1994 – Revised October 30, 1997  
CY74FCT16373T  
CY74FCT162373T  
Maximum Ratings[2, 3]  
Pin Description  
Name  
Description  
(Above which the useful life may be impaired. For user  
guidelines, not tested.)  
D
Data Inputs  
Storage Temperature.......................Com’l 55°C to +125°C  
LE  
OE  
O
Latch Enable Inputs (Active HIGH)  
Output Enable Inputs (Active LOW)  
Three-State Outputs  
Ambient Temperature with  
Power Applied..................................Com’l 55°C to +125°C  
DC Input Voltage .................................................0.5V to +7.0V  
DC Output Voltage..............................................0.5V to +7.0V  
Function Table[1]  
DC Output Current  
(Maximum Sink Current/Pin)........................... −60 to +120 mA  
Inputs  
Outputs  
Power Dissipation.......................................................... 1.0W  
D
H
L
LE  
H
H
L
OE  
L
O
H
L
Static Discharge Voltage ........................................... >2001V  
(per MIL-STD-883, Method 3015)  
L
Operating Range  
X
X
L
Q
0
X
H
Z
Ambient  
Range  
Industrial  
Temperature  
V
CC  
40°C to +85°C  
5V ± 10%  
Electrical Characteristics Over the Operating Range  
[4]  
Parameter  
Description  
Input HIGH Voltage  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
V
V
V
2.0  
V
V
IH  
IL  
H
Input LOW Voltage  
0.8  
[5]  
Input Hysteresis  
100  
mV  
V
Input Clamp Diode Voltage  
Input HIGH Current  
V
V
V
V
=Min., I =18 mA  
0.7  
1.2  
±1  
IK  
CC  
CC  
CC  
CC  
IN  
I
I
I
=Max., V =V  
CC  
µA  
µA  
µA  
IH  
I
Input LOW Current  
=Max., V =GND  
±1  
IL  
I
High Impedance Output Current  
(Three-State Output pins)  
=Max., V  
=Max., V  
=2.7V  
=0.5V  
=GND  
±1  
OZH  
OUT  
I
High Impedance Output Current  
(Three-State Output pins)  
V
±1  
µA  
OZL  
CC  
OUT  
[6]  
I
I
I
Short Circuit Current  
V
V
V
=Max., V  
=Max., V  
80  
50  
140  
200  
180  
±1  
mA  
mA  
µA  
OS  
O
CC  
CC  
CC  
OUT  
OUT  
[6]  
Output Drive Current  
=2.5V  
[7]  
Power-Off Disable  
=0V, V  
4.5V  
OFF  
OUT  
Output Drive Characteristics for CY74FCT16373T  
[4]  
Parameter  
Description  
Test Conditions  
=Min., I =3 mA  
Min.  
2.5  
Typ.  
3.5  
3.5  
3.0  
0.2  
Max.  
Unit  
V
V
Output HIGH Voltage  
V
V
V
V
OH  
CC  
CC  
CC  
CC  
OH  
=Min., I =15 mA  
2.4  
V
OH  
=Min., I =32 mA  
2.0  
V
OH  
V
Output LOW Voltage  
=Min., I =64 mA  
0.55  
V
OL  
OL  
Notes:  
1. H = HIGH Voltage Level. L = LOW Voltage Level. X = Don’t Care. Z = High Impedance. Q0=Previous state of flip-flop.  
2. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature  
range.  
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.  
4. Typical values are at VCC=5.0V, TA= +25°C ambient.  
5. This parameter is guaranteed but not tested.  
6. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample  
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of  
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter  
tests, IOS tests should be performed last.  
7. Tested at +25°C.  
2
CY74FCT16373T  
CY74FCT162373T  
Output Drive Characteristics for CY74FCT162373T  
[4]  
Parameter  
Description  
Test Conditions  
Min.  
60  
Typ.  
115  
115  
3.3  
Max.  
150  
Unit  
mA  
mA  
V
[6]  
I
Output LOW Current  
Output HIGH Current  
Output HIGH Voltage  
Output LOW Voltage  
V
V
V
V
=5V, V =V or V , V  
=1.5V  
=1.5V  
ODL  
ODH  
CC  
CC  
CC  
CC  
IN  
IH  
IL  
OUT  
[6]  
I
=5V, V =V or V , V  
60  
2.4  
150  
IN  
IH  
IL  
OUT  
V
=Min., I =24 mA  
OH  
OH  
OL  
V
=Min., I =24 mA  
0.3  
0.55  
V
OL  
Capacitance[5] (T = +25°C, f = 1.0 MHz)  
A
[4]  
Parameter  
Description  
Input Capacitance  
Output Capacitance  
Test Conditions  
Typ.  
Max.  
6.0  
Unit  
pF  
C
C
V
= 0V  
IN  
4.5  
5.5  
IN  
V
= 0V  
8.0  
pF  
OUT  
OUT  
Power Supply Characteristics  
[4]  
Parameter  
Description  
Test Conditions  
V 0.2V,  
Typ.  
Max.  
Unit  
I
Quiescent Power Supply Current  
V
V
V
=Max.  
5
500  
µA  
CC  
CC  
CC  
CC  
IN  
V V 0.2V  
IN  
CC  
[8]  
I  
QuiescentPowerSupplyCurrent  
(TTL inputs HIGH)  
=Max.  
V =3.4V  
0.5  
60  
1.5  
mA  
CC  
IN  
I
I
Dynamic Power Supply  
=Max., One Input  
V =V or  
100  
µA/MHz  
CCD  
IN  
CC  
[9]  
Current  
Toggling, 50% Duty Cycle,  
Outputs Open, OE=GND  
V =GND  
IN  
[10]  
Total Power Supply Current  
V
=Max., f =10 MHz,  
V =V or  
0.6  
0.9  
2.4  
6.4  
1.5  
2.3  
mA  
mA  
mA  
mA  
C
CC  
1
IN  
CC  
50% Duty Cycle, Outputs  
Open, One Bit Toggling,  
V =GND  
IN  
V =3.4V or  
IN  
OE=GND, LE=V  
CC  
V =GND  
IN  
[11]  
V
=Max., f =2.5 MHz,  
50% Duty Cycle, Outputs  
V =V or  
4.5  
CC  
1
IN  
CC  
V =GND  
IN  
Open, Sixteen Bits Toggling,  
[11]  
V =3.4V or  
16.5  
IN  
OE=GND, LE=V  
CC  
V =GND  
IN  
Notes:  
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.  
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.  
10. IC= IQUIESCENT + IINPUTS + IDYNAMIC  
IC  
=
=
=
=
=
=
=
=
=
ICC+ICCDHNT+ICCD(f0/2 + f1N1)  
ICC  
ICC  
DH  
NT  
ICCD  
f0  
Quiescent Current with CMOS input levels  
Power Supply Current for a TTL HIGH input(VIN=3.4V)  
Duty Cycle for TTL inputs HIGH  
Number of TTL inputs at DH  
Dynamic Current caused by an input transition pair (HLH or LHL)  
Clock frequency for registered devices, otherwise zero  
Input signal frequency  
f1  
N1  
Number of inputs changing at f1  
All currents are in milliamps and all frequencies are in megahertz.  
11. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested.  
3
CY74FCT16373T  
CY74FCT162373T  
[12]  
Switching Characteristics Over the Operating Range  
CY74FCT16373T  
CY74FCT162373T  
CY74FCT16373AT  
CY74FCT162373AT  
[13]  
Parameter  
Description  
Min.  
Max.  
Min.  
Max.  
Unit  
Fig. No.  
t
t
Propagation Delay D to O  
1.5  
8.0  
1.5  
5.2  
ns  
1, 3  
PLH  
PHL  
t
t
Propagation Delay  
LE to O  
2.0  
1.5  
1.5  
13.0  
12.0  
7.5  
2.0  
1.5  
1.5  
6.7  
6.1  
5.5  
ns  
ns  
ns  
1, 5  
PLH  
PHL  
t
t
Output Enable Time  
1, 7, 8  
1, 7, 8  
PZH  
PZL  
t
t
Output Disable Time  
PHZ  
PLZ  
t
t
Set-Up Time HIGH or LOW, D to LE  
2.0  
1.5  
2.0  
1.5  
ns  
ns  
9
9
SU  
H
Hold Time HIGH or LOW,  
D to LE  
t
t
LE Pulse Width HIGH  
6.0  
3.3  
ns  
ns  
5
W
[14]  
Output Skew  
0.5  
0.5  
SK(O)  
CY74FCT16373CT  
CY74FCT16373ET  
CY74FCT162373CT CY74FCT162373ET  
[13]  
Parameter  
Description  
Min.  
Max.  
Min.  
Max.  
Unit  
Fig. No.  
t
t
Propagation Delay  
D to O  
1.5  
4.2  
1.5  
3.4  
ns  
1, 3  
PLH  
PHL  
t
t
Propagation Delay  
LE to O  
2.0  
1.5  
1.5  
5.5  
5.5  
5.0  
2.0  
1.5  
1.5  
3.7  
4.4  
3.6  
ns  
ns  
ns  
1, 5  
PLH  
PHL  
t
t
Output Enable Time  
1, 7, 8  
1, 7, 8  
PZH  
PZL  
t
t
Output Disable Time  
PHZ  
PLZ  
t
t
Set-Up Time HIGH or LOW, D to LE  
2.0  
1.5  
1.0  
1.0  
ns  
ns  
9
9
SU  
H
Hold Time HIGH or LOW,  
D to LE  
t
t
LE Pulse Width HIGH  
3.3  
3.0  
ns  
ns  
5
W
[14]  
Output Skew  
0.5  
0.5  
SK(O)  
Notes:  
12. Minimum limits are guaranteed but not tested on Propagation Delays.  
13. See “Parameter Measurement Information” in the General Information section.  
14. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.  
4
CY74FCT16373T  
CY74FCT162373T  
Ordering Information CY74FCT16373  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
CY74FCT16373ETPAC  
CY74FCT16373ETPVC  
CY74FCT16373CTPAC  
CY74FCT16373CTPVC  
CY74FCT16373ATPAC  
CY74FCT16373ATPVC  
CY74FCT16373TPAC  
CY74FCT16373TPVC  
Package Type  
48-Lead (240-Mil) TSSOP  
3.4  
Z48  
O48  
Z48  
O48  
Z48  
O48  
Z48  
O48  
Industrial  
Industrial  
Industrial  
Industrial  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
4.2  
5.2  
8.0  
Ordering Information CY74FCT162373  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
CY74FCT162373ETPAC  
CY74FCT162373ETPVC  
CY74FCT162373CTPAC  
CY74FCT162373CTPVC  
CY74FCT162373ATPAC  
CY74FCT162373ATPVC  
CY74FCT162373TPAC  
CY74FCT162373TPVC  
Package Type  
3.4  
Z48  
O48  
Z48  
O48  
Z48  
O48  
Z48  
O48  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
48-Lead (240-Mil) TSSOP  
48-Lead (300-Mil) SSOP  
Industrial  
Industrial  
Industrial  
Industrial  
4.2  
5.2  
8.0  
Document #: 38-00386-C  
5
CY74FCT16373T  
CY74FCT162373T  
Package Diagrams  
48-Lead Shrunk Small Outline Package O48  
48-Lead Thin Shrunk Small Outline Package Z48  
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize  
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.  

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