CY7C1020CV26-15ZSXE [CYPRESS]
512Kb (32K x 16) Static RAM; 512KB （ 32K ×16 ）静态RAM
| 型号： | CY7C1020CV26-15ZSXE |
| 厂家： | 
CYPRESS |
| 描述： | 512Kb (32K x 16) Static RAM |
| 文件： | 总8页 (文件大小：147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CY7C1020CV26
512Kb (32K x 16) Static RAM
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is
written into the location specified on the address pins (A0
through A14). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O9 through I/O16) is written into the location
specified on the address pins (A0 through A14).
Features
• Temperature Range
— Automotive: –40°C to 125°C
• High speed
— tAA = 15 ns
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is
LOW, then data from memory will appear on I/O9 to I/O16. See
the truth table at the back of this data sheet for a complete
description of read and write modes.
• Optimized voltage range: 2.5V–2.7V
• Automatic power-down when deselected
• Independent control of upper and lower bits
• CMOS for optimum speed/power
• Package offered: 44-pin TSOP II
Functional Description
The input/output pins (I/O1 through I/O16) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1020CV26 is a high-performance CMOS static
RAM organized as 32,768 words by 16 bits. This device has
an automatic power-down feature that significantly reduces
power consumption when deselected.
The CY7C1020CV26 is available in standard 44-pin TSOP
Type II.
Logic Block Diagram
Pin Configuration
TSOP II
DATA IN DRIVERS
Top View
44
1
NC
A
5
43
42
41
40
39
38
A
A
2
3
4
5
6
3
6
A
A
2
7
A7
A6
A5
A4
A3
A2
OE
A
1
BHE
BLE
I/O
I/O
I/O
A
0
32K x 16
CE
I/O1–I/O8
RAM Array
I/O
7
1
16
37
36
35
34
33
I/O
I/O
8
2
3
15
14
13
I/O9–I/O16
9
A1
A0
10
11
12
13
I/O
V
SS
I/O
4
CC
V
SS
V
V
CC
32
I/O
I/O
I/O
5
6
7
8
12
11
31
30
29
28
27
I/O
I/O
I/O
14
15
16
I/O
I/O
10
9
COLUMN DECODER
WE 17
NC
18
A
A
4
14
13
8
BHE
19
26
25
A
A
A
9
WE
CE
OE
20
21
22
A
11
10
A
A
12
24
23
NC
NC
BLE
Selection Guide
CY7C1020CV26-15
Unit
ns
Maximum Access Time
15
100
5
Maximum Operating Current
Maximum CMOS Standby Current
mA
mA
Cypress Semiconductor Corporation
Document #: 38-05406 Rev. *A
•
3901 North First Street
•
San Jose, CA 95134
•
408-943-2600
Revised April 18, 2005
CY7C1020CV26
DC Input Voltage[1] .................................. –0.5V to VCC+0.5V
Current into Outputs (LOW)......................................... 20 mA
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Static Discharge Voltage...........................................> 2001V
(per MIL-STD-883, Method 3015)
Storage Temperature .................................–65°C to +150°C
Latch-up Current.....................................................> 200 mA
Ambient Temperature with
Power Applied.............................................–55°C to +125°C
Supply Voltage on VCC to Relative GND[1] .... –0.5V to +4.6V
Operating Range
Ambient
DC Voltage Applied to Outputs
Range
Temperature
VCC
in High-Z State[1] ......................................–0.5V to VCC+0.5V
Automotive
–40°C to +125°C
2.5V to 2.7V
Electrical Characteristics Over the Operating Range
CY7C1020CV26
Parameter
VOH
Description
Test Conditions
Min.
Max.
Unit
Output HIGH Voltage
VCC = Min.,
IOH = –1.0 mA
2.3
V
VOL
Output LOW Voltage
VCC = Min.,
IOL = 1.0 mA
0.4
V
VIH
VIL
IIX
Input HIGH Voltage
Input LOW Voltage[1]
2.0
–0.3
–5
VCC + 0.3
0.8
V
V
Input Load Current
GND < VI < VCC
+5
µA
µA
mA
mA
IOZ
Output Leakage Current
Output Short Circuit Current
VCC Operating Supply Current
GND < VI < VCC, Output Disabled
VCC = Max., VOUT = GND
–5
+5
[2]
IOS
ICC
–300
100
VCC = Max., IOUT = 0 mA,
f = fMAX = 1/tRC
ISB1
ISB2
Automatic CE Power-Down
Current —TTL Inputs
Max. VCC, CE > VIH
VIN > VIH or VIN < VIL, f = fMAX
40
5
mA
mA
Automatic CE Power-down
Current —CMOS Inputs
Max. VCC
CE > VCC – 0.3V, VIN > VCC – 0.3V, or
IN < 0.3V, f = 0
,
V
Capacitance[3]
Parameter
CIN
Description
Input Capacitance
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz,
Max.
Unit
8
8
pF
pF
VCC = 2.6V
COUT
Notes:
1. V (min.) = –2.0V for pulse durations of less than 20 ns.
IL
2. Not more than one output should be shorted at one time. Duration of the short circuit should not exceed 30 seconds.
3. Tested initially and after any design or process changes that may affect these parameters.
Document #: 38-05406 Rev. *A
Page 2 of 8
CY7C1020CV26
AC Test Loads and Waveforms[4]
ALL INPUT PULSES
Ω
R 1830
2.5V
2.6V
90%
10%
90%
10%
OUTPUT
GND
R2
30 pF
1976Ω
Fall Time:1 V/ns
Rise Time: 1 V/ns
(a)
(b)
AC Switching Characteristics Over the Operating Range
CY7C1020CV26
Min. Max.
Parameter
Description
Unit
READ CYCLE
tRC
Read Cycle Time
15
3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
Address to Data Valid
15
tOHA
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z[5]
OE HIGH to High Z[5, 6]
CE LOW to Low Z[5]
CE HIGH to High Z[5, 6]
CE LOW to Power-up
CE HIGH to Power-down
Byte Enable to Data Valid
Byte Enable to Low Z
Byte Disable to High Z
tACE
15
7
tDOE
tLZOE
tHZOE
tLZCE
tHZCE
0
3
0
7
7
[7]
tPU
[7]
tPD
15
7
tDBE
tLZBE
0
tHZBE
7
WRITE CYCLE[8]
tWC
tSCE
tAW
Write Cycle Time
15
10
10
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
tHA
tSA
0
tPWE
tSD
10
8
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z[5]
tHD
0
tLZWE
tHZWE
3
WE LOW to High Z[5, 6]
4
tBW
Byte Enable to End of Write
10
Notes:
4. Test conditions assume signal transition time of 1V/ns or less, timing reference levels of 1.3V, input pulse levels of 0 to 2.5V and transmission line loads as in
(a) of AC Test Loads.
5. At any given temperature and voltage condition, t
is less than t
, t
is less than t
, and t
is less than t
for any given device.
HZCE
LZCE HZOE
LZOE
HZWE
LZWE
6. t
, t
, t
, and t
are specified with a load capacitance of 5 pF as in (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
HZOE HZBE HZCE
HZWE
7. This parameter is guaranteed by design and is not tested.
8. The internal write time of the memory is defined by the overlap of CE LOW, WE LOW and BHE / BLE LOW. CE, WE and BHE / BLE must be LOW to initiate a
write, and the transition of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal
that terminates the write.
Document #: 38-05406 Rev. *A
Page 3 of 8
CY7C1020CV26
Switching Waveforms
Read Cycle No. 1[9, 10]
t
RC
ADDRESS
t
AA
t
OHA
DATA OUT
PREVIOUS DATA VALID
DATA VALID
Read Cycle No. 2 (OE Controlled)[10, 11]
ADDRESS
CE
t
RC
t
ACE
OE
t
HZOE
t
DOE
BHE, BLE
t
LZOE
t
HZCE
t
DBE
t
LZBE
t
HZBE
HIGH
IMPEDANCE
HIGH IMPEDANCE
DATA OUT
VCC
SUPPLY
CURRENT
DATA VALID
t
LZCE
t
PD
I
CC
t
PU
50%
50%
I
SB
Notes:
9. Device is continuously selected. OE, CE, BHE and/or BHE = V .
IL
10. WE is HIGH for read cycle.
11. Address valid prior to or coincident with CE transition LOW.
Document #: 38-05406 Rev. *A
Page 4 of 8
CY7C1020CV26
Switching Waveforms
Write Cycle No. 1 (CE Controlled)[12, 13]
t
WC
ADDRESS
t
SA
t
SCE
CE
t
AW
t
HA
t
PWE
WE
t
BW
BHE, BLE
t
t
SD
HD
DATA I/O
Write Cycle No. 2 (BLE or BHE Controlled)
t
WC
ADDRESS
t
SA
t
BW
BHE, BLE
t
AW
t
HA
t
PWE
WE
CE
t
SCE
t
t
SD
HD
DATA I/O
Notes:
12. Data I/O is high impedance if OE or BHE and BLE = V
.
IH
13. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
Document #: 38-05406 Rev. *A
Page 5 of 8
CY7C1020CV26
Switching Waveforms
Write Cycle No. 3 (WE Controlled, OE LOW)
t
WC
ADDRESS
CE
t
SCE
t
AW
t
HA
t
SA
t
PWE
WE
t
BW
BHE, BLE
t
HZWE
t
t
SD
HD
DATA I/O
t
LZWE
Truth Table
CE
H
OE WE
BLE
X
BHE
X
I/O1–I/O8
I/O9–I/O16
High Z
Mode
Power
X
L
X
H
High Z
Power-down
Standby (ISB
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
Active (ICC
)
L
L
L
Data Out
Data Out
High Z
Data Out
High Z
Read – All bits
)
L
H
L
Read – Lower bits only
Read – Upper bits only
Write – All bits
)
H
L
Data Out
Data In
High Z
)
L
X
L
L
Data In
Data In
High Z
)
L
H
L
Write – Lower bits only
Write – Upper bits only
Selected, Outputs Disabled
Selected, Outputs Disabled
)
H
X
Data In
High Z
)
L
L
H
X
H
X
X
High Z
)
H
H
High Z
High Z
)
Ordering Information
Speed
(ns)
Package
Name
Operating
Range
Ordering Code
Package Type
15
CY7C1020CV26-15ZSXE
Z44
44-Lead TSOP Type II (Pb-Free)
Automotive
Document #: 38-05406 Rev. *A
Page 6 of 8
CY7C1020CV26
Package Diagrams
44-Pin TSOP II Z44
51-85087-*A
All product and company names mentioned in this document are the trademarks of their respective holders.
Document #: 38-05406 Rev. *A
Page 7 of 8
© Cypress Semiconductor Corporation, 2005. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be
used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its
products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
CY7C1020CV26
Document History Page
Document Title: CY7C1020CV26 512Kb (32K x 16) Static RAM
Document Number: 38-05406
Orig. of
REV.
ECN NO. Issue Date Change
Description of Change
**
128060
07/30/03
EJH
SYT
Customized data sheet to meet special requirements for CG5988AF
Automotive temperature range: –40°C / +125°C
*A
352999
See ECN
Removed ‘CG5988AF’ from the Datasheet
Edited the features section for better structure on Page 1
Edited the title to include the mention of ‘512Kb’
Document #: 38-05406 Rev. *A
Page 8 of 8
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