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CY7C11481KV18-400BZC [CYPRESS]

18-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); 18兆位的DDR II + SRAM 2字突发架构（ 2.0周期读延迟）

CY7C11481KV18-400BZC


元器件型号：	CY7C11481KV18-400BZC
生产厂家：	CYPRESS SEMICONDUCTOR
描述和应用：	18-Mbit DDR II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency) 18兆位的DDR II + SRAM 2字突发架构（ 2.0周期读延迟）内存集成电路静态存储器双倍数据速率
PDF文件：	总29页 (文件大小：850K)
下载文档：	下载PDF数据表文档文件
型号参数：CY7C11481KV18-400BZC参数

CY7C1148KV18

18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

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19 CYPRESS

CY7C1148KV18-400BZC

18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

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16 CYPRESS

CY7C1148KV18-400BZC

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, FBGA-165

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0 CYPRESS

CY7C1148KV18-400BZXC

18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

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24 CYPRESS

CY7C1148KV18-400BZXC

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, FBGA-165

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0 CYPRESS

CY7C1148KV18-450BZXC

18-Mbit DDR II+ SRAM Two-Word Burst Architecture (2.5 Cycle Read Latency)

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23 CYPRESS

CY7C1148V18

18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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20 CYPRESS

CY7C1148V18

18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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14 CYPRESS

CY7C1148V18-300BZC

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165

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0 CYPRESS

CY7C1148V18-300BZXC

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165

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0 CYPRESS

CY7C1148V18-300BZXI

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, LEAD FREE, MO-216, FBGA-165

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0 CYPRESS

CY7C1148V18-333BZC

18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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12 CYPRESS

CY7C1148V18-333BZC

18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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7 CYPRESS

CY7C1148V18-333BZC

DDR SRAM, 1MX18, 0.45ns, CMOS, PBGA165, 13 X 15 MM, 1.40 MM HEIGHT, MO-216, FBGA-165

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0 CYPRESS

CY7C1148V18-333BZI

18-Mbit DDR-II+ SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency)

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13 CYPRESS

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