CY7C271 [CYPRESS]

32K x 8 Power Switched and Reprogrammable PROM; 32K ×8电源开关和可重复编程的PROM
CY7C271
型号: CY7C271
厂家: CYPRESS    CYPRESS
描述:

32K x 8 Power Switched and Reprogrammable PROM
32K ×8电源开关和可重复编程的PROM

开关 电源开关 可编程只读存储器
文件: 总11页 (文件大小:240K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
1CY7C274  
CY7C271  
CY7C274  
32K x 8 Power Switched and  
Reprogrammable PROM  
low-power stand-by mode. The CY7C271 is packaged in the  
300-mil slim package. The CY7C274 is packaged in the  
industry standard 600-mil package. Both the CY7C271 and  
CY7C274 are available in a cerDIP package equipped with an  
erasure window to provide for reprogrammability. When  
exposed to UV light, the PROM is erased and can be repro-  
grammed. The memory cells utilize proven EPROM floating  
gate technology and byte-wide intelligent programming  
algorithms.  
Features  
• CMOS for optimum speed/power  
• Windowed for reprogrammability  
• High speed  
— 30 ns (Commercial)  
— 35 ns (Military)  
• Low power  
The CY7C271 and CY7C274 offer the advantage of lower  
power, superior performance, and programming yield. The  
EPROM cell requires only 12.5V for the super voltage, and low  
current requirements allow for gang programming. The  
EPROM cells allow each memory location to be tested 100%  
because each location is written into, erased, and repeatedly  
exercised prior to encapsulation. Each PROM is also tested  
for AC performance to guarantee that after customer  
programming, the product will meet DC and AC specification  
limits.  
— 660 mW (commercial)  
— 715 mW (military)  
• Super low standby power  
— Less than 165 mW when deselected  
• EPROM technology 100% programmable  
• Slim 300-mil package (7C271)  
• Direct replacement for bipolar PROMs  
• Capable of withstanding >2001V static discharge  
Reading the 7C271 is accomplished by placing active LOW  
signals on CS1 and CE, and an active HIGH on CS2. Reading the  
7C274 is accomplished by placing active LOW signals on OE and  
CE. The contents of the memory location addressed by the address  
lines (A0A14) will become available on the output lines (O0O7).  
Functional Description  
The CY7C271 and CY7C274 are high-performance  
32,768-word by 8-bit CMOS PROMs. When disabled (CE  
HIGH), the 7C271/7C274 automatically powers down into a  
Pin Configurations  
Logic Block Diagram  
DIP/Flatpack  
DIP/Flatpack  
V
V
CC  
1
28  
1
28  
A
V
PP  
CC  
O
O
O
9
7
6
5
A
14  
A
10  
A
11  
A
12  
A
13  
A
14  
A
A
A
A
A
2
27  
26  
2
27  
26  
A
8
A
12  
14  
13  
8
A
A
13  
3
3
A
7
A
7
12  
X ADDRESS  
A
4
A
6
4
25  
24  
23  
22  
21  
25  
24  
23  
22  
21  
6
256 x 1024  
8 x 1 OF 128  
MULTIPLEXER  
A
11  
A
10  
A
5
5
A
5
5
9
PROGRAMABLE  
ARRAY  
7C274  
7C271  
A
4
6
A
4
6
11  
A
A
3
CS  
OE  
7
7
3
1
A
9
A
A
2
A
10  
8
8
CS  
2
2
A
8
A
1
A
1
CE  
9
9
20  
19  
18  
17  
16  
20  
19  
18  
17  
16  
CE  
A
7
A
0
A
0
10  
11  
12  
13  
10  
11  
12  
13  
O
O
O
O
7
7
O
4
O
3
A
O
O
O
O
6
0
6
0
6
O
O
O
O
5
O
4
O
3
1
1
5
4
3
A
5
O
2
O
2
A
4
14  
14  
GND  
GND  
15  
15  
A
3
Y ADDRESS  
A
2
LCC/PLCC (Opaque Only) LCC/PLCC (Opaque Only)  
O
O
2
A
1
4
4
3
A
0
3
2
3231 30  
2
323130  
1
1
A
A
A
NC  
CS  
CS  
CE  
A
8
12  
13  
14  
29  
29  
A
A
A
A
6
6
5
5
6
7
8
5
6
7
8
1
A
A
9
28  
27  
26  
25  
24  
23  
22  
21  
28  
27  
26  
25  
24  
23  
22  
21  
5
POWER-DOWN  
7C271  
7C274  
A
11  
A
4
4
NC  
OE  
A
A
3
3
A
A
2
1
2
2
9
9
O
0
A
10  
A
A
1
1
10  
11  
12  
13  
10  
11  
12  
13  
A
A
CE  
0
0
CE  
(7C271) CS  
O
O
6
O
7
NC  
O
NC  
7
1
O
6
O
0
0
(7C271) CS  
2
14151617 181920  
14151617 181920  
(7C274) OE  
Cypress Semiconductor Corporation  
Document #: 38-04008 Rev. *B  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Revised December 27, 2002  
CY7C271  
CY7C274  
Selection Guide  
7C271-35  
7C274-35  
7C271-45  
7C274-45  
7C274-30  
30  
7C271-55  
55  
Unit  
ns  
Maximum Access Time  
35  
120  
130  
30  
45  
120  
130  
30  
Maximum Operating Com’l  
120  
120  
mA  
mA  
mA  
mA  
Current  
Military  
130  
Standby Current  
Com’l  
30  
30  
Military  
40  
40  
40  
Maximum Ratings[1]  
DC Program Voltage .................................................... 13.0V  
Static Discharge Voltage............................................ >2001V  
(per MIL-STD-883, Method 3015)  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Latch-Up Current..................................................... >200 mA  
UV Exposure ................................................ 7258 Wsec/cm2  
Storage Temperature ..................................... −65°C to +150°C  
Ambient Temperature with  
Power Applied..................................................55°C to +125°C  
Operating Range  
Supply Voltage to Ground Potential .................−0.5V to +7.0V  
Ambient  
DC Voltage Applied to Outputs  
in High Z State .....................................................−0.5V to +7.0V  
Range  
Commercial  
Military[2]  
Temperature  
VCC  
0°C to +70°C  
5V ±10%  
5V ±10%  
DC Input Voltage .................................................−3.0V to +7.0V  
Electrical Characteristics Over the Operating Range[3]  
55°C to +125°C  
7C271- 35, 45, 55  
7C274-30, 35, 45,  
Parameter  
VOH  
Description  
Output HIGH Voltage  
Output LOW Voltage  
Input HIGH Level  
Test Conditions  
Min.  
Max.  
Unit  
V
VCC = Min., IOH = 2.0 mA  
VCC = Min., IOL = 8.0 mA[4]  
2.4  
VOL  
0.4  
V
VIH  
GuaranteedInputLogicalHIGH Voltagefor All  
Inputs  
2.0  
VCC  
V
VIL  
Input LOW Level  
Guaranteed Input Logical LOW Voltage for All  
Inputs  
0.8  
V
IIX  
Input Current  
GND < VIN < VCC  
10  
40  
20  
+10  
+40  
90  
120  
130  
30  
µA  
µA  
IOZ  
IOS  
ICC  
Output Leakage Current  
Output Short Circuit Current[5] VCC = Max., VOUT = GND  
GND < VOUT < VCC, Output Disabled  
mA  
mA  
Power Supply Current  
VCC = Max., VIN = 2.0V,  
IOUT = 0 mA, CE=VIL  
Commercial  
Military  
ISB  
Standby Supply Current  
VCC = Max., CE = VIH,  
IOUT = 0 mA  
Commercial  
Military  
mA  
40  
VPP  
IPP  
Programming Supply Voltage  
Programming Supply Current  
12  
13  
V
mA  
V
50  
VIHP  
Input HIGH Programming  
Voltage  
3.0  
VILP  
Input LOW Programming  
Voltage  
0.4  
V
Notes:  
1. The voltage on any input or I/O pin cannot exceed the power pin during power-up.  
2. TA is the “instant on” case temperature.  
3. See the last page of this specification for Group A subgroup testing information.  
4. 6.0 mA military  
5. For test purposes, not more than one output at a time should be shorted. Short circuit test duration should not exceed 30 seconds.  
Document #: 38-04008 Rev. *B  
Page 2 of 11  
CY7C271  
CY7C274  
Capacitance[6]  
Parameter  
CIN  
Description  
Input Capacitance  
Output Capacitance  
Test Conditions  
Max.  
10  
Unit  
pF  
TA = 25°C, f = 1 MHz,  
VCC = 5.0V  
COUT  
10  
pF  
AC Test Loads and Waveforms[6]  
R1 500  
658MIL  
R1 500Ω  
658MIL  
5V  
5V  
ALL INPUT PULSES  
3.0V  
GND  
OUTPUT  
90%  
10%  
OUTPUT  
90%  
10%  
R2 333Ω  
(403MIL)  
R2 333Ω  
(403MIL)  
30 pF  
5 pF  
5 ns  
5 ns  
INCLUDING  
JIG AND  
SCOPE  
INCLUDING  
JIG AND  
SCOPE  
(a) Normal Load  
(b) HighZ Load  
Equivalent to: THÉVENIN EQUIVALENT  
200Ω  
250Ω  
OUTPUT  
2.00V COMMERCIAL  
OUTPUT  
1.90V MILITARY  
Switching Characteristics Over the Operating Range[3,6]  
7C271-35  
7C274-35  
7C271-45  
7C274-45  
7C274-30  
7C271-55  
Parameter  
tAA  
Description  
Address to Output Valid  
Min. Max. Min. Max. Min. Max. Min. Max. Unit  
30  
20  
35  
25  
45  
30  
55  
30  
ns  
ns  
tHZCS  
Chip Select Inactive to High Z (CS1 and CS2,  
7C271 Only)  
tACS  
tHZOE  
tOE  
Chip Select Active to Output Valid (CS1 and CS2,  
7C271 Only)  
20  
20  
20  
25  
20  
20  
30  
25  
25  
30  
25  
25  
ns  
ns  
ns  
Output Enable Inactive to High Z (OE, 7C274  
Only)  
Output Enable Active to Output Valid (OE, 7C274  
Only)  
tHZCE  
tACE  
tPU  
Chip Enable Inactive to High Z (CE Only)  
Chip Enable Active to Output Valid (CE Only)  
Chip Enable Active to Power Up  
35  
35  
40  
40  
50  
50  
60  
60  
ns  
ns  
ns  
ns  
ns  
0
0
0
0
0
0
0
0
tPD  
Chip Enable Inactive to Power Down  
Output Hold from Address Change  
35  
40  
50  
60  
tOH  
Note:  
6. See Introduction to CMOS PROMs for general information on testing.  
Document #: 38-04008 Rev. *B  
Page 3 of 11  
CY7C271  
CY7C274  
Switching Waveform  
t
t
PU  
PD  
POWER-DOWN CONTROLLED BY CE  
50%  
V
CC  
SUPPLY  
CURRENT  
50%  
A A  
0
14  
ADDRESS  
CS  
2
[7]  
OE, CE, CS  
1
t
AA  
(t  
)
OE  
(t  
)
HZOE  
t
t
ACS(E)  
t
OH  
HZCS(E)  
HIGH Z  
O -  
0
O
7
PREVIOUS DATA VALID  
DATA VALID  
Note:  
7. CS2 and CS1 are used on the 7C271 only. OE is used on the 7C274 only.  
inch of the lamp during erasure. Permanent damage may result if the  
PROM is exposed to high-intensity UV light for an extended period of  
time. 7258 Wsec/cm2 is the recommended maximum dosage.  
Erasure Characteristics  
Wavelengths of light less than 4000 angstroms begin to erase  
the CY7C271 and CY7C274 in the windowed package. For  
this reason, an opaque label should be placed over the window  
if the PROM is exposed to sunlight or fluorescent lighting for  
extended periods of time.  
Programming Modes  
Programming support is available from Cypress as well as  
from a number of third-party software vendors. For detailed  
programming information, including a listing of software  
packages, please see the PROM Programming Information  
located at the end of this section. Programming algorithms can  
be obtained from any Cypress representative.  
The recommended dose of ultraviolet light for erasure is a  
wavelength of 2537 angstroms for a minimum dose (UV  
intensity × exposure time) of 25 Wsec/cm2. For an ultraviolet lamp  
with a 12 mW/cm2 power rating, the exposure time would be approx-  
imately 35 minutes. The CY7C271 or CY7C274 needs to be within 1  
Table 1. CY7C271 Mode Selection  
Pin Function[8]  
Read or Output Disable  
Other  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
CE  
VFY  
VIL  
CS2  
PGM  
VIH  
CS1  
VPP  
VIL  
O7–O0  
D7–D0  
O7–O0  
High Z  
High Z  
High Z  
D7–D0  
O7–O0  
High Z  
O7–O0  
Mode  
Read  
Power Down  
VIH  
X
X
X
Output Disable  
Output Disable  
Program  
VIL  
X
X
X
VIH  
VPP  
VPP  
VPP  
VPP  
VIHP  
VILP  
VIHP  
VILP  
VILP  
Program Verify  
Program Inhibit  
Blank Check  
VIHP/VILP  
VIHP  
VIHP/VILP  
Document #: 38-04008 Rev. *B  
Page 4 of 11  
CY7C271  
CY7C274  
Table 2. CY7C274 Mode Selection  
Read or Output Disable  
Pin Function[8]  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
A14–A0  
OE  
VFY  
VIL  
CE  
PGM  
VIL  
VPP  
VPP  
Note 9  
X
O7–O0  
D7–D0  
O7–O0  
High Z  
High Z  
D7–D0  
O7–O0  
High Z  
O7–O0  
Mode  
Read  
Other  
Output Disable  
Power Down  
Program  
VIH  
X
X
VIH  
X
VIHP  
VILP  
VIHP  
VILP  
VILP  
VPP  
VPP  
VPP  
VPP  
Program Verify  
Program Inhibit  
VIHP/VILP  
VIHP  
Blank Check  
VIHP/VILP  
Note:  
8. X can be VIL (VILP) or VIH (VIHP).  
9. VPP should be tied to VCC ±5% in read mode.  
DIP  
Top View  
LCC  
Top View  
1
28  
27  
26  
A
V
CC  
9
2
3
A
8
A
10  
A
11  
4
3
2
323130  
1
A
7
A
29  
A
A
A
6
12  
13  
14  
5
6
7
8
A
4
25  
24  
23  
22  
21  
6
A
A
12  
A
5
4
28  
27  
26  
25  
24  
23  
22  
21  
5
A
5
A
13  
7C271  
7C271  
A
6
A
4
3
A
V
NC  
14  
A
2
V
A
3
7
8
PP  
9
PP  
A
1
A
0
PGM  
VFY  
D
7
A
2
10  
11  
12  
13  
PGM  
A
1
9
20  
19  
18  
17  
16  
VFY  
NC  
A
0
10  
11  
12  
13  
14  
D
7
D
6
D
D
0
6
D
0
D
1
D
2
14151617 181920  
D
5
D
4
GND  
D
3
15  
DIP  
LCC  
Top View  
Top View  
1
28  
27  
26  
V
V
CC  
PP  
2
3
A
A
A
A
A
12  
14  
13  
8
4
3
2
323130  
1
7
A
6
29  
A
8
4
25  
24  
23  
22  
21  
6
5
6
7
8
A
A
A
A
5
28  
27  
26  
25  
24  
23  
22  
21  
9
5
A
5
9
A
4
7C274  
7C274  
A
11  
6
A
A
4
A
11  
3
NC  
VFY  
A
2
A
A
7
3
VFY  
9
A
1
A
0
A
10  
8
A
10  
2
10  
11  
12  
13  
PGM  
A
9
20  
19  
18  
17  
16  
PGM  
1
NC  
D
7
A
0
10  
11  
12  
13  
D
7
D
6
D
0
D
D
D
6
D
5
0
14151617 181920  
1
D
2
D
4
GND  
14  
D
3
15  
Figure 1. Programming Pinouts  
Document #: 38-04008 Rev. *B  
Page 5 of 11  
CY7C271  
CY7C274  
Typical DC and AC Characteristics  
NORMALIZED SUPPLY CURRENT  
vs. AMBIENTTEMPERATURE  
NORMALIZED ACCESS TIME  
vs. SUPPLY VOLTAGE  
NORMALIZED SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
1.2  
1.6  
1.4  
1.2  
1.1  
1.0  
0.9  
0.8  
1.0  
0.8  
1.2  
1.0  
0.6  
0.4  
T =25°C  
A
0.8  
0.6  
f = f  
MAX  
T =25°C  
A
55  
25  
125  
4.0  
4.5  
5.0  
5.5  
6.0  
4.0  
4.5  
5.0  
5.5  
6.0  
AMBIENT TEMPERATURE (°C)  
SUPPLYVOLTAGE (V)  
SUPPLYVOLTAGE (V)  
OUTPUT SOURCE CURRENT  
vs. VOLTAGE  
TYPICAL ACCESS TIME CHANGE  
vs. OUTPUT LOADING  
NORMALIZED ACCESS TIME  
vs. TEMPERATURE  
40  
60  
50  
40  
30  
1.6  
1.4  
1.2  
1.0  
0.8  
30  
20  
10  
0
20  
10  
V
CC  
=4.5V  
T =25°C  
A
0
0.6  
55  
0
1.0  
2.0  
3.0  
4.0  
0
200 400  
600 800 1000  
25  
125  
OUTPUT VOLTAGE (V)  
CAPACITANCE (pF)  
AMBIENT TEMPERATURE (°C)  
NORMALIZED SUPPLY CURRENT  
vs. CYCLE PERIOD  
OUTPUT SINK CURRENT  
vs. OUTPUT VOLTAGE  
175  
150  
1.1  
1.0  
125  
100  
75  
0.9  
0.8  
V
=5.0V  
CC  
50  
T =25°C  
A
0.7  
0.6  
25  
0
0
50  
100  
150 200 250  
0.0  
1.0  
2.0  
3.0  
4.0  
CYCLE PERIOD (ns)  
OUTPUT VOLTAGE (V)  
C271-14  
Document #: 38-04008 Rev. *B  
Page 6 of 11  
CY7C271  
CY7C274  
Ordering Information  
Speed  
(ns)  
Package  
Name  
Operating  
Range  
Ordering Code  
Package Type  
30  
CY7C274-30WC  
CY7C271-35WMB  
CY7C274-35QMB  
CY7C271-45QMB  
CY7C271-45WMB  
CY7C274-45JC  
W16  
W22  
Q55  
Q55  
W22  
J65  
28-Lead (600-Mil) Windowed CerDIP  
Commercial  
Military  
35  
28-Lead (300-Mil) Windowed CerDIP  
32-Pin Windowed Rectangular Leadless Chip Carrier  
32-Pin Windowed Rectangular Leadless Chip Carrier  
28-Lead (300-Mil) Windowed CerDIP  
45  
32-Lead Plastic Leaded Chip Carrier  
Commercial  
Military  
CY7C274-45WMB  
CY7C271-55WMB  
CY7C271-55QMB  
W16  
W22  
Q55  
28-Lead (600-Mil) Windowed CerDIP  
55  
28-Lead (300-Mil) Windowed CerDIP  
32-Pin Windowed Rectangular Leadless Chip Carrier  
MILITARY SPECIFICATIONS  
Group A Subgroup Testing  
DC Characteristics  
Switching Characteristics  
Parameter  
Subgroups  
Parameter  
Subgroups  
7, 8, 9, 10, 11  
7, 8, 9, 10, 11  
VOH  
VOL  
VIH  
VIL  
IIX  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
1, 2, 3  
tAA  
[10]  
tACS  
[11]  
tOE  
7, 8, 9, 10, 11  
7, 8, 9, 10, 11  
tACE  
Note:  
10. 7C271 only (CS1 and CS2).  
11. 7C274 only.  
IOZ  
ICC  
ISB  
SMD Cross Reference  
SMD  
Cypress  
Number  
5962-89817  
5962-89817  
5962-89817  
Suffix  
Number  
CY7C271-55QMB  
CY7C271-45WMB  
CY7C271-45QMB  
01ZX  
02XX  
02ZX  
Document #: 38-04008 Rev. *B  
Page 7 of 11  
CY7C271  
CY7C274  
Package Diagrams  
28-Lead (300-Mil) Molded DIP P21  
51-85014-*B  
32-Pin Windowed Rectangular Leadless Chip Carrier Q55  
MIL-STD-1835 C-12  
51-80103-*A  
Document #: 38-04008 Rev. *B  
Page 8 of 11  
CY7C271  
CY7C274  
Package Diagrams (continued)  
28-Lead (600-Mil) Windowed CerDIP W16  
MIL-STD-1835 D-10 Config. A  
51-80020-**  
Document #: 38-04008 Rev. *B  
Page 9 of 11  
CY7C271  
CY7C274  
Package Diagrams (continued)  
(300-Mil)  
28-Lead  
Windowed CerDIP W22  
MIL-STD-1835 D-15 Config. A  
51-80087-**  
All product and company names mentioned in this document may be the trademarks of their respective holders.  
Document #: 38-04008 Rev. *B  
Page 10 of 11  
© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use  
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize  
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress  
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.  
CY7C271  
CY7C274  
Document History Page  
Document Title: CY7C271 CY7C274 32K x 8 Power Switched and Reprogrammable PROM  
Document Number: 38-04008  
Issue  
Date  
Orig. of  
Change  
REV.  
**  
ECN NO.  
113864  
118899  
122249  
Description of Change  
Change from Spec number: 38-00068 to 38-04008  
Updating Ordering Information  
3/8/02  
DSG  
GBI  
RBI  
A*  
10/10/02  
12/27/02  
*B  
Add power up requirements to Operating Conditions information  
Document #: 38-04008 Rev. *B  
Page 11 of 11  

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