CY7C964 [CYPRESS]
Bus Interface Logic Circuit; 总线接口逻辑电路
| 型号： | CY7C964 |
| 厂家： | 
CYPRESS |
| 描述： | Bus Interface Logic Circuit |
| 文件： | 总6页 (文件大小：102K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
64
fax id: 5604
CY7C964
Bus Interface Logic Circuit
ler. In every case, the controllers provide the control and timing
signals to the Bus Interface Logic Circuit as it acts as a bridge
between the VMEbus and the Local bus.
Features
• Comparators, counters, latches, and drivers minimize
logic requirements for a variety of multiplexed and
non-multiplexed buses
Application with VMEbus Architecture
• Directly drives VMEbus address and data signals
• 8-bit comparator for slave address decoding
• Flexible interface optimized for VMEbus applications
• Companion device to Cypress VMEbus family of com-
ponents
• Replaces multiple SSI/MSI components
• Cascadable
• 64-pin QFP and 68-pin PGA packages
Use with Cypress VMEbus Controllers
The CY7C964 Bus Interface Logic Circuit is a seamless inter-
face between the VIC068A/VIC64 and the VMEbus signals.
The device functions equally well in the established 32-bit
VMEbus arena and the new 64-bit VMEbus standard. The de-
vice contains three 8-bit counters to fulfill the functions of Block
counters, and DMA counters as implied by the D64 portion of
the VMEbus specification. It also contains the necessary mul-
tiplexing logic to allow the 64-bit-wide VMEbus path to be fun-
nelled to and from the 32-bit local bus. Control circuitry is in-
cluded to manage the switching of the 32-bit address bus
during normal (32-bit) operations, and during MBLT (64-bit)
operations. The on-chip drivers are capable of driving the
VMEbus directly (48 mA).
• See the VMEbus Interface Handbook for more informa-
tion
Functional Description
The CY7C964 integrates several space-consuming functions
into one small package, freeing board space for the implemen-
tation of added-value board features. It contains counters,
comparators, latches, and drivers configured to be of value to
implementors of any backplane interface with address and
data buses, particularly VMEbus interfaces. The on-chip driv-
ers are suitable for driving the VMEbus directly. The CY7C964
is ideal in applications where high-performance and real es-
tate are primary concerns.
Use in Other VMEbus Controller Implementations
The CY7C964 circuitry is designed to be of use to designers
of VMEbus circuitry, including VSB (VME subsystem bus) and
designs not requiring the features of the Cypress VIC068A,
VIC64, CY7C960, and CY7C961. The logic diagram includes
general-purpose blocks of comparators, counters, and latches
that can be controlled using the flexible control interface to
allow many different options to be implemented. Although the
device is packaged in a small 64-pin package, the use of mul-
tiplexed input and output pins provides access to the many
internal functions, thus saving external circuitry.
Although having many applications, the Bus Interface Logic
Circuit is an ideal companion part to Cypress’s VMEbus family
of components, the VIC068A, VIC64, the CY7C960, and
CY7C961. It is intended to drive the address and data buses,
so three or four of these small devices are needed per control-
Pin Configuration
PQFP/CQFP/TQFP
Top View
48
47
46
45
44
GND
LD0
LA0
GND
LD7
LDS
1
2
3
4
5
DENIN*
DENIN1*
LAEN
FC1
STROBE*
43
42
41
6
7
8
MWB*
LCOUT*
GND
VCOMP*
VCOUT*
LADO
LADI
LEDI
LEDO
A7
LCIN*
VCIN*
VCC
BLT*
D64
40
39
9
10
38
37
36
11
12
13
DENO*
ABEN*
D0
35
34
14
15
A0
33
16
GND
GND
C964-1
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
November 1992 – Revised December 4, 1997
CY7C964
Pin Configuration (continued)
68-Pin Ceramic PGA
Bottom View
11
10
A0
9
8
7
6
5
4
3
2
1
A
ABEN*
D0
V
CC
LCIN*
VCIN*
DENIN1*
LAEN
LA0
GND
LD0
V
CC
D64
B
C
D
E
GND
GND
DENO*
BLT*
DENIN*
V
CC
LA1
LA2
V
CC
D1
LD1
LD2
A1
A2
A3
D2
D3
LA3
LD3
LA4
GND
LD4
F
GND
G
D4
D5
A4
A5
LA5
LA6
LD5
LD6
H
J
LA7
GND
LD7
V
D6
D7
A6
CC
K
L
V
CC
A7
LEDI
LADO
LADI
LCOUT* STROBE*
LDS
FC1
V
CC
VCOMP*
VCOUT*
GND
GND
LEDO
GND
MWB*
Index Mark
On Top
2
CY7C964
register, or more complex functions such as 16-to-8 pipelined
bidirectional multiplexer with address counter/comparator cir-
cuitry. The device can be cascaded to generate counters and
comparators suitable for multiple byte address/data buses.
The on-chip 48 mA drivers can be directly connected to many
standard backplane buses.
Application with Other Bus Architectures
The CY7C964 is optimized for applications requiring wide buff-
ers and high-performance multiplexing operations. The archi-
tecture can be configured to provide functions such as 16-bit
bidirectional three-state latch and 16-bit comparator with mask
Ordering Information
Package
Operating
Ordering Code
CY7C964–ASC
Name
Package Type
Range
A64
64-Pin Thin Quad Flatpack
64-Pin Plastic Quad Flatpack
68-Pin Ceramic PGA
Commercial
CY7C964–NC
CY7C964–GM
CY7C964–GMB
CY7C964–UM
CY7C964–UMB
N65
G68
G68
U65
U65
Military
68-Pin Ceramic PGA
64-Pin Ceramic Quad Flatpack
64-Pin Ceramic Quad Flatpack
Related Documents
VMEbus Interface Handbook
Document #: 38–00197–C
3
CY7C964
Package Diagrams
64-Pin Thin Quad Flatpack A64
68-Pin Grid Array (Cavity Up) G68
4
CY7C964
Package Diagrams (continued)
64-Lead Plastic Thin Quad Flatpack N65
5
CY7C964
Package Diagrams (continued)
64-Lead Ceramic Quad Flatpack (Cavity Up) U65
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
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