MB89PV470-101CF [CYPRESS]
Microcontroller, CMOS;
| 型号： | MB89PV470-101CF |
| 厂家： | 
CYPRESS |
| 描述： | Microcontroller, CMOS 微控制器 外围集成电路 |
| 文件： | 总53页 (文件大小：1586K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-12552-2E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89470 Series
MB89475/P475/PV470
■ DESCRIPTION
The MB89470 series has been developed as a general-purpose version of the F2MC*-8L family consisting of
proprietary 8-bit, single-chip microcontrollers.
In addition to a compact instruction set, the microcontroller contains a variety of peripheral functions such as 21-
bit time-base timer, watch prescaler, PWC timer, PWM timer, 8/16-bit timer/counter, external interrupt 1 (edge) ,
external interrupt 2 (level) , 10-bit A/D converter, UART/SIO, buzzer, watchdog timer reset.
The MB89470 series is designed suitable for home appliance as well as in a wide range of applications for
consumer product.
* : F2MC is the abbreviation of FUJITSU Flexible Microcontroller.
■ FEATURES
• Package used
QFP package, LQFP package and SH-DIP package for MB89P475, MB89475
MQFP package for MB89PV470
(Continued)
For the information for microcontroller supports, see the following web site.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2003-2008 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2008.9
MB89470 Series
(Continued)
• High-speed operating capability at low voltage
• Minimum execution time : 0.32 µs/12.5 MHz
• F2MC-8L family CPU core
Multiplication and division instructions
16-bit arithmetic operations
Bit test and branch instructions
Bit manipulation instructions, etc.
Instruction set optimized for controllers
• Six timers
PWC timer (also usable as an interval timer)
PWM timer
8/16-bit timer/counter × 2
21-bit timebase timer
Watch prescaler
• Buzzer
7 frequency types are selectable by software
• External interrupts
Edge detection (Selectable edge) : 4 channels
Low-level interrupt (Wake-up function) : 5 channels
• A/D converter (8 channels)
10-bit successive approximation type
• UART/SIO
Synchronous/asynchronous data transfer capable
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
Subclock mode (for dual clock product)
Watch mode (for dual clock product)
• Watchdog timer reset
• I/O ports : Max 39 channels
2
DS07-12552-2E
MB89470 Series
■ PRODUCT LINEUP
Part number
Parameter
MB89475
MB89P475
MB89PV470
Mass production products
(mask ROM product)
Classification
OTP
Piggy-back
16 K × 8-bit (internal PROM,
can be written to by ROM 32 K × 8-bit (external ROM)
programmer)
ROM size
RAM size
16 K × 8-bit (internal ROM)
512 × 8 bits
1 K × 8 bits
Number of instructions
Instruction bit length
: 136
: 8 bits
Instruction length
Data bit length
: 1 to 3 bytes
: 1, 8, 16 bits
CPU functions
Minimum execution time
Minimum interrupt processing time
: 0.32 µs/12.5 MHz
: 2.88 µs/12.5 MHz
: 7 pins
: 3 pins (1 pin in product with
dual clock)
: 29 pins
: 39 pins
Output-only ports (N-channel open drain)
Input-only ports
I/O ports (CMOS)
Total
Ports
21-bit Time-base
timer
Interrupt period (0.82 ms, 3.3 ms, 26.2 ms, 419.4 ms) at 10 MHz
Interrupt period (0.66 ms, 2.6 ms, 21.0 ms, 335.5 ms) at 12.5 MHz
Reset period (209.7 ms to 419.4 ms) at 10 MHz
Reset period (167.8 ms to 335.5 ms) at 12.5 MHz
Watchdog timer
Watch prescaler
17 bits
Interrupt cycle : 31.25 ms, 0.25 ms, 0.5 s, 1.00 s, 2.00 s, 4.00 s/32.768 kHz for subclock
2 channels
8-bit one-shot timer operation (supports underflow output, operating clock period : 1, 4, 32
tinst*, external)
Pulse width count
timer
8-bit reload timer operation (supports square wave output, operating clock period : 1, 4,
32 tinst*, external)
8-bit pulse width measurement operation (supports continuous measurement, H width, L
width, rising edge to rising edge, falling edge to falling edge measurement and both edge
measurement)
8-bit reload timer operation (supports square wave output, operating clock period : 1, 4,
PWM timer
32 tinst*, external)
8-bit resolution PWM operation
Can be operated either as a 2-channel 8-bit timer/counter (Timer 1 and Timer 2, each with
its own independent operating clock cycle) , or as one 16-bit timer/counter
In Timer 1 or 16-bit timer/counter operation, event counter operation (external clock-trig-
gered) and square wave output capable
8/16-bit timer/
counter 1, 2
Can be operated either as a 2-channel 8-bit timer/counter (Timer 3 and Timer 4, each with
its own independent operating clock cycle) , or as one 16-bit timer/counter
In Timer 3 or 16-bit timer/counter operation, event counter operation (external clock-trig-
gered) and square wave output capable
8/16-bit timer/
counter 3, 4
4 independent channels (selectable edge, interrupt vector, request flag)
5 channels (low level interrupt)
External interrupt
DS07-12552-2E
(Continued)
3
MB89470 Series
(Continued)
Part number
Parameter
MB89475
10-bit resolution × 8 channels
A/D conversion function (conversion time : 60 tinst*)
Supports repeated activation by internal clock.
MB89P475
MB89PV470
A/D converter
Synchronous/asynchronous data transfer capable
(Max baud rate : 78.125 Kbps at 10 MHz)
UART/SIO
(7 and 8 bits with parity bit ; 8 and 9 bits without parity bit)
7 frequency types (FCH/212, FCH/211, FCH/210, FCH/29, FCL/25, FCL/24, FCL/23) are selectable by
software.
Buzzer output
Standby mode
Sleep mode, stop mode, subclock mode (dual clock product) and watch mode (dual clock
product)
Process
CMOS
Operating Voltage
2.2 V to 5.5 V
3.5 V to 5.5 V
2.7 V to 5.5 V
* : tinst is one instruction cycle (execution time) , which can be selected as 1/4, 1/8, 1/16, or 1/64 of main clock.
■ PACKAGE AND CORRESPONDING PRODUCTS
Part number
MB89475
MB89P475
MB89PV470
Package
DIP-48P-M01
O
O
O
X
O
O
O
X
X
X
X
O
FPT-48P-M26
FPT-48P-M13
MQP-48C-P01
O : Available
X : Not available
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used.
Take particular care on the following point :
• The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
• For the MB89PV470, add the current consumed by the EPROM mounted in the piggy-back socket.
• When operating at low speed, the current consumed by the one-time PROM product is greater than that for
the mask ROM product. However, the current consumption are roughly the same in sleep or stop mode.
• For more information, see “■ ELECTRICAL CHARACTERISTICS”.
3. Oscillation stabilization time after power-on reset
• For MB89PV470, there is no power-on stabilization time after power-on reset.
• For MB89P475, there is power-on stabilization time after power-on reset.
• For MB89475, the power-on stabilization time can be select.
• For more information, refer to “■ MASK OPTIONS”.
4
DS07-12552-2E
MB89470 Series
■ PIN ASSIGNMENTS
(TOP VIEW)
VSS
C*1
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
X1
2
X0
P40/X0A
P41/X1A
P17/TO2
P16/EC2
P15/TO1
P14/EC1
P13/INT13
P12/INT12
P11/INT11
P10/INT10
P07/AN7
P06/AN6
P05/AN5
P04/AN4
P03/AN3
P02/AN2
P01/AN1
P00/AN0
AVSS
3
MODE
P42
RST
P20/SCK1
P21/SO1
P22/SI1
P23/PWC
P24/PWM
P25/SI2
VCC
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
P26/SO2
P27/SCK2
P30/BUZ*2
P31*2
P32*2
P33*2
P34*2
P35*2
P36*2
AVCC
P54/INT24
P53/INT23
P50/INT20
P51/INT21
P52/INT22
(DIP-48P-M01)
*1 : For pin no. 2, connect this pin to an external 0.1 µF capacitor to ground (for MB89P475 only) .
For MB89PV470 and MB89475, this pin should be left unconnected.
*2 : High current drive type
(Continued)
DS07-12552-2E
5
MB89470 Series
(TOP VIEW)
P33*2
P32*2
P31*2
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
28
27
26
25
P02/AN2
P03/AN3
P04/AN4
P05/AN5
P06/AN6
P07/AN7
P10/INT10
P11/INT11
P12/INT12
P13/INT13
P14/EC1
P15/TO1
P30/BUZ*2
P27/SCK2
P26/SO2
VCC
P25/SI2
P24/PWM
P23/PWC
P22/SI1
P21/SO1
9
10
11
12
(FPT-48P-M26)
(FPT-48P-M13)
*1 : For pin no. 20, connect this pin to an external 0.1 µF capacitor to ground (for MB89P475 only) .
For MB89PV470 and MB89475, this pin should be left unconnected.
*2 : High current drive type
(Continued)
6
DS07-12552-2E
MB89470 Series
(Continued)
(TOP VIEW)
*
P33*3
P32*3
P31*3
P02/AN2
P03/AN3
P04/AN4
P05/AN5
P06/AN6
P07/AN7
P10/INT10
P11/INT11
P12/INT12
P13/INT13
P14/EC1
P15/TO1
1
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
28
27
26
25
69
70
71
72
73
74
75
76
60
59
58
57
56
55
54
53
P30/BUZ*3
P27/SCK2
P26/SO2
VCC
P25/SI2
P24/PWM
P23/PWC
P22/SI1
P21/SO1
9
10
11
12
(MQP-48C-P01)
*1 : Package upper-side pin assignment ( MB89PV470 only)
Pin no.
49
Pin name
Vpp
Pin no.
57
Pin name
N.C.
A2
Pin no.
65
Pin name
O4
Pin no.
73
Pin name
OE
50
A12
A7
58
66
O5
74
N.C.
A11
A9
51
59
A1
67
O6
75
52
A6
60
A0
68
O7
76
53
A5
61
O1
69
O8
77
A8
54
A4
62
O2
70
CE
78
A13
A14
Vcc
55
A3
63
O3
71
A10
N.C.
79
56
N.C.
64
Vss
72
80
N.C. : As connected internally, do not use.
*2 : Pin no. 20 should be left unconnected.
*3 : High current drive type
DS07-12552-2E
7
MB89470 Series
■ PIN DESCRIPTION
Pin no.
I/O
circuit
Pin name
Function
LQFP/QFP/
SDIP*1
MQFP*2
17
18
47
48
X0
X1
Connection pins for a crystal or other oscillator.
An external clock can be connected to X0. In this case, leave X1
open.
A
B
Input pins for setting the memory access mode.
16
14
46
44
MODE
RST
Connect directly to VSS
.
Reset I/O pin. The pin is a N-ch open-drain type with pull-up resistor
and a hysteresis input. The pin outputs an “L” level when an internal
reset request is present. Inputting an “L” level initializes internal cir-
cuits.
C
P00/AN0 to
P07/AN7
General-purpose I/O port.
The pins are shared with the analog inputs for the A/D converter.
38 to 31 20 to 13
D
E
P10/INT10
to
P13/INT13
General-purpose I/O port.
A hysteresis input for INT10 to INT13.
The pin is shared with an external interrupt 1 input.
30 to 27
12 to 9
General-purpose I/O port.
26
25
24
23
13
12
11
8
7
P14/EC1
P15/TO1
P16/EC2
P17/TO2
P20/SCK1
P21/SO1
P22/SI1
E
F
E
F
E
F
E
A hysteresis input for EC1.
The pin is shared with the 8/16 bit timer 1 input.
General-purpose I/O port.
The pin is shared with the output of 8/16-bit timer 1.
General-purpose I/O port.
A hysteresis input for EC2.
The pin is shared with the 8/16 bit timer 2 input.
6
General-purpose I/O port.
The pin is shared with the output of 8/16-bit timer 2.
5
General-purpose I/O port.
A hysteresis input for SCK1.
The pin is shared with the clock I/O of UART/SIO 1.
43
42
41
General-purpose I/O port.
The pin is shared with the serial data output of UART/SIO 1.
General-purpose I/O port.
A hysteresis input for SI1.
The pin is shared with the serial data input of UART/SIO 1.
General-purpose I/O port.
10
9
40
39
38
P23/PWC
P24/PWM
P25/SI2
E
F
E
A hysteresis input for PWC.
This pin is shared with PWC input.
General-purpose input port.
This pin is shared with PWM output.
General-purpose I/O port.
A hysteresis input for SI2.
8
The pin is shared with the serial data input of UART/SIO 2.
(Continued)
8
DS07-12552-2E
MB89470 Series
(Continued)
Pin no.
I/O
circuit
Pin name
Function
LQFP/QFP/
MQFP*2
SDIP*1
General-purpose I/O port.
The pin is shared with the serial data output of UART/SIO 2.
6
5
4
36
P26/SO2
F
E
G
General-purpose I/O port.
A hysteresis input for SCK2.
The pin is shared with the clock I/O of UART/SIO 2.
35
P27/SCK2
N-channel open-drain output.
The pin is shared with buzzer output.
34
P30/BUZ
3 to 1,
48 to 46
33 to
28
P31 to P36
G
H
N-channel open-drain output.
General-purpose input port. (single clock system)
Connection pins for a crystal or other oscillator. (dual clock system)
An external clock can be connected to X0A. In this case, leave X1A
open.
21
22
3
P40/X0A
A
H
A
H
E
General-purpose input port. (single clock system)
Connection pins for a crystal or other oscillator. (dual clock system)
An external clock can be connected to X0A. In this case, leave X1A
open.
4
P41/X1A
P42
15
45
General-purpose input port.
P50/INT20
to
P54/INT24
General-purpose I/O port.
A hysteresis input for INT20 to INT24.
The pin is shared with an external interrupt 2 input.
27 to
23
45 to 41
20
7
2
37
1
C
⎯
⎯
⎯
⎯
Capacitor connection pin *3
V
CC
Power supply pin (+5 V) .
19
40
V
SS
Power supply pin (GND) .
22
AVCC
AVSS
A/D converter power supply pin.
A/D converter power supply pin.
Use at the same voltage level as VSS
39
21
⎯
.
*1 : DIP-48P-M01
*2 : FPT-48P-M26/FPT-48P-M13/MQP-48C-P01
*3 : When MB89475 or MB89PV470 is used, this pin will become a N.C. pin without internal connection.
When MB89P475 is used, connect this pin to an external 0.1 µF capacitor to ground.
DS07-12552-2E
9
MB89470 Series
• External EPROM Socket (MB89PV470 only)
Pin no.
Pin
I/O
Function
name
MQFP*
49
Vpp
O
O
“H” level output pin
Address output pins.
50
51
52
53
54
55
58
59
60
A12
A7
A6
A5
A4
A3
A2
A1
A0
61
62
63
O1
O2
O3
I
Data input pins.
64
V
SS
O
Power supply pin (GND) .
65
66
67
68
69
O4
O5
O6
O7
O8
I
Data input pins.
70
71
73
CE
A10
OE
O
O
O
Chip enable pin for the ROM. Outputs “H” in standby mode.
Address output pin.
Output enable pin for the ROM. Always outputs “L”.
75
76
77
78
79
A11
A9
A8
A13
A14
O
Address output pins.
80
V
CC
O
Power supply pin for the EPROM.
56
57
72
74
N.C.
⎯
Internally connected pins. Always leave open.
* : MQP-48C-P01
10
DS07-12552-2E
MB89470 Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
• Main and sub-clock circuits
• Oscillation feedback resistance
is approx. 500 kΩ for main clock
circuitand5MΩ forsub-clockcir-
cuit.
X1 (X1A)
Nch Pch
Pch
X0 (X0A)
A
Nch
Stop mode control signal
• Hysteresis input
• The pull-down resistor is
approx. 50 kΩ.
(No pull-down resistor in
MB89P475)
B
C
• The pull-up resistance (P-chan-
nel) is approx. 50 kΩ.
• Hysteresis input
R
Pch
Nch
• CMOS output
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
pull-up
resistor register
R
Pch
Nch
D
ADIN
• CMOS output
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
pull-up
resistor register
R
Pch
Nch
E
port
resources
(Continued)
DS07-12552-2E
11
MB89470 Series
(Continued)
Type
Circuit
Remarks
• CMOS output
• CMOS input
• Selectable pull-up resistor
Approx. 50 kΩ
pull-up
resistor regsiter
R
Pch
F
Nch
• N-channel open-drain output
• Selectable pull-up resistor
Approx. 50 kΩ
pull-up
resistor register
R
Pch
G
Nch
• CMOS input
port
H
12
DS07-12552-2E
MB89470 Series
■ HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in “■ ELECTRICAL CHARACTERISTICS” is applied between VCC and VSS.
When latchup occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take care to prevent the analog power supply (AVCC) and analog input from exceeding the digital power
supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D Converter
Connect to be AVCC = VCC and AVSS = VSS even if the A/D converter is not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage
could cause malfunctions, evenifitoccurs within the rated range. Stabilizing voltage supplied totheIC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 Hz to 60 Hz) and the
transient fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power
is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and
wake-up from stop mode.
7. Note to noise in the External Reset Pin (RST)
If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunc-
tions. Usecausionsothattheresetpulselessthanthespecificationswillnotbefedtotheexternalresetpin(RST).
DS07-12552-2E
13
MB89470 Series
■ PROGRAMMING OTPROM IN MB89P475 WITH SERIAL PROGRAMMER
1. Programming the OTPROM with serial programmer
• All OTP products can be programmed with serial programmer.
2. Programming the OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001.
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770
FAX (65) -2810220
3. Programming Adapter for OTPROM
• To program the OTPROM using FUJITSU MCU programmer MB91919-001, use the programming adapter
listed below.
Package
Compatible socket adapter
MB91919-805+MB91919-800
MB91919-806+MB91919-800
MB91919-807+MB91919-800
DIP-48P-M01
FPT-48P-M26
FPT-48P-M13
Inquiry : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770
FAX (65) -2810220
4. OTPROM Content Protection
For product with OTPROM content protection feature (MB89P475-102, MB89P475-202) , OTPROM content can
be read using serial programmer if the OTPROM content protection mechanism is not activated.
One predefined area of the OTPROM (FFFCH) is assigned to be used for preventing the read access of OTPROM
content. If the protection code “00H” is written in this address (FFFCH) , the OTPROM content cannot be read
by any serial programmer.
Note : The program written into the OTPROM cannot be verified once the OTPROM protection code is written (“00H”
in FFFCH) . It is advised to write the OTPROM protection code at last.
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
14
DS07-12552-2E
MB89470 Series
■ PROGRAMMING OTPROM IN MB89P475 WITH PROGRAMMER
1. Programming OTPROM with parallel programmer
• Only products without protection feature (i.e. MB89P475-101 and MB89P475-201) can be programmed with
parallel programmer. Product with protection feature (i.e. MB89P475-102 and MB89P475-202) cannot be
programmed with parallel programmer.
2. ROM Writer Adapters and Recommended ROM Writers
• The following shows ROM writer adapters and recommended ROM writers.
Fujitsu Microelectronics Asia Pte Ltd. (Serial programmer)
Package
DIP-48P-M01
Applicable adapter model
MB91919-601
Recommended writer
FPT-48P-M26
FPT-48P-M13
MB91919-602
MB91919-001
MB91919-603
Inquiries : Fujitsu Microelectronics Asia Pte Ltd. : TEL (65) -2810770
Writing data to the OTPROM
(1) Set the OTPROM writer for the CU50-OTP (device code : cdB6DC) .
(2) Load the program data to the OTPROM writer.
(3) Write data using the OTPROM writer.
3. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
DS07-12552-2E
15
MB89470 Series
■ PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TVM
2. Memory Space
Memory space in each mode is diagrammed below.
Normal operating
mode
Corresponding addresses on
the EPROM programmer
Address
0000H
I/O
0080H
RAM
0880H
8000H
Not available
0000H
PROM
32 KB
EPROM
32 KB
FFFFH
7FFFH
3. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program to 0000H to 7FFFH with the EPROM programmer.
16
DS07-12552-2E
MB89470 Series
■ BLOCK DIAGRAM
X0
X1
Oscillator
CMOS I/O port 0
8
P00/AN0
to P07/AN7
8
4
Clock Controller
P40/X0A*3
P41/X1A*3
P42
10-bit
A/D converter
Sub-clock
Oscillator
AVCC
AVSS
Watch Prescaler
4
External interrupt 1
(Level)
P10/INT10 to P13/INT13
CMOS Input port 4
P14/EC1
P15/TO1
P16/EC2
P17/TO2
8/16-bit Timer 1, 2
8/16-bit Timer 3, 4
Reset circuit
RST
(Watchdog timer)
21-bit Time-base
timer
CMOS I/O port 1
UART/SIO 1
5
5
External interrupt 2
(Level)
P50/INT20 to
P54/INT24
P20/SCK1
P21/SO1
P22/SI1
CMOS I/O port 5
P23/PWC
P24/PWM
8-bit PWC
8-bit PWM
1 Kbyte RAM/512 Byte RAM
P25/SI2
P26/SO2
P27/SCK2
F2MC-8L
CPU
UART/SIO 2
CMOS I/O port 2
16 Kbyte ROM
P30/BUZ*1
6
Buzzer
Other pins
MODE, VCC, VSS, C*2
P31*1 to P36*1
N-ch open-drain output port 3
*1 : High Current Pins
*2 : Unconnected pin for MB89PV470 and MB89475
*3 : P40, P41 pins for single-clock system and X01A, X1A pins for dual-clock system
DS07-12552-2E
17
MB89470 Series
■ CPU CORE
1. Memory Space
The microcontrollers of the MB89470 series offer a memory space of 64 Kbytes for storing all of I/O, data, and
program areas. The I/O area is located at the lowest address. The data area is provided immediately above the
I/O area. The data area can be divided into register, stack, and direct areas according to the application. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89470 series is structured as illustrated below.
Memory Map
MB89475
I/O
MB89P475
I/O
MB89PV470
I/O
0000H
0080H
0100H
0000H
0080H
0100H
0000H
0080H
0100H
RAM
RAM
RAM
General-
purpose
registers
General-
purpose
registers
General-
purpose
registers
0200H
0280H
0200H
0480H
0200H
0280H
Vacant
Vacant
Vacant
8000H
External
ROM
(32 K)
C000H
C000H
ROM
ROM
FFC0H
FFC0H
FFC0H
FFFFH
FFFFH
FFFFH
Vector table (reset, interrupt, vector call instruction)
18
DS07-12552-2E
MB89470 Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following registers are provided :
Program counter (PC)
: A 16-bit register for indicating instruction storage positions
Accumulator (A)
: A 16-bit temporary register for storing arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T) : A 16-bit register which performs arithmetic operations with the accumulator.
When the instruction is an 8-bit data processing instruction, the lower byte is
used.
Index register (IX)
Extra pointer (EP)
Stack pointer (SP)
Program status (PS)
: A 16-bit register for index modification
: A 16-bit pointer for indicating a memory address
: A 16-bit register for indicating a stack area
: A 16-bit register for storing a register pointer, a condition code
16 bits
PC
Initial value
FFFDH
: Program counter
: Accumulator
A
T
Undefined
Undefined
Undefined
Undefined
Undefined
: Temporary accumulator
: Index register
IX
EP
SP
PS
: Extra pointer
: Stack pointer
: Program status
I-flag = 0, IL1, 0 = 11
Other bits are undefined.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR) . (See the diagram below.)
Structure of the Program Status Register
15
14
13
12
11
10
9
8
7
6
I
5
4
3
2
Z
1
0
RP
VacancyVacancy Vacancy
H
IL1, 0
N
PS
C
V
RP
CCR
DS07-12552-2E
19
MB89470 Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes
b1 b0
"0" "0" "0" "0" "0" "0" "0" "1"
R4 R3 R2 R1 R0 b2
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag : Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared
otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0
when reset.
IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
IL1
0
IL0
0
Interrupt level
High-low
High
1
0
1
1
0
2
3
1
1
Low = no interrupt
N-flag : Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0.
Z-flag : Set when an arithmetic operation results in 0. Cleared otherwise.
V-flag : Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does
not occur.
C-flag : Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared other-
wise. Set to the shift-out vallue in the case of a shift instruction.
20
DS07-12552-2E
MB89470 Series
The following general-purpose registers are provided :
General-purpose registers : An 8-bit resister for storing data
The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains
eight registers. Up to a total of 32 banks can be used on the MB89470 series. The bank currently in use is
indicated by the register bank pointer (RP) .
Register Bank Configuration
This address = 0100 + 8 × (RP)
H
R0
R1
R2
R3
R4
R5
R6
R7
32 banks
Memory area
DS07-12552-2E
21
MB89470 Series
■ I/O MAP
Address
00H
Register name
PDR0
Register Description
Port 0 data register
Read/Write
R/W
Initial value
XXXXXXXXB
00000000B
XXXXXXXXB
00000000B
00000000B
01H
DDR0
Port 0 data direction register
Port 1 data register
W*
02H
PDR1
R/W
03H
DDR1
Port 1 data direction register
Port 2 data register
W*
04H
PDR2
R/W
05H
(Reserved)
06H
DDR2
SYCC
STBC
WDTC
TBTC
WPCR
PDR3
PDR4
RSFR
BUZR
PDR5
DDR5
Port 2 data direction register
System clock control register
Standby control register
Watchdog timer control register
Timebase timer control register
Watch prescaler control register
Port 3 data register
R/W
R/W
R/W
W*
00000000B
-XXMM-00B
0001XXXXB
0---XXXXB
00---000B
00--0000B
-1111111B
-----XXXB
07H
08H
09H
0AH
0BH
0CH
0DH
0EH
0FH
R/W
R/W
R/W
R
Port 4 data register
Reset flag register
R
XXXX----B
-----000B
Buzzer register
R/W
R/W
R/W
10H
Port 5 data register
---XXXXXB
---00000B
11H
Port 5 data direction register
(Reserved)
12H, 13H
14H
T4CR
T3CR
T4DR
T3DR
T2CR
T1CR
T2DR
T1DR
Timer 4 control register
Timer 3 control register
Timer 4 data register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
000000X0B
000000X0B
XXXXXXXXB
XXXXXXXXB
000000X0B
000000X0B
XXXXXXXXB
XXXXXXXXB
15H
16H
17H
Timer 3 data register
18H
Timer 2 control register
Timer 1 control register
Timer 2 data register
19H
1AH
1BH
1CH to 1FH
20H
Timer 1 data register
(Reserved)
ADC1
ADC2
ADDH
ADDL
ADER
A/D control register 1
A/D control register 2
A/D data register (Upper byte)
A/D data register (Lower byte)
A/D input enable register
(Reserved)
R/W
R/W
R
-00000X0B
-0000001B
------XXB
21H
22H
23H
R
XXXXXXXXB
11111111B
24H
R/W
25H
26H
SMC11
UART/SIO serial mode control register 11
R/W
00000000B
(Continued)
22
DS07-12552-2E
MB89470 Series
(Continued)
Address
Register name
SMC12
SSD1
Register Description
UART/SIO serial mode control register 12
UART/SIO serial status and data register 1
UART/SIO serial data register 1
UART/SIO serial rate control register 1
UART serial mode control register 21
UART serial mode control register 22
UART serial status and data register 2
UART serial data register 2
Read/Write
R/W
R
Initial value
00000000B
00001---B
27H
28H
29H
SIDR1/SODR1
SRC1
R/W *
R/W
R/W
R/W
R
XXXXXXXXB
XXXXXXXXB
00000000B
00000000B
00001---B
2AH
2BH
SMC21
SMC22
SSD2
2CH
2DH
2EH
SIDR2/SODR2
SRC2
R/W *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
XXXXXXXXB
XXXXXXXXB
00000000B
00000000B
---00000B
2FH
UART serial rate control register 2
External interrupt 1 control register 1
External interrupt 1 control register 2
External interrupt 2 enable register
External interrupt 2 flag register
PWC control register 1
30H
EIC1
31H
EIC2
32H
EIE2
33H
EIF2
-------0B
34H
PCR1
0-0--000B
35H
PCR2
PWC control register 2
00000000B
XXXXXXXXB
36H
PLBR
PWC reload buffer register
37H
(Reserved)
38H
CNTR
COMR
PWM timer control register
R/W
W*
0-00000000B
XXXXXXXXB
39H
PWM timer compare register
(Reserved)
3AH to 6FH
70H
PURC0
PURC1
PURC2
PURC3
Port 0 pull up resistor control register
Port 1 pull up resistor control register
Port 2 pull up resistor control register
Port 3 pull up resistor control register
(Reserved)
R/W
R/W
R/W
R/W
11111111B
11111111B
11111111B
-1111111B
71H
72H
73H
74H
75H
PURC5
Port 5 pull up resistor control register
(Reserved)
R/W
---1111B
76H to 7AH
7BH
ILR1
ILR2
ILR3
ILR4
Interrupt level setting register 1
Interrupt level setting register 2
Interrupt level setting register 3
Interrupt level setting register 4
(Reserved)
W*
W*
W*
W*
11111111B
11111111B
11111111B
11111111B
7CH
7DH
7EH
7FH
* : Bit manipulation instruction cannot be used.
DS07-12552-2E
23
MB89470 Series
• Read/write access symbols
R/W : Readable and writable
R
W
: Read-only
: Write-only
• Initial value symbols
0
1
X
-
: The initial value of this bit is “0”.
: The initial value of this bit is “1”.
: The initial value of this bit is undefined.
: Unused bit.
M
: The initial value of this bit is determined by mask option.
24
DS07-12552-2E
MB89470 Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(AVSS = VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min
Max
VCC
AVCC
Power supply voltage
VSS − 0.3 VSS + 6.0
V
AVCC must not exceed VCC
Input voltage
VI
VO
IOL
VSS − 0.3 VCC + 0.3
VSS − 0.3 VCC + 0.3
V
V
Output voltage
“L” level maximum output current
⎯
15
mA
Average value (operating current
× operating rate)
P00 to P07, P10 to P17,
P20 to P27, P50 to P54, RST
IOLAV1
⎯
4
mA
“L” level average output current
Average value (operating current
IOLAV2
⎯
⎯
12
mA × operating rate)
P30 to P36
“L” level total maximum output
current
ΣIOL
100
mA
“L” level total average output
current
Average value (operating current
× operating rate)
ΣIOLAV
IOH
⎯
⎯
⎯
40
−15
−2
mA
mA
mA
“H” level maximum output current
Average value (operating current
× operating rate)
“H” level average output current
IOHAV
“H” level total maximum output
current
ΣIOH
⎯
⎯
−50
−20
mA
mA
“H” level total average output
current
Average value (operating current
× operating rate)
ΣIOHAV
Power consumption
Operating temperature
Storage temperature
PD
TA
⎯
300
+85
mW
°C
−40
−55
Tstg
+150
°C
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
DS07-12552-2E
25
MB89470 Series
2. Recommended Operating Conditions
(AVSS = VSS = 0.0 V)
Value
Symbol
Unit
Remarks
Parameter
Min
Max
Operation assurance
range
2.2*
5.5
V
V
V
MB89475
Operation assurance
range
3.5*
2.7*
5.5
5.5
MB89P475
MB89PV470
VCC
AVCC
Power supply voltage
Operating temperature
Operation assurance
range
Retains the RAM state in
stop mode
1.5
5.5
V
TA
−40
+85
°C
* : These values depend on the operating conditions and the analog assurance range. See “Operating Voltage vs.
Main Clock Operating Frequency” and “5. A/D Converter Electrical Characteristics.”
26
DS07-12552-2E
MB89470 Series
• Operating Voltage vs. Main Clock Operating Frequency
Operating
Voltage (V)
5.5
5.0
4.5
4.0
3.5
Analog accuracy
assurance range :
VCC = AVCC = 4.5 V to 5.5 V
3.0
2.7
2.2
2.0
Main clock
operating Freq. (MHz)
1.0
4.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0 11.0 12.0 12.5
Min execution
time (inst. cycle) (µs)
2.0 1.33 1.0
This area is not assured for MB89P475.
0.8 0.66 0.57 0.50 0.44 0.4 0.36 0.33 0.32
Note :
This area is not assured for MB89PV470 and MB89P475.
“Operating Voltage vs. Main Clock Operating Frequency” indicates the operating frequency of the external oscilla-
tor at an instruction cycle of 4/FCH.
Since the operating voltage range is dependent on the instruction cycle, see minimum execution time if the oper-
ating speed is switched using a gear.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of
the semiconductor device. All of the device's electrical characteristics are warranted when the
device is operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges.
Operation outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented
on the data sheet. Users considering application outside the listed conditions are advised to contact
their representatives beforehand.
DS07-12552-2E
27
MB89470 Series
3. DC Characteristics
(AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Parameter Symbol
Pin
Condition
Unit Remarks
Min
Typ
Max
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P42,
P50 to P54
VIH
⎯
0.7 VCC
⎯
VCC + 0.3
V
“H” level
input voltage
RST, MODE, EC1,
EC2, SCK1, SI1,
SCK2, SI2, PWC,
INT10 to INT13,
INT20 to INT24
VIHS
⎯
⎯
⎯
0.8 VCC
VSS − 0.3
VSS − 0.3
⎯
⎯
⎯
VCC + 0.3
0.3 VCC
0.2 VCC
V
V
V
P00 to P07,
P10 to P17,
P20 to P27,
P40 to P42,
P50 to P54
VIL
“L” level
input voltage
RST, MODE, EC1,
EC2, SCK1, SI1,
SCK2, SI2, PWC,
INT10 to INT13,
INT20 to INT24
VILS
Open-drain
output pin
application
voltage
VD
P30 to P36
⎯
VSS − 0.3
⎯
⎯
VCC + 0.3
V
V
P00 to P07,
P10 to P17,
P20 to P27,
P50 to P54
“H” level
output
voltage
VOH
IOH = −2.0 mA
4.0
⎯
P00 to P07,
P10 to P17,
P20 to P27,
P50 to P54, RST
“L” level
output
voltage
VOL1
VOL2
ILI
IOL = 4.0 mA
⎯
⎯
−5
⎯
⎯
⎯
0.4
0.4
+5
V
V
P30 to P36
IOL = 12.0 mA
0.45 V < VI < VCC
P00 to P07,
P10 to P17,
P20 to P27,
P50 to P54
Without
µA pull-up
resistor
Input leak-
age current
Open drain
output
leakage
current
ILOD
P30 to P36
0.45 V < VI < VCC
−5
⎯
+5
µA
(Continued)
28
DS07-12552-2E
MB89470 Series
(Continued)
(AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Parameter Symbol
Pin
Condition
Unit
Remarks
Min
Typ
Max
Pull-down
resistance
Except
MB89P475
RDOWN MODE
VI = VCC
25
50
100
kΩ
P00 to P07,
P10 to P17,
P20 to P27,
P30 to P36,
P50 to P54, RST
Whenpull-up
resistor is
selected (ex-
cept RST)
Pull-up
resistance
RPULL
VI = 0.0 V
25
50
100
kΩ
FCH = 12.5 MHz
tinst = 0.32 µs
Main clock
ICC1
⎯
⎯
⎯
⎯
7
13
3
mA
mA
mA
run mode
FCH = 12.5 MHz
tinst = 5.12 µs
Main clock
ICC2
1
run mode
FCH = 12.5 MHz
tinst = 0.32 µs
Main clock
ICCS1
2.5
0.7
5
sleep mode
FCH = 12.5 MHz
tinst = 5.12 µs
Main clock
ICCS2
2
mA
sleep mode
VCC
Power
supply
current
MB89PV470
MB89475
FCL =
32.768 kHz
Subclock mode
⎯
⎯
37
85
µA
ICCL
350
785
µA MB89P475
FCL =
32.768 kHz
Subclock sleep
mode
ICCLS
⎯
11
30
µA
FCL =
MB89PV470
µA
⎯
⎯
1.4
5.6
15
21
32.768 kHz
Watch mode
Main clock
stop mode
MB89475
ICCT
µA MB89P475
µA
Ta = +25 °C
Subclock stop
mode
ICCH
1
10
A/D
mA
IA
FCH = 12.5 MHz
Ta = +25 °C
f = 1 MHz
⎯
⎯
⎯
2.8
1
6
5
converting
AVcc
IAH
CIN
µA A/D stop
Input
capacitance
Other than VCC,
VSS, AVCC, AVSS
5
15
pF
DS07-12552-2E
29
MB89470 Series
4. AC Characteristics
(1) Reset Timing
(VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Condition
Unit
Remarks
Parameter
Min
Max
RST “L” pulse width
tZLZH
⎯
48 tHCYL
⎯
ns
Notes : • tHCYL is the oscillation cycle (1/FC) to input to the X0 pin.
• If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause
malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external
reset pin (RST).
t
ZLZH
RST
0.2 VCC
0.2 VCC
(2) Power-on Reset
Parameter
(AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol Condition
Unit
Remarks
Min
⎯
1
Max
50
Power supply rising time
Power supply cut-off time
tR
ms
⎯
tOFF
⎯
ms Due to repeated operations
Note : Make sure that power supply rises within the selected oscillation stabilization time.
Rapid changes in power supply voltage may cause a power-on reset. If power supply voltage needs to be
varied in the course of operation, a smooth voltage rise is recommended.
tR
tOFF
3.5 V
0.2 V
0.2 V
0.2 V
VCC
30
DS07-12552-2E
MB89470 Series
(3) Clock Timing
(AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Typ
Symbol
Pin
Unit
Remarks
Parameter
Min
1
Max
FCH
FCL
X0, X1
X0A, X1A
X0, X1
⎯
12.5 MHz
Clock frequency
Clock cycle time
⎯
80
⎯
32.768
⎯
⎯
1000
⎯
kHz
ns
tHCYL
tLCYL
X0A, X1A
30.5
µs
PWH
PWL
X0
X0A
20
⎯
⎯
⎯
15.2
⎯
⎯
⎯
10
ns
Input clock pulse width
PWHL
PWLL
µs External clock
tCR
tCF
Input clock rising/falling time
X0, X0A
ns
X0 and X1 Timing and Conditions
t
HCYL
PWH
PWL
t
CR
tCF
0.8 VCC 0.8 VCC
0.2 VCC
X0
0.2 VCC
0.2 VCC
Main Clock Conditions
When a crystal
or
When an external clock is used
ceramic oscillator is used
X0
X1
X0
X1
FCH
C2
Open
FCH
C1
DS07-12552-2E
31
MB89470 Series
Subclock Timing and Conditions
tLCYL
0.8 VCC
0.2 VCC
X0A
PWHL
PWLL
tCR
tCF
Subclock Conditions
When a crystal
or
ceramic oscillator is used
When sub-clock is not used in dual clock product
When an external clock is used
X0A
X1A
X0A
X1A
X0A
X1A
FCL
Rd
Open
Open
FCL
C0
C1
(4) Instruction Cycle
Parameter
Symbol
Value
Unit
Remarks
(4/FCH) tinst = 0.32 µs when operating
at FCH = 12.5 MHz
4/FCH, 8/FCH, 16/FCH, 64/FCH
µs
Instruction cycle
(minimum execution time)
tinst
tinst = 61.036 µs when operating at
FCL = 32.768 kHz
2/FCL
µs
32
DS07-12552-2E
MB89470 Series
(5) Serial I/O Timing
Parameter
(VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Pin
Condition
Unit
Min
2 tinst*
−200
Max
⎯
Serial clock cycle time
SCK ↓ → SO time
tSCYC
tSLOV
tIVSH
tSHIX
tSHSL
tSLSH
tSLOV
tIVSH
tSHIX
SCK1, SCK2
µs
ns
ns
ns
µs
µs
ns
ns
ns
SCK1, SO1, SCK2, SO2
SI1, SCK1, SI2, SCK2
SCK1, SI1, SCK2, SI2
+200
⎯
Internalshift
clock mode
Valid SI → SCK ↑
1/2 tinst*
1/2 tinst*
1 tinst*
1 tinst*
0
SCK ↑ → valid SI hold time
Serial clock “H” pulse width
Serial clock “L” pulse width
SCK ↓ → SO time
⎯
⎯
SCK1, SCK2
⎯
External
shift clock
mode
SCK1, SO1, SCK2, SO2
SI1, SCK1, SI2, SCK2
SCK1, SI1, SCK2, SI2
200
⎯
Valid SI → SCK ↑
1/2 tinst*
1/2 tinst*
SCK ↑ → valid SI hold time
⎯
* : For information on tinst, see “ (4) Instruction Cycle.”
Internal Clock Operation
tSCYC
2.4 V
SCK1, SCK2
0.8 V
0.8 V
tSLOV
2.4 V
SO1, SO2
SI1, SI2
0.8 V
tIVSH
tSHIX
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
External Clock Operation
tSLSH
tSHSL
0.8 VCC
0.8 VCC
SCK1, SCK2
0.2 VCC
0.2 VCC
tSLOV
2.4 V
0.8 V
SO1, SO2
SI1, SI2
tIVSH
tSHIX
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
DS07-12552-2E
33
MB89470 Series
(6) Peripheral Input Timing
(AVCC = VCC = 5.0 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Symbol
Pin
Unit
Remarks
Parameter
Min
Max
Peripheral input “H” pulse width 1
Peripheral input “L” pulse width 1
tILIH1
tIHIL1
INT10 to INT13,
INT20 to INT24, EC1,
EC2, PWC
2 tinst*
⎯
µs
µs
2 tinst*
⎯
* : For information on tinst, see “ (4) Instruction Cycle.”
t
IHIL1
t
ILIH1
INT10 to INT13,
INT20 to INT24,
EC1, EC2,
0.8 VCC
0.8 VCC
0.2 VCC
PWC
0.2 VCC
34
DS07-12552-2E
MB89470 Series
5. A/D Converter Electrical Characteristics
(1) A/D Converter Electrical Characteristics
(AVCC = VCC = 4.5 V to 5.5 V, AVSS = VSS = 0.0 V, TA = −40 °C to +85 °C)
Value
Parameter
Resolution
Symbol
Pin
Unit Remarks
Min
⎯
Typ
10
⎯
Max
⎯
bit
Total error
⎯
4.0
2.5
1.9
LSB
LSB
LSB
⎯
Linearity error
⎯
⎯
Differential linearity error
⎯
⎯
⎯
AVSS −
1.5 LSB
AVSS +
0.5 LSB
AVSS +
2.5 LSB
Zero transition voltage
VOT
V
V
Full-scale transition
voltage
AVCC −
4.5 LSB
AVCC −
2.5 LSB
AVCC −
0.5 LSB
VFST
A/D mode conversion time
Analog port input current
Analog input voltage
⎯
IAIN
⎯
⎯
⎯
⎯
⎯
60 tinst*
10
µs
µA
V
AN0to
AN7
VAIN
AVSS
AVCC
* : For information on tinst, see “ (4) Instruction Cycle” in “4. AC Characteristics”.
(2) A/D Converter Glossary
• Resolution
Analog changes that are identifiable with the A/D converter
When the number of bits is 10, analog voltage can be divided into 210 = 1024.
• Linearity error (unit : LSB)
The deviation of the straight line connecting the zero transition point (“00 0000 0000” ↔ “00 0000 0001”) with
the full-scale transition point (“11 1111 1111” ↔ “11 1111 1110”) from actual conversion characteristics.
• Differential linearity error (unit : LSB)
The deviation of input voltage needed to change the output code by 1 LSB from the theoretical value.
• Total error (unit : LSB)
The difference between theoretical and actual conversion values.
DS07-12552-2E
35
MB89470 Series
Theoretical I/O characteristics
Total error
VFST
3FF
3FE
3FD
3FF
3FE
3FD
Actual conversion
value
1.5 LSB
{1 LSB × N +
VOT}
004
003
004
003
002
001
VNT
Actual
V
OT
conversion
value
002
001
1 LSB
Theoretical
value
0.5 LSB
AVSS
AVCC
AVSS
AVCC
Analog input
Analog input
VFST − VOT
VNT − {1 LSB × N + 0.5 LSB}
1 LSB =
(V)
Total error =
1022
1 LSB
Zero transition error
Full-scale transition error
Theoretical value
004
003
002
001
Actual conversion
value
3FF
Actual conversion
value
3FE
3FD
3FC
V
FST
(Actual
measurement)
Actual conversion
value
Actual conversion value
V
OT (Actual measurement)
AVSS
AVCC
AVSS
AVCC
Analog input
Analog input
(Continued)
36
DS07-12552-2E
MB89470 Series
(Continued)
Linearity error
Differential linearity error
Theoretical value
3FF
3FE
3FD
Actual conversion
value
N + 1
N
{1 LSB × N + VOT}
V (N + 1) T
Actual conversion
value
VFST
(Actual
measurement)
VNT
004
003
002
001
N − 1
N − 2
VNT
Actual conversion
value
Actual conversion
value
Theoretical value
VOT (Actual measurement)
AVSS
AVCC
AVSS
AVCC
Analog input
Analog input
VNT − {1 LSB × N + VOT}
V (N + 1) T − VNT
=
Linearity error
Differential linearity error
=
−1
1 LSB
1 LSB
DS07-12552-2E
37
MB89470 Series
(3) Notes on Using A/D Converter
• Input impedance of the analog input pins
The A/D converter used for the MB89470 series contains a sample & hold circuit as illustrated below to fetch
analog input voltage into the sample & hold capacitor for 16 instruction cycles after activation A/D conversion.
For this reason, if the output impedance of the external circuit for the analog input is high, analog input voltage
might not stabilize within the analog input sampling period. Therefore, it is recommended to keep the output
impedance of the external circuit low.
Note that if the impedance cannot be kept low, it is recommended to connect an external capacitor of about
0.1 µF for the analog input pin.
Analog Input Circuit Model
Sample & hold circuit
Analog input pin
Comparator
If the analog input
impedance is higher
than to 10 kΩ, it is
recommended to
connect an external
capacitor of approx.
0.1 µF.
R
C
Close for 16 instruction cycles after
activating A/D conversion.
Analog channel selector
MB89475
MB89PV470
Sample & hold circuit
MB89P475
R : analog input equivalent resistance
C : analog input equivalent capacitance
2.2 kΩ
2.6 kΩ
45 pF
28 pF
38
DS07-12552-2E
MB89470 Series
■ EXAMPLE CHARACTERISTICS
• “L” level output voltage
V
OL1 − IOL (MB89475)
VOL2 − IO2 (MB89475)
V
CC = 3.0 V
CC = 3.5 V
= 4.0 V
CC = 4.5 V
CC = 5.0 V
CC = 5.5 V
CCCC = 6.0 V
0.8
0.6
0.4
0.2
0.0
0.4
0.3
0.2
0.1
0.0
V
CC = 3.0 V
V
Ta = + 25 °C
Ta = + 25 °C
V
CC = 3.5 V
V
V
V
V
V
V
V
V
V
V
CC = 4.5 V
= 4.0 V
CC = 5.0 V
CC = 5.5 V
CCCC = 6.0 V
0
2
4
6
8
10
0
2
4
6
8
10 12 14 16
I
OL1 (mA)
I
OL2 (mA)
• “H” level output voltage
( VCC − VOH ) − IOH (MB89475)
VCC = 3.5 V
VCC = 4.0 V
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Ta = + 25 °C
VCC = 4.5 V
VCC = 5.0 V
VCC = 5.5 V
VCC = 6.0 V
VCC = 3.0 V
0
−2
−4
−6
−8
−10
I
OH (mA)
• “H” level input voltage/“L” level input voltage
CMOS hysteresis Input (MB89475)
CMOS Input (MB89475)
4.0
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta = + 25 C
3.5
Ta = + 25 C
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VIHS
VILS
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC (V)
VCC (V)
VIHS : Threshold when input voltage in hysteresis
characteristics is set to “H” level.
VILS : Threshold when input voltage in hysteresis
characteristics is set to “L” level.
DS07-12552-2E
39
MB89470 Series
• Power supply current (External clock)
I
CC1 − VCC (MB89475)
ICC2 − VCC (MB89475)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
10.0
8.0
6.0
4.0
2.0
0.0
Ta = + 25 °C
F
CH = 12.5 MHz
Ta = + 25 °C
F
F
F
CH = 12.5 MHz
CH = 10.0 MHz
CH = 8.0 MHz
F
F
CH = 10.0 MHz
CH = 8.0 MHz
F
CH = 4.0 MHz
F
CH = 4.0 MHz
F
F
= 2.0 MHz
CCHH = 1.0 MHz
F
F
= 2.0 MHz
CCHH = 1.0 MHz
1
2
3
4
5
6
7
1
2
3
4
5
6
7
V
CC (V)
V
CC (V)
I
CCS1 − VCC (MB89475)
I
CCS2 − VCC (MB89475)
1.0
0.8
0.6
0.4
0.2
0.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Ta = + 25 °C
Ta = + 25 °C
F
CH = 12.5 MHz
F
CH = 12.5 MHz
CH = 10.0 MHz
CH = 8.0 MHz
F
F
CH = 10.0 MHz
CH = 8.0 MHz
F
F
F
CH = 4.0 MHz
F
CH = 4.0 MHz
F
F
CH = 2.0 MHz
CH = 1.0 MHz
F
F
= 2.0 MHz
CCHH = 1.0 MHz
1
2
3
4
5
6
7
1
2
3
4
5
6
7
V
CC (V)
V
CC (V)
(Continued)
40
DS07-12552-2E
MB89470 Series
(Continued)
ICCL − VCC (MB89475)
Ta = + 25 °C
ICCLS − VCC (MB89475)
60
16
14
12
10
8
FCH = 32.768 MHz
Ta = + 25 °C
FCH = 32.768 MHz
50
40
30
20
10
0
6
4
2
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
VCC (V)
VCC (V)
ICCT − VCC (MB89475)
2.8
2.4
Ta = + 25 °C
2.0
1.6
1.2
0.8
0.4
0.0
FCH = 32.768 MHz
1
2
3
4
5
6
7
VCC (V)
DS07-12552-2E
41
MB89470 Series
• Pull-up resistance
RPULL − VCC (MB89475)
320
280
240
200
160
120
80
40
Ta = + 25 °C
0
1
2
3
4
5
6
7
VCC (V)
42
DS07-12552-2E
MB89470 Series
■ MASK OPTIONS
Part number
Specifying procedure
Selection of clock mode
MB89475
MB89P475
MB89PV470
No.
Specify when
ordering mask
Setting not possible Setting not possible
101/102 : Single clock 101 : Single clock
201/202 : Dual clock
• Single clock mode
• Dual clock mode
1
Selectable
201 : Dual clock
Selection of oscillation stabilization
time (OSC)
Selectable
• The initial value of the oscillation
stabilization time for the main
clock can be set by selecting the
values of the WTM1 and WTM0
bits on the right.
OSC
Fixed to oscillation
stabilization time of
218/FCH
Fixed to oscillation
stabilization time of
218/FCH
2
3
1 : 214/FCH
2 : 217/FCH
3 : 218/FCH
Selection of power-on stabilization
time
Fixed to power-on sta-
bilization time of
217/FCH
Selectable
Fixed to nil
• Nil
• 217/FCH
■ ORDERING INFORMATION
Part number
Package
Remarks
MB89475PFM
MB89P475-101PFM
MB89P475-102PFM
MB89P475-201PFM
MB89P475-202PFM
48-pin Plastic QFP
(FPT-48P-M13)
101 :
Single clock, without content protection
102 :
Single clock, with content protection
201 :
Dual clock, without content protection
202 :
Dual clock, with content protection
MB89475PMC
MB89P475-101PMC
MB89P475-102PMC
MB89P475-201PMC
MB89P475-202PMC
48-pin Plastic LQFP
(FPT-48P-M26)
MB89475P-SH
MB89P475-101P-SH
MB89P475-102P-SH
MB89P475-201P-SH
MB89P475-202P-SH
48-pin Plastic SH-DIP
(DIP-48P-M01)
MB89PV470-101CF
MB89PV470-201CF
48-pin Ceramic MQFP
(MQP-48C-P01)
DS07-12552-2E
43
MB89470 Series
■ PACKAGE DIMENSIONS
48-pin plastic SH-DIP
Lead pitch
Row spacing
Sealing method
1.778mm(70mil)
15.24mm(600mil)
Plastic mold
(DIP-48P-M01)
48-pin plastic SH-DIP
(DIP-48P-M01)
43.69 +–00..3200
1.720 +–..001028
INDEX-1
13.80±0.25
(.543±.010)
INDEX-2
0.51(.020)MIN
5.25(.207)
MAX
0.25±0.05
(.010±.002)
3.00(.118)
MIN
1.00 +–00.50
0.45±0.10
(.018±.004)
15.24(.600)
TYP
.039 +–0.020
15°MAX
1.778±0.18
(.070±.007)
1.778(.070)
40.894(1.610)REF
MAX
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
1994-2008 FUJITSU MICROELECTRONICS LIMITED D48002S-3C-4
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
44
DS07-12552-2E
MB89470 Series
48-pin plastic LQFP
Lead pitch
0.50 mm
Package width ×
package length
7 × 7 mm
Gullwing
Lead shape
Sealing method
Mounting height
Weight
Plastic mold
1.70 mm MAX
0.17 g
Code
(Reference)
P-LFQFP48-7×7-0.50
(FPT-48P-M26)
48-pin plastic LQFP
(FPT-48P-M26)
Note 1) * : These dimensions include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
9.00±0.20(.354±.008)SQ
+0.40
7.00 –0.10 .276 –+..000146 SQ
0.145±0.055
(.006±.002)
*
36
25
37
24
Details of "A" part
0.08(.003)
1.50 +–00..1200
.059 +–..000048
(Mounting height)
INDEX
48
13
0.10±0.10
(.004±.004)
(Stand off)
"A"
0˚~8˚
1
12
LEAD No.
0.50(.020)
0.25(.010)
0.20±0.05
M
0.08(.003)
(.008±.002)
0.60±0.15
(.024±.006)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
©2003-2008 FUJITSU MICROELECTRONICS LIMITED F48040S-c-2-3
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
DS07-12552-2E
45
MB89470 Series
48-pin plastic QFP
Lead pitch
0.80 mm
10 × 10 mm
Package width ×
package length
Lead shape
Sealing method
Mounting height
Gullwing
Plastic mold
2.35 mm MAX
P-QFP44-10×10-0.80
Code
(Reference)
(FPT-48P-M13)
48-pin plastic QFP
(FPT-48P-M13)
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
13.10±0.40(.516±.016)SQ
10.00±0.20(.394±.008)SQ
*
0.17±0.06
(.007±.002)
36
25
37
24
Details of "A" part
1.95 +–00..2400
(Mounting height)
0.10(.004)
.077 +–..000186
0.25(.010)
INDEX
0~8
°
48
13
0.80±0.20
(.031±.008)
0.20 +–00..2100
.008 +–..000084
"A"
1
12
(Stand off)
0.88±0.15
(.035±.006)
0.80(.031)
0.32±0.05
(.013±.002)
M
0.20(.008)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
2003-2008 FUJITSU MICROELECTRONICS LIMITED F48023S-c-3-5
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
(Continued)
46
DS07-12552-2E
MB89470 Series
(Continued)
48-pin ceramic MQFP
Lead pitch
0.8 mm
Straight
Ceramic
Lead shape
Motherboard
material
Mounted package
material
Plastic
(MQP-48C-P01)
48-pin ceramic MQFP
(MQP-48C-P01)
17.20(.677)TYP
15.00±0.25
(.591±.010)
1.50(.059)TYP
1.00(.040)TYP
8.80(.346)REF
PIN No.1 INDEX
14.82±0.35
(.583±.014)
0.80±0.22
(.0315±.0087)
PIN No.1 INDEX
1.02±0.13
(.040±.005)
10.92 +–00..013
8.71(.343)
TYP
7.14(.281)
TYP
.430 +–0.005
PAD No.1 INDEX
4.50(.177)TYP
1.10 +–00..2455
0.40±0.08
(.016±.003)
0.60(.024)TYP
0.30(.012)TYP
.043 +–..001108
8.50(.335)MAX
0.15±0.05
(.006±.002)
Dimensions in mm (inches).
Note: The values in parentheses are reference values.
C
1994-2008 FUJITSU MICROELECTRONICS LIMITED M48001SC-4-3
Please confirm the latest Package dimension by following URL.
http://edevice.fujitsu.com/package/en-search/
DS07-12552-2E
47
MB89470 Series
■ MAIN CHANGES IN THIS EDITION
Page
Section
Change Results
Changed the package code.
FPT-48P-M05 → FPT-48P-M26
⎯
⎯
■ PROGRAMMING OTPROM IN MB89P475 Changed the "2. ROM Writer Adapters and Recom-
15
16
WITH PROGRAMMER
mended ROM Writers".
■ PROGRAMMING TO THE EPROM WITH
PIGGYBACK/EVALUATION DEVICE
Deleted the “2. Programming Socket Adapter”
■ ORDERING INFORMATION
Order informations are changed.
MB89475PFV → MB89475PMC
MB89P475-101PFV → MB89P475-101PMC
MB89P475-102PFV → MB89P475-102PMC
MB89P475-201PFV → MB89P475-201PMC
MB89P475-202PFV → MB89P475-202PMC
43
■ PACKAGE DIMENSIONS
Changed the package figure.
FPT-48P-M05 → FPT-48P-M26
45
The vertical lines marked in the left side of the page show the changes.
48
DS07-12552-2E
MB89470 Series
MEMO
DS07-12552-2E
49
MB89470 Series
MEMO
50
DS07-12552-2E
MB89470 Series
MEMO
DS07-12552-2E
51
MB89470 Series
FUJITSU MICROELECTRONICS LIMITED
Shinjuku Dai-Ichi Seimei Bldg., 7-1, Nishishinjuku 2-chome,
Shinjuku-ku, Tokyo 163-0722, Japan
Tel: +81-3-5322-3347 Fax: +81-3-5322-3387
http://jp.fujitsu.com/fml/en/
For further information please contact:
North and South America
Asia Pacific
FUJITSU MICROELECTRONICS AMERICA, INC.
1250 E. Arques Avenue, M/S 333
Sunnyvale, CA 94085-5401, U.S.A.
Tel: +1-408-737-5600 Fax: +1-408-737-5999
http://www.fma.fujitsu.com/
FUJITSU MICROELECTRONICS ASIA PTE. LTD.
151 Lorong Chuan,
#05-08 New Tech Park 556741 Singapore
Tel : +65-6281-0770 Fax : +65-6281-0220
http://www.fmal.fujitsu.com/
Europe
FUJITSU MICROELECTRONICS SHANGHAI CO., LTD.
Rm. 3102, Bund Center, No.222 Yan An Road (E),
Shanghai 200002, China
Tel : +86-21-6146-3688 Fax : +86-21-6335-1605
http://cn.fujitsu.com/fmc/
FUJITSU MICROELECTRONICS EUROPE GmbH
Pittlerstrasse 47, 63225 Langen, Germany
Tel: +49-6103-690-0 Fax: +49-6103-690-122
http://emea.fujitsu.com/microelectronics/
Korea
FUJITSU MICROELECTRONICS PACIFIC ASIA LTD.
10/F., World Commerce Centre, 11 Canton Road,
Tsimshatsui, Kowloon, Hong Kong
Tel : +852-2377-0226 Fax : +852-2376-3269
http://cn.fujitsu.com/fmc/en/
FUJITSU MICROELECTRONICS KOREA LTD.
206 Kosmo Tower Building, 1002 Daechi-Dong,
Gangnam-Gu, Seoul 135-280, Republic of Korea
Tel: +82-2-3484-7100 Fax: +82-2-3484-7111
http://kr.fujitsu.com/fmk/
Specifications are subject to change without notice. For further information please contact each office.
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with sales representatives before ordering.
The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose
of reference to show examples of operations and uses of FUJITSU MICROELECTRONICS device; FUJITSU MICROELECTRONICS
does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating
the device based on such information, you must assume any responsibility arising out of such use of the information.
FUJITSU MICROELECTRONICS assumes no liability for any damages whatsoever arising out of the use of the information.
Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use
or exercise of any intellectual property right, such as patent right or copyright, or any other right of FUJITSU MICROELECTRONICS
or any third party or does FUJITSU MICROELECTRONICS warrant non-infringement of any third-party's intellectual property right or
other right by using such information. FUJITSU MICROELECTRONICS assumes no liability for any infringement of the intellectual
property rights or other rights of third parties which would result from the use of information contained herein.
The products described in this document are designed, developed and manufactured as contemplated for general use, including without
limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured
as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to
the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear
facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon
system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite).
Please note that FUJITSU MICROELECTRONICS will not be liable against you and/or any third party for any claims or damages arising
in connection with above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current
levels and other abnormal operating conditions.
Exportation/release of any products described in this document may require necessary procedures in accordance with the regulations of
the Foreign Exchange and Foreign Trade Control Law of Japan and/or US export control laws.
The company names and brand names herein are the trademarks or registered trademarks of their respective owners.
Edited: Business & Media Promotion Dept.
相关型号：
MB89PV470CF-101
Microcontroller, 8-Bit, EPROM, F2MC-8L CPU, 12.5MHz, CMOS, PQFP48, 0.80 MM PITCH, CERAMIC, MQFP-48
CYPRESS
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