S6E1A11C0AGV2 [CYPRESS]
32-bit Microcontroller FM0 Family;型号: | S6E1A11C0AGV2 |
厂家: | CYPRESS |
描述: | 32-bit Microcontroller FM0 Family 微控制器 |
文件: | 总3页 (文件大小:410K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
The following document contains information on Cypress products.
S6E1A1 Series
32-bit Microcontroller
FM0+ Family
Fact Sheet (Full Production)
S6E1A1 Series are highly integrated 32-bit microcontrollers designed for embedded controllers aiming at low
power consumption and low cost. S6E1A1 Series are based on the ARM Cortex-M0+ Processor with Flash
memory and SRAM, and has peripheral functions such as Motor Control Timer, ADC and Communication
Interfaces.
1.
FEATURES
2.
PRODUCT LINEUP
ARM Cortex-M0+ CPU Core
Processor version:r0p1
Clock
Part number
S6E1A11B0A
S6E1A11C0A
S6E1A12B0A
S6E1A12C0A
−
Parameter
Flash Memory
56K
6K
88K
6K
−
Maximum clock frequency:40MHz
(Byte)
RAM
(Byte)
Bit Band operation
−
Compatible with Cortex-M3 bit band operation
Base Timer:Max. 4 channels
Watch counter
Multi-function Timer:1 unit
3.
ORDERING INFORMATION
Package
Plastic・LQFP(0.8mm pitch), 32-pins
(FPT-32P-M30)
Part number
−
−
−
−
−
−
16-bit free-run timer ×3 channels
Input capture ×4 channels
Output compare ×6 channels
A/D activation compare ×6channels
Waveform generator ×3 channels
16-bit PPG timer ×3 channels
S6E1A11B0AGP2
S6E1A12B0AGP2
S6E1A11B0AGN2
S6E1A12B0AGN2
S6E1A11C0AGV2
S6E1A12C0AGV2
S6E1A11C0AGN2
S6E1A12C0AGN2
S6E1A11C0AGF2
S6E1A12C0AGF2
Plastic・QFN(0.5mm pitch), 32-pins
(LCC-32P-M73)
QPRC:1 channel
Dual Timer:1 unit
Plastic・LQFP(0.5mm pitch), 48-pins
(FPT-48P-M49)
Watch dog Timer:1 channel (SW) + 1 channel (HW)
Multi-function Serial Interface:Max. 3 channels
Plastic・QFN(0.5mm pitch), 48-pins
−
−
Selectable from UART/CSIO/LIN/I2C
FIFO in all channels
(LCC-48P-M74)
Plastic・LQFP(0.65mm pitch), 52-pins
Real Time Clock:1 unit
(FPT-52P-M02)
DMA Controller:2 channels
External Interrupt Controller Unit
−
−
External interrupt input pin:Max. 8 pins
Include one non-maskable interrupt (NMI)
4.
PACKAGE EXAMPLE OF
REFERENCE
12-bit A/D Converter:Max. 8 channels (1 unit)
Low Power Consumption Mode
− Sleep mode/Timer mode/RTC mode/Stop mode
Peripheral Clock Gating
General Purpose I/O port
−
−
−
S6E1A11B0A/S6E1A12B0A:Max. 23 pins
S6E1A11C0A/S6E1A12C0A:Max. 37 pins
All ports are Fast GPIO can be accessed by 1cycle
Built-in CR
Unique ID
Debug
Plastic ・ LQFP、48-pins
−
Serial Wire Debug Port (SW-DP)
Micro Trace Buffer(MTB)
(FPT-48P-M49)
−
Low Voltage Detector
Clock Supervisor
Power Supply:2.7 to 5.5V
Publication Number S6E1A_NP710-00001
Revision 1.0
Issue Date July 16, 2014
Copyright © 2013 Spansion. All rights reserved. Spansion®, the Spansion logo, MirrorBit®, MirrorBit® EclipseTM, ORNANDTM and combinations thereof, are
trademarks and registered trademarks of Spansion LLC in the United States and other countries. Other names used are for informational purposes only and
may be trademarks of their respective owners.
F a c t S h e e t
5.
BLOCK DIAGRAM
S6E1A11/S6E1A12
To PIN-Function-Ctrl
SWCLK,
SWDIO
SW-DP
Fast
GPIO
Cortex-M0+ Core
@40MHz(Max)
On-Chip SRAM
6 Kbyte
MTB
Bit Band
Wrapper
NVIC
Flash I/F
Security
On-Chip Flash
56 Kbyte/
88 Kbyte
System ROM
table
Dual-Timer
WatchDog Timer
(Software)
Clock Reset
Generator
INITX
WatchDog Timer
(Hardware)
DMAC
2ch.
CSV
CLK
Main
X0
X1
Source Clock
PLL
Osc
Sub
Osc
CR
4MHz
CR
100kHz
X0A
X1A
CROUT
AVCC,
AVSS
AVRH
(only 48/52pin
12-bit A/D Converter
Unit 0
Power-On
Reset
PKG)
ANxx
LVD
LVD Ctrl
ADTG
C
Regulator
IRQ-Monitor
Base Timer
16-bit 4ch./
32-bit 2ch.
TIOAx
TIOBx
Watch Counter
Real-Time Clock
AINx
BINx
ZINx
RTCCO,
SUBOUT
QPRC
1ch.
External Interrupt
Controller
8pin + NMI
INTx
NMIX
A/D Activation
Compare 6ch.
MD0
MODE-Ctrl
16-bit Input Capture
4ch.
IC0x
Low-speed CR
Prescaler
16-bit Free-run Timer
3ch.
FRCKx
To Fast GPIO
Peripheral Clock Gating
16-bit Output
Compare 6ch.
P0x,
P1x,
.
.
.
GPIO
PIN-Function-Ctrl
DTTI0X
RTO0x
Waveform Generator
3ch.
Pxx
SCKx
SINx
16-bit PPG
3ch.
Multi-function Serial I/F
3ch.
IGTRGx
SOTx
SCSx
(with FIFO)
Multi-function Timer
ARM and Cortex are the registered trademarks of ARM Limited in the EU and other countries.
2
S6E1A1_NP710-00001-1v0-E, July 16, 2014
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