ES51999中文资料_数据手册_规格书

ES51999

4 3/4 and 5 3/4 A/D AUTO

Features

Description

y External crystal oscillator

4MHz: count up to 44,000 counts

(input range: ±440mV)

The ES51999 is a 44,000/440,000-count

dual-slope analog-to-digital converter

(ADC) with X10 functions. The

ES51999 also include frequency and

duty cycle measurement. The conversion

10MHz: count up to 440,000 counts

(input range: ±440mV)

y Four selectable conversion rates:

20, 10, 5, 2 conversion/sec

rate

and

resolution

by

can

be

selected/decided

external

y On chip resistance switches for range

Changing.

microprocessor. In additional, other

functions are also provided for low

battery detection, on chip buzzer driving,

and I/O port with microprocessor.

y Voltage (DC/AC), current(DC/AC), resistor,

diode, frequency and duty cycle measurement

y 400mV independent input

y on chip OP amp’ for AC/DC conversion

y Auto zeroing function

y X10 function

y I/O port for microprocessor

y 400MHz Frequency counter and 1MHz duty

cycle measurement

y On chip buzzer driving: 2KHz

y Single 5V DC power supply (V+ to V-)

y Low battery detection

y SLEEP mode

y 64-pin QFP

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4 3/4 and 5 3/4 A/D AUTO

Absolute Maximum Ratings

Characteristic

Rating

Positive Supply Voltage

(V+ to AGND)

3.5V

Negative Supply Voltage

(V- to AGND)

-3.5V

Analog I/O Voltage

Digital I/O Voltage

Power Dissipation

Operating Temperature

Storage Temperature

Lead Temperature

(soldering, 10sec)

((V-) - 0.5V) to ((V+) + 0.5V)

800mW

0°C to 70°C

-25°C to 125°C

270°C

Electrical Characteristics

TA=25°C, DGND=AGND=0V

Symbol Parameter

Test Condition

Min. Typ. Max. Unit

V+

Positive Power Supply

2.3

-2.3

-

2.5

-2.5

1.0

2.7

-2.7

1.7

V

V-

Negative Power Supply

Operation

I(V+)

Normal power on (V+ to V-)

mA

Supply Current

I(GND) Supply Current of DGND

to V-

Zero

5

10

0

-

mA

∆V between DGND and V- is -

0.2V

Zero Input Reading

-0

+0

count

1 MΩ input resistor, null to zero

by uP.

NLV1

REV1

Nonlinearity (Voltage x1) Best case straight line

-0.01

-

0.01 %F.S.

Rollover Error

(Voltage x1)

1 MΩ input resistor

NLV10 Nonlinearity

(Voltage x10)

Best case straight line

1 MΩ input resistor

-0.1

-

0.1 %F.S.

REV10 Rollover Error

(Voltage x10)

V12

Band Gap Voltage

Reference

-1.31

-1.23 -1.10

V

100 kΩ between V12 and AGND

LBATT Low Battery Detection

TCRF

LBATT to V12

100 kΩ between V12 and AGND

(0°C to 70°C)

-60

-

0

50

60

-

mV

ppm/°C

Reference Voltage (V12)

Temperature Coefficient

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Pin configuration

QFP-64pin

S

T

O

S

L

A

S

A A D

B

T V E

U C O

S C C

C

L

K

C

4

G G G

A

N N N V V

D D D - -

T V V

T + +

M

60

55

CAZ

1

5

OSC2

OSC1

BUZOUT

BUZIN

NC

RAZ

50

CINT

BUF

BUFX10

Cref-

FREQ

NC

Cref+

45

40

35

NC

IVSH

IVSL

TEST5

ACVL

ACVH

ADI

NC

10

15

NC

VR

ADO

NC

VRH

NC

OVX

OVH

NC

20

25

30

O O V V V V N S N V N V N

V R R R R R C G C R C 4 C

S

N

D

0

1 5 4 3 2

1

0

G

m

Pin Description

Pin No. Symbol Type Description

1

2

CAZ

RAZ

O

Auto-zero capacitor connection

Auto-zero resistance connection

Integration capacitor connection

Integration resistor connection output

3

CINT

BUF

4

5

BUFX10

Cref-

6

I/O Negative connection for reference capacitor

I/O Positive connection for reference capacito

7

Cref+

IVSH

IVSL

TEST5

ACVL

ACVH

ADI

9

I

High current measurement input

Low current measurement input

10

11

12

13

14

15

I/O Test Pin

O

I

Negative output of AC to DC converter

Positive output of AC to DC converter.

Negative input of internal AC to DC OpAmp

Output of internal AC to DC OpAmp.

ADO

O

Continued on next page

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Pin No. Symbol Type Description

17

18

20

21

22

23

24

25

27

29

31

37

38

46

48

49

OVX

OVH

OVSG

OR1

I

Input high voltage for resistance measurement.

Output connection for resistance measurement.

Sense low voltage for resistance measurement.

Reference resistor connection for 399.9Ω range.

Voltage measurement ÷ 10000 attenuator (4000V.)

Voltage measurement ÷ 1000 attenuator (400.0V.)

Voltage measurement ÷ 100 attenuator (40.00V.)

Voltage measurement ÷ 10 attenuator (4.000V.)

I

O

VR5

VR4

VR3

VR2

O

SGND

G

Signal Ground.

VR1

I

Measurement input.

V400m

VRH

I

400mV independent input.

O

I

Output of band-gap voltage reference. Typically -1.2V

Reference input voltage connection. Typically -200mV

Frequency counter input, offset to V-/2

Enables the buzzer. Low action.

VR

FREQ

BUZIN

BUZOUT

I

O

Outputs a 2KHz audio frequency signal for driving piezoelectric buzzer

when BUZIN is low.

50

51

52

53

OSC1

OSC2

EOC

I

O

I

Crystal oscillator input connection.

Crystal oscillator output connection.

End of conversion indicator

VCC

The high level of digital I/O signals, which is connected to VCC pin of

microprocessor.

54

STATUS

I/O ES51966 sends current status to microprocessor or receives controlled

status from microprocessor.

I

P

G

55

56

57

58

59

SCLK

OSC4M

V-

Clock input from microprocessor.

Crystal oscillator selection. NC for 4MHz; connect to V- for 10MHz.

Negative supply voltage, connected to cathode of battery typically..

Negative supply voltage, connected to cathode of battery typically.

Digital Ground ( Output of on-chip DC-DC converter ),

V-

DGND

V

_DGND= ( V+ - V- ) / 2

60

61

AGND

V+

G

P

I

Analog Ground

62

Positive supply voltage

Low battery voltage detection

63

V+

64

LBATT

Pin No. :

8 , 16 , 19 , 26 , 28 , 30 , 32-36 , No connected

39-45 , 47

P: Power,

G: Ground,

I: Input,

O: Output

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Operation `Mode

(1) Digital Interface between ES51999 and Microprocessor

The EOC, SCLK and STATUS of the ES51999 are used as digital communicating

interface between ES51999 and microprocessor. The STATUS pin is bi-directional, and

the others are unilateral: EOC is from ES51999 to microprocessor and SCLK is from

microprocessor to ES51999. The timing and data of the communication are as follows:

mode 1: ES51999 receives controlled status from microprocessor.

Force A/D entering into AZ phase

t₆

t₁

t₇

(VCC)

(V-)

SCLK(I)

START

END

t₄

t₂

t₃

t₅

t₈

E

t₉

(VCC)

(V-)

STATUS(I/O)

status

A

B C

D

F

Timing of the above figure:

(T = 0.25µs)

t₁(1040 ~ 4096) T

t₆(32 ~ 512) T

t₂512 T

t₇(520 ~ 1020) T

t₈(0 ~ 256) T

t₉520 T

t₃(4 ~ 256) T

t₄> 4 T

t₅(16 ~ 1024) T

Note: 1. At START:

After time A, ES51999 enter into AZ phase. And at the same time, STATUS is

changed from output pin to input pin with a 3uA pull low current provided by

ES51999 internally. Then microprocessor can send control status to STATUS. It

is suggested that micro-processor begins to drive STATUS between B and C.

2. At END:

The microprocessor stopped driving STATUS between D and E, and ES51999

will begin to drive STATUS after F.

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3. The detail timing between SCLK and STATUS is as follow:

(32 ~ 512)T with 30 ~ 70% duty cycle

(VCC)

(V-)

SCLK

(VCC)

(V-)

STATUS

S₀

S₁

S_n-1

S_n

S₁₄

Serial Data Format (STATUS):

F0

0

F1

1

F2

2

Q0

3

Q1

4

Q2

5

C0

6

C1

7

C2

8

AC

9

ZERO

10

PEAK

11

PHCAL

12

X10

13

SLEEP

14

(All defaults are ‘0’)

F0, F1, F2 measurement selection.

F0

0

F1

0

F2 Measurement

0

1

0

1

0

1

0

Voltage²

0

Voltage with frequency³

Current²

0

1

0

1

Current with frequency³

Resistance

1

0

1

0

Diode

1

Frequency and duty cycle¹

1

In Frequency and duty cycle measurement, ES51999 measures both the

frequency and duty cycle of the input signal FREQ (pin 45) simultaneously.

²In Voltage/Current measurement, only voltage/current is measured.

3

In Voltage/Current with frequency measurement, the frequency of FREQ is

also measured in addition to voltage/current. Detailed descriptions of these

measurement modes, please see the following sections.

Q0, Q1, Q2 range selection.

Q0 Q1 Q2

V¹

A¹

F^{2 3}

Ω¹

0

1

0

1

0

1

0

1

0

1

0

1

0

1

440mV

IVSH (pin 9)⁴

40Hz

420Ω

4.4V IVSL (pin 10) ⁴

400Hz

4KHz

4.2KΩ

42KΩ

420KΩ

4.2MΩ

42MΩ

44V

440V

4400V

40KHz

400KHz

4MHz

40MHz

400MHz

¹When oscillator is 4MHz, voltage/current can be counted up to 44,000, and resistance

can be counted up to 42,000.

When oscillator is 10MHz, voltage/current can be counted up to 440,000, and resistance

can be counted to 420,000.

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²Frequency measurement could only be counted up to 40,000 regardless the oscillator

frequency.

³In 40Hz range, ES51999 can count from 0.5Hz to 40Hz; in 400Hz range, it can count

from 2.5Hz to 400Hz; in 4000Hz, it can count from 25Hz to 4000Hz.

4

In Current measurement, two input pins (IVSH and IVSL) are provided and can be

selected by Q2.

C0, C1, C2 In voltage (F[0:2] = “000”) and current (“010”) measurement, C0 & C1

are used for conversion rate selection:

C0

0

C1

1

Conversion/sec

Conversion period

50ms

20

10

5

0

100ms

1

0

1

200ms

500ms

2

10, 5, and 2 conversion/sec are 50Hz rejection, while 2 conversion/sec is

60Hz rejection.

In resistance measurement, the conversion period is:

C0

0

C1 Conversion period

1

0

1

70ms

140ms

280ms

700ms

0

1

In frequency and duty cycle (F[0:2] = “110”) measurement, only C0 is used

for conversion period selection. When the range is from 40Hz to 4000Hz, the

conversion periods are not selectable (see the description in Frequency and

duty cycle measurement); and when the range is from 40KHz to 400MHz, the

conversion period is decided by C0:

C0 Conversion period

0

1

110ms

1.1s

In voltage/current with frequency mode (F[0:2] = “001” and “011”), the

conversion period is fixed at 110ms, and C0, C1 & C2 decide the range of the

frequency measurement:

C0

0

C1

-

C2

-

Range

40KHz

400KHz

4MHz

40MHz

400MHz

1

0

1

0

1

0

1

AC ‘L’ for DC; ‘H’ for AC in Voltage/Current measurement. If not in voltage or

current measurement, this bit will be ignored.

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4 3/4 and 5 3/4 A/D AUTO

ZERO ‘H’ for zero calibration.

X10 ‘H’ for X10 function.

SLEEP ‘H’ for DMM in sleep mode.

mode 2: ES51999 sends the status and counts ( counter from DINT ) to uP.

one conversion period

t₀

(VCC)

(V-)

EOC(O)

t₂

t₁

(VCC)

(V-)

SCLK(I)

(VCC)

(V-)

STATUS(O)

status & counts

t₀is at least 5ms and t₁must be (32 ~ 512)T, where T = 0.25µs.

t₂is the time from the rising edge of EOC to the last data been transferred. t₂is no

more than 4.9ms. That is, all results must be transferred within 4.9ms from the

rising edge of EOC.

The detail timing between SCLK and STATUS is as follow:

(32 ~ 512)T with 30 ~ 70% duty cycle

(VCC)

SCLK

(V-)

(VCC)

(V-)

STATUS

S₀

S₁

S_n-1

S_n

S_final

Serial Data Format (STATUS):

- Voltage (“000”), current (“010”), resistance (“100”) and diode (“101”)

measurement

SIGN

0

1

BATT

2

D0<0:19> (20 bits)

22

3

~

SIGN ‘H’ for negative; ‘L’ for positive. In AC, Ω and diode measurement, this bit

can be ignored.

BATT ‘H’ for battery-low indication.

D0<0:19> Conversion results (magnitude). The format is binary code. LSB outputs

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first. When oscillator is 4MHz, D0<0:19> is up to 44,000 counts. When oscillator

is 10MHz, if the conversion rate is 20/sec, it counts to 220,000; if the conversion

rate is not 20/sec, it counts to 440,000.

-

- Voltage/current with frequency (“001” & “011”) measurement:

SIGN

0

1

BATT

2

D0<0:19> (20 bits)

22

D1<0:17> (18 bits)

23 40

3

~

SIGN For voltage/current measurement. ‘H’ for negative; ‘L’ for positive. In AC, Ω

and diode measurement, this bit can be ignored.

BATT ‘H’ for battery-low indication.

D0<0:19> Conversion result of voltage or current measurement.

D1<0:17> Conversion result of frequency measurement.

- Frequency (“110”) measurement:

OL

0

UL

1

BATT

2

D0<0:19> (20 bits) D1<0:17> (18 bits)

22 23 40

D2<0:5> (6 bits)

41 46

3

~

OL Overflow when in 40, 400 and 4000Hz ranges.

UL Underflow when in 40, 400 and 4000Hz ranges.

BATT ‘H’ for battery-low indication.

D0<0:19>, D1<0:17>, D2<0:5> Please see the description in frequency and duty

cycle measurement.

(2) Dual Slope A/D—four phases timing

The ES51999’s measurement cycle contains four phases, ZI, AZ, INT, and DINT.

The timing will be changed as conversion rate changed. There are some examples as

follow, and the others are alike.

ES51999 is a dual-slope analog-to-digital converter (ADC). Figure 2.1 is a

structure of dual-slope integrator. Its measurement cycle has two distinct phases: input

signal integration (INT) phase and reference voltage integration (DINT) phase.

In INT phase, the input signal is integrated for a fixed time period, then A/D enters

DINT phase in which an opposite polarity constant reference voltage is integrated until

the integrator output voltage becomes to zero. Since both the time for input signal

integration and the reference voltage are fixed, the de-integration time is proportional to

the input signal. Hence, we can define the mathematical equation about input signal,

reference voltage integration (see Figure 2.1):

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4 3/4 and 5 3/4 A/D AUTO

T_INT

1

V_IN(t)dt =

×V_REF×T_DINT

∫

0

Buf × C int

where, V_IN(t) = input signal

V_REF= reference voltage

T_INT= integration time (fixed)

T_DINT= de-integration time (proportional toV_IN(t) )

If V_IN(t) is a constant, we can rewrite above equation:

T_INT

T_DINT

=

×V_IN

V_REF

Besides the INT phase and DINT phase, ES51999 exploits auto zero (AZ) phase and zero

integration (ZI) phase to achieve accurate measurement. In AZ phase, the system offset is

stored. The offset error will be eliminated in DINT phase. Thus a higher accuracy could

be obtained. In ZI phase, the internal status will be recovered quickly to that of zero input.

Thus the succeeding measurements won’t be disturbed by current measurement

especially in case of overload.

Cint

input

signal

Buf

Raz

reference

voltage

integrator

output

input signal < 0

input signal > 0

different

input

integration

time

fixed slope

different

input

integration

time

Fixed

integration deintegration

time time

Variable

Fixed

integration deintegration

time time

Variable

Figure 2.1 the structure of dual-slope integrator and its output waveform.

As mentioned above, the measurement cycle of ES51999 contains four phases:

(1) auto zero phase (AZ)

(2) input signal integration phase (INT)

(3) reference voltage integration phase (DINT)

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(4) zero integration phase (ZI)

Normally, the time ratios of these four phases, AZ, INT, DINT and ZI to the entire

measurement cycle are 20%, 20%, 44% and 16% respectively. However the actual

duration of each phase depends on conversion rate. The time of each conversion rate are

shown in the table below in which voltage/current (without PEAK HOLD or frequency),

and diode measurement use this conversion time.

C[0:1]

01

CR (times/sec)

ZI (ms)

AZ (ms)

10

INT (ms)

10

DINT (ms)

20

10

5

8

22

44

00

16

32

80

20

10

40

88

11

2

100

220

Note: Vref = -200 mV.

(3) Component Value Selection for ADC

For various application requirements on conversion rate and input full range, we

suggest nominal values for external components of ADC in Figure 2.1 to obtain better

performance. Under default condition with operating clock = 4 MHz:

(1) conversion rate = 10 times/sec

(2) reference voltage = -200 mV

(3) input signal full scale = 440 mV (sensitivity = 10 uV)

we suggest that Cint = 33 nF, Buf = 200 kΩ, BufX10=20K

If a user selects a different conversion rate rather than default, the integration capacitor

Cint value must be changed according to the following rule for better performance:

Cint × (conversion rate) = (33 nF) × (10 times/sec).

It is important that the actual Cint value should be no less than the nominal value. A

smaller Cint reduces the input full range. However a larger Cint might have weaker noise

immunity than the suggested one.

A user could enlarge the input full range by changing reference voltage (Vref) and the

amount of integration resistor (Buf and Raz). For example, if Vref, Buf and Raz are

enlarged as twice than the default values then the input full range becomes 880 mV. The

input full range can be enlarged up to 1.1V (2.5 times than the default case). We list

general rules in below which might be helpful in determining component values.

Buf / (reference voltage) = 200 kΩ / (-200 mV)

(4) Voltage Measurement

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DC/AC voltage measurement

A re-configurable voltage divider provides a suitable full-scale range voltage

measurement mode. The following table summarizes the full-scale ranges in each

configuration.

Configuration

VR1

Full Scale Range

440.00mV

4.4000V

Divider Ratio

1

Resister Connection

-

VR2

1/10

R2 / (R1+R2)

R3 / (R1+R3)

R4 / (R1+R4)

R5 / (R1+R5)

VR3

44.000V

1/100

1/1000

1/10000

VR3

440.00V

4400.0V

VR5

In configuration VR1, the full range is 440mV, and the voltage inputs from V400m pin to

prevent the influence of noise when floating. In other configurations, the voltage inputs

from VR1 pin.

Pin 19 to 23 are used for AC measurement. Figure 4.1 is the AC-to-DC circuit. AC-

to-DC circuit extracts the AC part of the voltage (ADO - TEST5). ADC then converts the

voltage of (ACVH – ACVL) to acquire the AC value of input voltage. Variable resistor

5KΩ is used to adjust the DC offset. Light shielding for diode D1 and D2 is required to

prevent leakage current. This circuit works properly only when the input voltage is

sinusoidal. If the input is not sinusoidal (e.g., square waves), a true RMS-to-DC

converter chip will be needed to obtain the correct true RMS value of input signal.

If ADO and ADI short directly, ADI is the divided voltage of the input signal.

Therefore, it can be used for oscillator display.

AGND

OVSG

100

1K

OR1

VR5

VR4

VR3

VR2

10K

101

K

1.11M

ADO

0.47u

D2

D1

88M

ADI

ACVH

ACVL

TEST5

15K

0.1u

1u

15K

1u

10K

V

R

1

V

R

5K

10M

-100mV

Voltage input

Figure 4.1 AC-to-DC circuit

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The measurement of true RMS using ES636

If ES636 is used for true RMS measurement, the suggested application circuit is shown

in Figure 4.2. When ES636 is used for true RMS, ADO and ADI pin short together,

TEST5 pin keeps floating, and ACVL pin connects to SGND. And the OVSG pin short

to AGND through a switch.

Connect Pin 2 to –Vs for normal operation,

OVSG

or connect it to +Vs for sleep mode

ACV

100

1K

OR1

VR5

VR4

VR3

VR2

+Vs

-Vs

10K

101K

1.11M

Cav

14

13

1

2

3

4

5

6

7

+Vs

ACVL

ACVH

200

-Vs

12

11

10

+Vs

ADI

ADO

150

470K

9

8

500K

-Vs

Figure 4.2 AC-to-DC circuit using ES636

(5) Diode Measurement

Diode measurement mode shares the same configuration with 4.4000V

voltage mode. The range select bits Q0, Q1 and Q2 are not active in this

mode.

(6) Current measurement

Current measurement has three mode. The following table summarizes the full scale

range of each mode.

Mode

Range Selection

IVSL/IVSH

IVSH

Full scale

uA

440.00uA/4400.0uA

44.000mA/440.00mA

44.000A

mA

10A

*Operation Mode is based on application circuit .

*Range selection : IVSL ( Q0,Q1,Q2 ) = ( 0,0,0 )

IVSH ( Q0,Q1,Q2 ) = ( 0,0,1 )

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(7) Multiplying by 10 (X10) Function

ES51999 includes X10 function. In X10 function mode, the output will be increasing

tenfold. But the input range will be reduced to ±44mV. For example, if X10 function is

enabled and the input is 10mV, output will be 10,000 counts, rather than 1,000 counts. To

achieve X10 function, the integration resistor is 20KΩ, not 200KΩ at INT phase, and

remains 200 kΩ at DINT phase. Because the resistor (20KΩ) requires exactly 1/10 of

200K

BUF

BUFX10

VR

18K

Figure 5.1 X10 function

integration resistor (200KΩ), a variable resistor Rx is used to compensate these two

resisters.

Resistor scheme of AZ/INT/DINT phases

In ES51999, an on-chip resistor is used for AZ mode. The internal chip is about 10 kΩ.

The connection is shown in the following Figure 5.2.

ES51999

CINT(5)

CAZ(6)

200K

20K

BUF(7)

A

B

BUFX10(8)

Rx

RAZ(9)

C

10K

Figure 5.2 Resistor scheme of AZ phase

The status of switches A, B and C are described in the following table.

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X10 function is OFF

X10 function is ON

switch INT phase DINT phase AZ phase INT phase DINT phase AZ phase

A

B

C

ON

OFF

ON

OFF

ON

OFF

ON

OFF

ON

OFF

In AZ phase, all the switches is ON, the effective resistor is all the resistors in parallel.

The effective resistor is therefore less than 10 kΩ. If X10 function is never used, the

matching between 200 kΩ and (Rx + 20 kΩ) is not necessary. In this situration, (Rx + 20

kΩ) can be replaced by a resistor about 20 kΩ, or simply omitted.

(8) ZERO Calibration

In ES51999, the inherent delay of the OPAMP will introduce a few counts to the output.

The method to prevent this problem is zero calibration. When zero calibration is ON,

ES51999 shorts the input to SGND internally. uP needs to save the results of zero input.

After zero calibration is OFF, the result of zero input is then deducte from the counts of

the following measurements.

Zero calibration can be enabled on any measurement. When the ZERO bit is set by

uP, ES51999 begins to execute zero calibration. ES51999 stops executing zero

calibration until the ZERO bit is reset by uP.

In voltage/current/diode/capacitance measurement, the de-integration voltage is fixed,

therefore zero calibration needs only be enabled once. The results could be used for all

the following voltage/current/diode/capacitance measurement. However, in resistance

measurement, the de-integration voltage is not fixed, and varies with the resistance to be

measured. That is, zero calibration must be re-done if the resistance to be measured

changes. For convenience, the result of zero input in voltage measurement could be used

in resistance measurement.

(9)Frequency and duty cycle

When F[0:2] = “110”, ES51999 calculates frequency and duty cycle of FREQ at the same

time. However, some more computations are required to obtain both the results. There

are three output data at this measurement: D0, D1, and D2 which can be obtained from

the serial output.

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ES51999

4 3/4 and 5 3/4 A/D AUTO

▪ 40Hz range:

Frequency =

(D2+1)×10⁶

5×(150,950+D1)

100×D0

150950+D1

%

, Duty cycle =

▪ 400Hz range

Frequency =

(D2+1)×10⁶

100×D0

%

,

Duty cycle =

150,950+D1

100×D0

▪ 4000Hz range

Frequency =

(D2+1)×10⁷

%

,

Duty cycle =

150,950+D1

▪ 40KHz to 400MHz range (D2 is not needed.)

when C[0] = 0

D0

%

Frequency = 10×D1 ,

when C[0] = 1

Frequency = D1 ,

Duty cycle =

200

D0

Duty cycle =

200

ES51999 can measure frequency from 0.5Hz to 409.6MHz. For each range, the

measurable frequencies and resolution are shown in the following table:

Range Measured frequency range Resolutions

40Hz 0.5Hz ~ 40Hz

400Hz 2.5Hz ~ 400Hz

4000Hz 25Hz ~ 4000Hz

40KHz 0 ~ 40.96KHz

400KHz 0 ~ 409.6KHz

4MHz 0 ~ 4.096MHz

40MHz 0 ~ 40.96MHz

400MHz 0 ~ 409.6MHz

0.001Hz

0.01Hz

0.1Hz

1Hz

10Hz

100Hz

1KHz

10KHz

At 40/400/4000Hz, if the input frequency is less than its measurable range, it’s underflow,

and UL will set to ‘H’. At the same ranges, if the input frequency is greater than its

measurable range, it’s overflow, and OL will set to ‘H’. When UL or OL occur, the data

D0, D1, and D2 will not be correct, please ignore them. At 40KHz ~ 400MHz ranges, OL

and UL are always ‘L’, but it’s overflow when the output counts is 40,960.

At different range, the conversion time is different. At 40/400/4000Hz, the conversion

time is according to the input frequency. At other ranges, the conversion time is fixed at

110ms or 1.1s with C[0] = 0 or 1, respectively.

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ES51999

4 3/4 and 5 3/4 A/D AUTO

Conversion time

C[0] = 0 C[0] = 1

Range

40Hz

400Hz

0.8s ~ 2s

0.16s ~ 0.4s

4000Hz

40KHz

400KHz

4MHz

110ms

1.1s

110ms

40MHz

400MHz

(10)Voltage/Current Measurement with Frequency Counter

When F[0:2] = “001” or “011”, ES51999 measures frequency of input together with

voltage/current. At this measurement mode, voltage (or current) input is VR1/400mV (or

IVSH/IVSL), and frequency input is FREQ. Q[0:2] is the range of voltage/current

measurement, and C[0:2] is the range of frequency measurement. Only 40K to 400MHz

ranges are selectable here. Unlike frequency measurement (F[0:2] = “110”), duty cycle is

not measured in this mode. The conversion time is fixed at 110ms. Voltage/current can

count up to 54,000 (or 540,000 when 10MHz OSC is used). AC and PEAK can still be

active. D0 is the output of voltage/current, and (10×D1) is the result of frequency.

(11) SLEEP mode

If SLEEP bit is set ‘H’ by uP, ES51999 enters sleep mode. In sleep mode, if SCLK keeps

low, all the circuit is shut down, and the supply current is about 0.1uA. If SCLK is high

in sleep mode, only the oscillator is active to prepare for the following re-power

operation.

(12) Digital Signals Rising and Falling times

The digital signals include EOC, SCLK, and STATUS, and those rising and falling times

are defined as follow:

EOC and STATUS are output to microprocessor:

V+

(V-)+2.1V

(V-)+0.8V

V-

tfo

tro

17

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ES51999

4 3/4 and 5 3/4 A/D AUTO

SCLK and STATUS are input from microprocessor:

Vcc

(V-)+2.1V

(V-)+0.8V

Vss

tfi

tri

Note: Vss = V-

Symbol Condition

Min

Max

20

Units

ns

tro

tfo

tri

A/D to uP

uP to A/D

-

20

ns

20

ns

tfi

18

07/07/06

ES51999

4 3/4 and 5 3/4 A/D AUTO

Testing Circuit

820K

+

0.1u

5V

9V

Vc

Regulator

7.5V

+

900

uA

180K

+

⁺10u

0.1u

4.7u

uA

DGND

AGND

V-

OSC4M

SCLK

Vss Vc

0.1u

mA

4.7u²

+

90

8051

serial

V+

9

mA

STATUS

LB

A

T

CAZ

RAZ

VCC

EOC

OSC2

0.47u

33n

0.99

10A

CINT

BUF

OSC1

BUZOUT

BUZIN

FREQ

NC

200K

0.01

SGN

V-

5.6V

BUFX10

Cref-

Cref+

IVSH

IVSL

5K 18K

470n

100K

200 2.2u

1.5K

PTC

NC+

NC-

NC

VR

VRH

NC

100K

10K

15K₊

5K

TEST5

ACVL

ACVH

ADI

15K

0.1u

1u

+

88M

D1

D2 0.47u

100K

91K 20K

ADO

+

OVX

OVH

1u

220pF

100

1.5K

PTC

OVSG

OR1

C R

100

1K

NC

V400m

VR1

NC

SGND

100K

10M

VR5

VR4

Zener 6V

10K

101K

VR3

1.11M

VR2

19

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ES51999

4 3/4 and 5 3/4 A/D AUTO

Note:

1.In PEAK mode, the wire of SCLK STATUS EOC must be shielded to prevent

from the noise.

2.For the X10 feature, the BuffX10 resistor must be precisely adjusted to a tenth

part of the Buffer resistor or the additional error will rice. (R_buff= 10 R_buffX10

)

3.If use the AC-to-DC circuit as above schematic, the reading out will get a minus

sign. Please ignore the minus sign instead of displaying. And the polarity of diode

must not be changed.

4.The Zener Diodes are used for IC protection, and MUST be soldered on PCB first

before soldering IC.

1. Tantalum capacitor

2. Tantalum capacitor

20

07/07/06

ES51999

4 3/4 and 5 3/4 A/D AUTO

Packag^e

64 pins QFP package size

21

07/07/06

型号	制造商	描述	价格	文档
ES51C1	ECLIPTEK	OSCILLATOR	获取价格
ES51C1A10N-10.000M	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 10 MHz, ROHS COMPLIANT, CERAMIC, SMD, 10 PIN	获取价格
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ES51C1A10N-10.245MTR	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 10.245 MHz, ROHS COMPLIANT, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-11.0592M	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 11.0592 MHz, ROHS COMPLIANT, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-12.352M	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 12.352 MHz, ROHS COMPLIANT PACKAGE, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-12.352MTR	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 12.352 MHz, ROHS COMPLIANT PACKAGE, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-13.560M	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 13.56 MHz, ROHS COMPLIANT, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-14.000MTR	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 14 MHz, ROHS COMPLIANT, CERAMIC, SMD, 10 PIN	获取价格
ES51C1A10N-14.745M	ECLIPTEK	TCXO, CLIPPED SINE OUTPUT, 14.745 MHz, ROHS COMPLIANT PACKAGE, CERAMIC, SMD, 10 PIN	获取价格

ES51999

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