MTE130N20KF3 [CYSTEKEC]

N-Channel Enhancement Mode Power MOSFET;


型号：	MTE130N20KF3
厂家：	CYSTECH ELECTONICS CORP.
描述：	N-Channel Enhancement Mode Power MOSFET
文件：	总9页 (文件大小：344K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 1/9

N-Channel Enhancement Mode Power MOSFET

MTE130N20KF3

BVDSS

200V

18A

143mΩ

RDSON(TYP) @ VGS=10V, ID=9A

Features

• Low Gate Charge

• Simple Drive Requirement

• ESD Diode Protected Gate

• Fast Switching Characteristic

• Pb-free lead plating and RoHS compliant package

Equivalent Circuit

Outline

TO-263

MTE130N20KF3

D S

G：Gate D：Drain S：Source

Ordering Information

Device

Package

TO-263

Shipping

800 pcs / Tape & Reel

MTE130N20KF3-0-T7-S

(Pb-free lead plating and RoHS compliant package)

Environment friendly grade : S for RoHS compliant products, G for RoHS compliant

and green compound products

Packing spec, T7 : 800 pcs / tape & reel, 13” reel

Product rank, zero for no rank products

Product name

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 2/9

Absolute Maximum Ratings (TC=25°C, unless otherwise noted)

Parameter

Symbol

Limits

Unit

Drain-Source Voltage

Gate-Source Voltage

VDS

VGS

200

±20

2.4

1.9

Continuous Drain Current @ TC=25°C(silicon limit)

Continuous Drain Current @ TC=100°C(silicon limit)

Pulsed Drain Current

Continuous Drain Current @ TA=25°C

Continuous Drain Current @ TA=70°C

Avalanche Current

(Note 3)

(Note 2)

(Note 3)

IDM

IDSM

IAS

Avalanche Energy @ L=100μH, ID=10A, VDD=50V (Note 2)

EAS

TC=25°C

TC=100°C

TA=25°C

TA=70°C

(Note 1)

(Note 2)

125

62.5

Power Dissipation

PDSM

1.3

Operating Junction and Storage Temperature

Tj, Tstg

-55~+175

°C

Thermal Data

Parameter

Thermal Resistance, Junction-to-case, max

Thermal Resistance, Junction-to-ambient, max, t≤10s (Note 2)

Thermal Resistance, Junction-to-ambient, max

Symbol

Rth,j-c

Value

1.2

Unit

°C/W

Rth,j-a

(Note 2)

62.5

Note : 1 The power dissipation P_Dis based on T_J(MAX)=175 C, using junction-to-case thermal resistance, and is more useful

in setting the upper dissipation limit for cases where additional heatsinking is used.

2 The value of R_θJAis measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air

environment with T_A=25 C. The power dissipation P_DSMis based on R_θJAand the maximum allowed junction

temperature of 150°C. The value in any given application depends on the user’s specific board design, and the

maximum temperature of 175°C may be used if the PCB allows it.

3 Repetitive rating, pulse width limited by junction temperature T_J(MAX)=175 C. Ratings are based on low frequency

and low duty cycles to keep initial TJ=25°C.

4. The maximum current limited by package is 60A.

5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.

6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 3/9

Characteristics (TC=25°C, unless otherwise specified)

Symbol

Static

Min.

Typ.

Max.

Unit

Test Conditions

BV_DSS

∆BV_DSS/∆Tj

V_GS(th)

200

0.2

3.2

4.0

V/°C

V_GS=0V, I_D=250μA

2.0

Reference to 25°C, I_D=250μA

V_DS= V_GS, I_D=250μA

V_DS=10V, I_D=9A

G_FS

I_GSS

V_GS= 20V

μA

V_DS=180V, V_GS=0V

V_DS=180V, V_GS=0V, Tj=125°C

V_GS=10V, I_D=9A

I_DSS

*R_DS(ON)

Dynamic

*Qg

143

185

5.5

9.4

972

V_DS=160V, I_D=18A, V_GS=10V

V_DS=100V, I_D=18A, V_GS=10V, R_G=6

V_GS=0V, V_DS=25V, f=1MHz

*Qgs

*Qgd

*t_d(ON)

*tr

*t_d(OFF)

*t_f

Ciss

Coss

Crss

Source-Drain Diode

*I_S

*I_SM

*V_SD

*trr

1.2

0.87

260

I_S=18A, V_GS=0V

I_F=18A, V_GS=0, dI_F/dt=100A/μs

*Qrr

*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 4/9

Typical Characteristics

Brekdown Voltage vs Ambient Temperature

Typical Output Characteristics

1.4

1.2

10V,9V,8V,7V,6V

0.8

0.6

0.4

I_D=250 A,

V_GS=0V

V_GS=4V

-75 -50 -25

25 50 75 100 125 150 175

V_DS, Drain-Source Voltage(V)

Tj, Junction Temperature(°C)

Static Drain-Source On-State resistance vs Drain Current

Reverse Drain Current vs Source-Drain Voltage

1000

100

1.2

V_GS=0V

V_GS=4.5V

Tj=25°C

0.8

0.6

0.4

0.2

V_GS=6V

Tj=150°C

V_GS=10V

0.01

0.1

100

I_D, Drain Current(A)

_DR, Reverse Drain Current(A)

Drain-Source On-State Resistance vs Junction Tempearture

Static Drain-Source On-State Resistance vs Gate-Source

Voltage

1000

2.8

2.4

I_D=9A

900

800

700

600

500

400

300

200

100

V_GS=10V, I_D=9A

1.6

1.2

0.8

0.4

R_DS(ON)@Tj=25°C : 143mΩtyp.

-75 -50 -25

25 50 75 100 125 150 175

_GS, Gate-Source Voltage(V)

Tj, Junction Temperature(°C)

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 5/9

Typical Characteristics(Cont.)

Threshold Voltage vs Junction Tempearture

Capacitance vs Drain-to-Source Voltage

1.4

1.2

10000

1000

100

I_D=1mA

Ciss

0.8

0.6

0.4

0.2

oss

I_D=250 A

Crss

-75 -50 -25

25 50 75 100 125 150 175

0.1

100

V_DS, Drain-Source Voltage(V)

Tj, Junction Temperature(°C)

Forward Transfer Admittance vs Drain Current

Gate Charge Characteristics

100

V_DS=100V

V_DS=40V

V_DS=160V

V_DS=10V

0.1

Ta=25°C

Pulsed

I_D=18A

0.01

0.001

0.01

0.1

100

I_D, Drain Current(A)

Qg, Total Gate Charge(nC)

Maximum Drain Current vs Case Temperature

Maximum Safe Operating Area

100

R_DSON

Limited

10μs

100 s

1ms

10ms

T_C=25°C, Tj=175°C

0.1

0.01

V_GS=10V, _JC=1.2°C/W

θJC

V_GS=10V, R =1.2°C/W

Single Pulse

100

125

150

175

0.1

100

1000

V_DS, Drain-Source Voltage(V)

T_C, Case Temperature(°C)

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 6/9

Typical Characteristics(Cont.)

Single Pulse Power Rating, Junction to Case

Typical Transfer Characteristics

2000

1800

1600

1400

1200

1000

800

V_DS=10V

T_J(MAX)=175°C

T_C=25°C

_JC=1.2°C/W

600

400

200

0.0001

0.001

0.01

Pulse Width(s)

0.1

_GS, Gate-Source Voltage(V)

Transient Thermal Response Curves

D=0.5

0.2

0.1

θJC

1.R _JC(t)=r(t)*R

2.Duty Factor, D=t /t

3.T -T =P *R_θ(t)

0.1

0.05

0.02

_θJC=1.2°C/W

4.R

0.01

Single Pulse

0.01

1.E-04

1.E-03

1.E-02

1.E-01

1.E+00

1.E+01

t₁, Square Wave Pulse Duration(s)

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 7/9

Reel Dimension

Carrier Tape Dimension

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 8/9

Recommended wave soldering condition

Product

Peak Temperature

Soldering Time

5 +1/-1 seconds

Pb-free devices

260 +0/-5 °C

Recommended temperature profile for IR reflow

Profile feature

Average ramp-up rate

(Tsmax to Tp)

Sn-Pb eutectic Assembly

Pb-free Assembly

3°C/second max.

Preheat

−Temperature Min(T^Smin)

−Temperature Max(TS max)

−Time(ts min to ts max)

Time maintained above:

−Temperature (TL)

− Time (tL)

100°C

150°C

200°C

60-120 seconds

60-180 seconds

183°C

60-150 seconds

240 +0/-5 °C

217°C

60-150 seconds

260 +0/-5 °C

Peak Temperature(TP)

Time within 5°C of actual peak

temperature(tp)

10-30 seconds

20-40 seconds

Ramp down rate

6°C/second max.

6 minutes max.

8 minutes max.

Time 25 °C to peak temperature

Note : All temperatures refer to topside of the package, measured on the package body surface.

MTE130N20KF3

CYStek Product Specification

Spec. No. : C952F3

Issued Date : 2014.06.03

Revised Date :

CYStech Electronics Corp.

Page No. : 9/9

TO-263 Dimension

Marking :

α1

E130

N20K

□□□□

Device Name

Date Code

α2

Style : Pin 1.Gate 2.Drain 3.Source

α3

3-Lead Plastic Surface Mounted Package

CYStek Package Code : F3

*:Typical

Millimeters

Inches

Millimeters

Min. Max.

Inches

Min.

0.0500

DIM

Min.

0.3800

0.3300

Max.

0.0700

*0.1000

0.0550

0.0390

Min.

1.27

Max.

1.78

*2.54

1.40

0.99

0.4050

0.3700

0.0550

0.6250

0.1900

9.65

8.38

10.29

9.40

1.40

15.88

4.83

1.40

2.79

0.74

0.0450

1.14

0.51

0.5750

0.1600

14.61

4.06

1.14

2.29

0.46

0.0200

α1

α2

α3

6°

0°

8°

5°

0.0450

0.0900

0.0180

0.0550

0.1100

0.0290

Notes : 1.Controlling dimension : millimeters.

2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.

3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.

Material :

• Lead : Pure tin plated.

• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.

Important Notice:

• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.

• CYStek reserves the right to make changes to its products without notice.

• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.

• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.

MTE130N20KF3

CYStek Product Specification

MTE130N20KF3 [CYSTEKEC]

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