MTE2D4N06F7T-0-T7-X [CYSTEKEC]
N-Channel Enhancement Mode Power MOSFET;型号: | MTE2D4N06F7T-0-T7-X |
厂家: | CYSTECH ELECTONICS CORP. |
描述: | N-Channel Enhancement Mode Power MOSFET |
文件: | 总9页 (文件大小:507K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 1/9
CYStech Electronics Corp.
N-Channel Enhancement Mode Power MOSFET
MTE2D4N06F7T
BVDSS
60V
ID @VGS=10V, TC=25°C
RDSON(TYP) @ VGS=10V, ID=20A
172A
2.0mΩ
Features
• Simple Drive Requirement
• Fast Switching Characteristic
• RoHS compliant package
Symbol
Outline
MTE2D4N06F7T
TO-263-7L-4C
G:Gate D:Drain S:Source
Ordering Information
Device
Package
Shipping
800 pcs / Tape & Reel
TO-263-7L-4C
(Pb-free lead plating and RoHS compliant package)
MTE2D4N06F7T-0-T7-X
Environment friendly grade : S for RoHS compliant products, G for RoHS compliant
and green compound products
Packing spec, T7 : 800 pcs / tape & reel, 13” reel
Product rank, zero for no rank products
Product name
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 2/9
CYStech Electronics Corp.
Absolute Maximum Ratings (TC=25°C, unless otherwise noted)
Parameter
Symbol
Limits
Unit
V
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
60
±30
234
165
172
Continuous Drain Current @ TC=25°C(silicon limit)
Continuous Drain Current @ TC=100°C(silicon limit)
Continuous Drain Current @ TC=25°C(package limit) (Note 1)
ID
A
Pulsed Drain Current
(Note 3)
(Note 2)
(Note 2)
(Note 3)
(Note 4)
(Note 1)
(Note 1)
(Note 2)
(Note 2)
IDM
688
18.7
15.0
120
2450
330
165
2
1.3
Continuous Drain Current @ TA=25°C
Continuous Drain Current @ TA=70°C
Avalanche Current
IDSM
IAS
EAS
Avalanche Energy @ L=1mH, ID=70A, VDD=25V
mJ
W
TC=25°C
TC=100°C
Power Dissipation
PD
TA=25°C
Power Dissipation
PDSM
TA=70°C
Operating Junction and Storage Temperature
Tj, Tstg
-55~+175
°C
Thermal Data
Parameter
Thermal Resistance, Junction-to-case, max
Thermal Resistance, Junction-to-ambient, max, (Note 2)
Symbol
RθJC
RθJA
Value
0.45
62.5
Unit
°C/W
°
.
Note : 1 The power dissipation PD is based on TJ(MAX)=175 C, using junction-to-case thermal resistance, and is more useful
in setting the upper dissipation limit for cases where additional heatsinking is used.
.
2 The value of RθJA is measured with the device mounted on 1 in²FR-4 board with 2 oz. copper, in a still air environment
°
with TA=25 C. The power dissipation PDSM is based on RθJA and the maximum allowed junction
temperature of 150°C. The value in any given application depends on the user’s specific board design, and the
maximum temperature of 175°C may be used if the PCB allows it.
°
.
3 Pulse width limited by junction temperature TJ(MAX)=175 C. Ratings are based on low frequency and low duty cycles
to keep initial TJ=25°C.
4. 100% tested by conditions of L=1mH, IAS=42A, VGS=15V, VDD=25V.
5. The static characteristics are obtained using <300μs pulses, duty cycle 0.5% maximum.
6. The RθJA is the sum of thermal resistance from junction to case RθJC and case to ambient.
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 3/9
CYStech Electronics Corp.
Characteristics (TC=25°C, unless otherwise specified)
Symbol
Static
Min.
Typ.
Max.
Unit
Test Conditions
BVDSS
VGS(th)
GFS
60
2.0
-
-
45
-
-
-
-
4.0
-
VGS=0V, ID=250μA
VDS = VGS, ID=250μA
VDS =10V, ID=20A
V
-
-
-
-
-
S
nA
±
100
1
±
IGSS
VGS= 30V
VDS =48V, VGS =0V
VDS =48V, VGS =0V, Tj=125°C
VGS =10V, ID=20A
IDSS
μA
25
2.6
Ω
m
*RDS(ON)
Dynamic
*Qg
2.0
-
-
-
-
-
-
-
-
-
-
-
121
21.2
44.2
40.6
34
86.6
24.2
5700
944
338
1.6
-
-
-
-
-
-
-
-
-
-
-
nC
ID=20A, VDS=30V, VGS=10V
*Qgs
*Qgd
*td(ON)
*tr
*td(OFF)
*tf
Ciss
Coss
Crss
Rg
Ω
ns
VDS=30V, ID=20A, VGS=10V, RG=1
pF
VGS=0V, VDS=30V, f=1MHz
f=1MHz
Ω
Source-Drain Diode
*IS
*ISM
*VSD
*trr
-
-
-
-
-
-
-
172
688
0.9
-
A
0.66
51.8
73.5
V
ns
nC
IS=1A, VGS=0V
IF=1A, VGS=0V, dIF/dt=100A/μs
*Qrr
-
*Pulse Test : Pulse Width ≤300μs, Duty Cycle≤2%
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 4/9
CYStech Electronics Corp.
Typical Characteristics
Brekdown Voltage vs Ambient Temperature
Typical Output Characteristics
1.4
1.2
1
300
250
6V
10V, 9V, 8V, 7V
200
150
100
50
5.5V
5V
0.8
0.6
0.4
μ
ID=250 A,
VGS=4.5V
VGS=0V
0
-75 -50 -25
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
0
1
2
3
4
5
VDS, Drain-Source Voltage(V)
Static Drain-Source On-State resistance vs Drain Current
Reverse Drain Current vs Source-Drain Voltage
1000
100
10
1.2
1
0.8
0.6
0.4
0.2
Tj=25°C
VGS=6V
7V
10V
Tj=150°C
1
0.01
0.1
1
ID, Drain Current(A)
10
100
0
4
8
12
16
20
IDR, Reverse Drain Current(A)
Drain-Source On-State Resistance vs Junction Tempearture
VGS=10V, ID=20A
Static Drain-Source On-State Resistance vs Gate-Source
Voltage
100
90
80
70
60
50
40
30
20
10
0
2.8
2.4
2
ID=20A
1.6
1.2
0.8
0.4
0
RDS(ON)@Tj=25°C : 2.0 mΩ typ
-75 -50 -25
0 25 50 75 100 125 150 175 200
Tj, Junction Temperature(°C)
0
2
4
6
GS, Gate-Source Voltage(V)
8
10
V
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 5/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
NormalizedThreshold Voltage vs Junction Tempearture
Capacitance vs Drain-to-Source Voltage
10000
1.4
1.2
1
Ciss
ID=1mA
C
oss
0.8
0.6
0.4
0.2
1000
I =250 A
μ
D
Crss
100
-75 -50 -25
0
25 50 75 100 125 150 175 200
0
5
10
15
20
DS, Drain-Source Voltage(V)
25
30
V
Tj, Junction Temperature(°C)
Forward Transfer Admittance vs Drain Current
Gate Charge Characteristics
100
10
10
VDS=30V
8
6
4
2
0
1
VDS=48V
VDS=10V
Pulsed
0.1
0.01
Ta=25°C
ID=20A
0
20
40
60
80 100 120 140 160
0.001
0.01
0.1
ID, Drain Current(A)
1
10
100
Total Gate Charge---Qg(nC)
Maximum Drain Current vs Case Temperature
silicon limit
Maximum Safe Operating Area
300
250
200
150
100
50
1000
100
10
RDS(ON)
Limited
10 s
μ
100 s
μ
1ms
10ms
100ms
DC
package limit
1
TC=25°C, Tj=175°, VGS=10V
JC
JC
VGS=10V, R =0.45°C/W
θ
R
θ
=0.45°C/W, Single
0
0.1
25
50
75
100
125
150
175
200
0.1
1
10
DS, Drain-Source Voltage(V)
100
1000
V
TC, Case Temperature(°C)
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 6/9
CYStech Electronics Corp.
Typical Characteristics(Cont.)
Typical Transfer Characteristics
Single Pulse Maximum Power Dissipation
5000
4500
4000
3500
3000
2500
2000
1500
1000
500
300
250
200
150
100
50
VDS=10V
TJ(MAX)=175°C
TC=25°C
R
JC=0.45°C/W
θ
0
0
0.0001
0.001
0.01
0.1
1
10
0
2
4
6
GS, Gate-Source Voltage(V)
8
10
V
Pulse Width(s)
Transient Thermal Response Curves
1
D=0.5
0.2
0.1
JC
θ
1.R (t)=r(t)*R
θ
JC
0.1
2.Duty Factor, D=t1/t2
3.TJM-TC=PDM*RθJC(t)
0.05
0.02
JC=0.45 C/W
θ
4.R
°
0.01
0.01
Single Pulse
0.001
1.E-05
1.E-04
1.E-03
1.E-02
t1, Square Wave Pulse Duration(s)
1.E-01
1.E+00
1.E+01
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 7/9
CYStech Electronics Corp.
Reel Dimension
Carrier Tape Dimension
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 8/9
CYStech Electronics Corp.
Recommended wave soldering condition
Product
Peak Temperature
Soldering Time
5 +1/-1 seconds
Pb-free devices
260 +0/-5 °C
Recommended temperature profile for IR reflow
Profile feature
Average ramp-up rate
(Tsmax to Tp)
Sn-Pb eutectic Assembly
Pb-free Assembly
3°C/second max.
3°C/second max.
Preheat
−Temperature Min(TS min)
−Temperature Max(TS max)
−Time(ts min to ts max)
Time maintained above:
−Temperature (TL)
− Time (tL)
100°C
150°C
150°C
200°C
60-120 seconds
60-180 seconds
183°C
60-150 seconds
240 +0/-5 °C
217°C
60-150 seconds
260 +0/-5 °C
Peak Temperature(TP)
Time within 5°C of actual peak
temperature(tp)
10-30 seconds
20-40 seconds
Ramp down rate
6°C/second max.
6°C/second max.
6 minutes max.
8 minutes max.
Time 25 °C to peak temperature
Note : All temperatures refer to topside of the package, measured on the package body surface.
MTE2D4N06F7T
CYStek Product Specification
Spec. No. : C933F7T
Issued Date : 2016.12.30
Revised Date : 2017.01.03
Page No. : 9/9
CYStech Electronics Corp.
TO-263-7L-4C Dimension
Marking :
CYS
Device Name
Date Code
E2D4N06
□□□□
Style : Pin 1. Gate
Pin 2, 3, 5, 6, 7 : Source
7-Lead Plastic Surface Mounted TO-263-7L Package
CYStek Package Code : F7T
Date Code : (From left to right)
First Code : Year code, the last digit of Christinr year. For example, 2014→4, 2015→, 2016→6, …, etc.
Second Code : Month code, Jan→A, Feb→B, Mar→C, Apr→D, May→E, Jun→F, Jul→G, Aug→H, Sep→J,
Oct→K, Nov→L, Dec→M
Third and fourth codes : production serial number, 01~99
*:Typical
Millimeters
Inches
Min.
Millimeters
Min.
Inches
DIM
DIM
Max.
0.1791
0.0551
0.1004
0.0098
0.0276
0.0331
0.0236
0.3720
-
Max.
4.55
1.40
2.55
0.25
0.70
0.84
0.60
9.45
-
Min.
Max.
Min.
9.80
Max.
10.20
A
A1
A2
A3
b
0.1673
0.0472
0.0886
0.0004
0.0197
0.0228
0.0157
0.3563
0.2717
4.25
1.20
2.25
0.01
0.50
0.58
0.40
9.05
6.90
E
e
0.3858
0.4016
0.0500 BSC
1.27 BSC
E5
H
0.2854
0.5768
0.0315
0.0945
0.0335
-
7.25
14.65
0.80
2.40
0.85
-
0.6043
0.0472
0.1181
0.0453
15.35
1.20
3.00
1.15
H2
L
b1
c
L1
L4
θ
D
0.0098 BSC
0.25 BSC
2°
8°
2°
8°
D4
Notes : 1.Controlling dimension : millimeters.
2.Maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material.
3.If there is any question with packing specification or packing method, please contact your local CYStek sales office.
Material :
• Lead : Pure tin plated.
• Mold Compound : Epoxy resin family, flammability solid burning class:UL94V-0.
Important Notice:
• All rights are reserved. Reproduction in whole or in part is prohibited without the prior written approval of CYStek.
• CYStek reserves the right to make changes to its products without notice.
• CYStek semiconductor products are not warranted to be suitable for use in Life-Support Applications, or systems.
• CYStek assumes no liability for any consequence of customer product design, infringement of patents, or application assistance.
MTE2D4N06F7T
CYStek Product Specification
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