DS1707EPA [DALLAS]
Power Supply Support Circuit, Fixed, 1 Channel, +4.65VV, CMOS, PDIP8, 0.300 INCH, DIP-8;型号: | DS1707EPA |
厂家: | DALLAS SEMICONDUCTOR |
描述: | Power Supply Support Circuit, Fixed, 1 Channel, +4.65VV, CMOS, PDIP8, 0.300 INCH, DIP-8 光电二极管 |
文件: | 总10页 (文件大小:102K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
DS1707/DS1708
3.3 and 5.0-Volt MicroMonitor
www.dalsemi.com
FEATURES
PIN ASSIGNMENT
ꢀ Holds microprocessor in check during power
transients
RST
PBRST
VCC
1
2
3
4
8
7
6
5
RST
NC
ꢀ Automatically restarts microprocessor after
power failure
ꢀ Monitors pushbutton for external override
ꢀ Accurate 5%, 10% or 20% resets for 3.3V
systems and 5% or 10% resets for 5.0V
systems
ꢀ Eliminates the need for discrete components
ꢀ 20% tolerance compatible with 3.0V systems
ꢀ Pin compatible with the MAXIM
MAX707/MAX708 in 8-pin DIP, 8-pin SOIC
packages
GND
IN
NMI
8-Pin DIP (300-mil)
RST
1
2
3
4
8
7
6
5
PBRST
VCC
RST
NC
GND
IN
NMI
8-Pin SOIC (150-mil)
ꢀ 8-pin DIP, 8-pin and µ-SOP SOIC and 8-pin
µ-SOP packages available
ꢀ Industrial temperature range -40°C to +85°C
RST
NC
1
2
3
4
8
7
6
5
RST
PBRST
VCC
NMI
IN
GND
8-Pin µ-SOP (118-mil)
See Mech. Drawings Section
DS1707 and DS1708_R/S/T
PIN DESCRIPTION
PBRST
VCC
GND
IN
- Pushbutton Reset Input
- Power Supply
- Ground
- Input
NMI
NC
- Non-maskable Interrupt
- No Connect
RST
RST
- Active Low Reset Output
- Active High Reset Output
DESCRIPTION
The DS1707/DS1708 3.3- or 5.0-Volt MicroMonitor monitors three vital conditions for a microprocessor:
power supply, voltage sense, and external override. A precision temperature-compensated reference and
comparator circuit monitor the status of VCC at the device and at an upstream point for maximum
protection. When the sense input detects an out-of-tolerance condition a non-maskable interrupt is
generated. As the voltage at the device degrades an internal power fail signal is generated which forces
the reset to an active state. When VCC returns to an in-tolerance condition, the reset signal is kept in the
active state for a minimum of 130 ms to allow the power supply and processor to stabilize.
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071700
DS1707/DS1708
The third function the DS1707/DS1708 performs is pushbutton reset control. The DS1707/DS1708
debounces the pushbutton input and guarantees an active reset pulse width of 130 ms minimum.
OPERATION
Power Monitor
The DS1707/DS1708 detects out-of-tolerance power supply conditions and warns a processor-based
system of impending power failure. When VCC falls below the minimum VCC tolerance, a comparator
outputs the RST and RST signals. RST and RST are excellent control signals for a microprocessor, as
processing is stopped at the last possible moment of valid VCC. On power-up, RST and RST are kept
active for a minimum of 130 ms to allow the power supply and processor to stabilize.
Pushbutton Reset
The DS1707/DS1708 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The
pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such
that RST and RST signals of at least 130 ms minimum will be generated. The 130 ms delay commences
as the pushbutton reset input is released from the low level. The pushbutton can be initiated by connecting
the NMI output to the PBRST input as shown in Figure 3.
Non-Maskable Interrupt
The DS1707/DS1708 generates a non-maskable interrupt ( NMI ) for early warning of a power failure. A
precision comparator monitors the voltage level at the IN pin relative to an on-chip reference generated
by an internal band gap. The IN pin is a high impedance input allowing for a user-defined sense point. An
external resistor voltage divider network (Figure 5) is used to interface with high voltage signals. This
sense point may be derived from a regulated supply or from a higher DC voltage level closer to the main
system power input. Since the IN trip point VTP is 1.25 volts, the proper values for R1 and R2 can be
determined by the equation as shown in Figure 5. Proper operation of the DS1707/DS1708 requires that
the voltage at the IN pin be limited to VCC. Therefore, the maximum allowable voltage at the supply being
monitored (VMAX) can also be derived as shown in Figure 5. A simple approach to solving the equation is
to select a value for R2 high enough to keep power consumption low, and solve for R1. The flexibility of
the IN input pin allows for detection of power loss at the earliest point in a power supply system,
maximizing the amount of time for system shut-down between NMI and RST/RST .
When the supply being monitored decays to the voltage sense point, the DS1707/DS1708 pulses the NMI
output to the active state for a minimum 200 µs. The NMI power-fail detection circuitry also has built-in
hysteresis of 100 µV. The supply must be below the voltage sense point for approximately 5 µs before a
low NMI will be generated. In this way, power supply noise is removed from the monitoring function,
preventing false interrupts. During a power-up, any detected IN pin levels below VTP by the comparator
are disabled from generating an interrupt until VCC rises to VCCTP. As a result, any potential NMI pulse
will not be initiated until VCC reaches VCCTP
.
Connecting NMI to PBRST would allow the non-maskable interrupt to generate an automatic reset when
an out-of-tolerance condition occurred in a monitored supply. An example is shown in Figure 3.
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DS1707/DS1708
MICROMONITOR BLOCK DIAGRAM Figure 1
PUSHBUTTON RESET Figure 2
PUSHBUTTON RESET CONTROLLED BY NMI Figure 3
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DS1707/DS1708
TIMING DIAGRAM: PUSHBUTTON RESET Figure 4
NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 5
R1+ R2
V
SENSE
VSENSE
=
X 1.25
VMAX
=
X VCC
R2
V
TP
Example:
Therefore:
VSENSE = 4.70V at the trip point
VCC = 3.3V
10 kኚ = R2
4.70
X 3.3 = 12.4V maximum
1.25
R1+10k
4.70 =
X 1.25
R1 = 27.6 kኚ
10k
4 of 10
DS1707/DS1708
TIMING DIAGRAM: NON-MASKABLE INTERRUPT Figure 6
TIMING DIAGRAM: POWER-DOWN Figure 7
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DS1707/DS1708
TIMING DIAGRAM: POWER UP Figure 8
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DS1707/DS1708
ABSOLUTE MAXIMUM RATINGS*
Voltage on VCC Pin Relative to Ground
Voltage on I/O Relative to Ground**
Operating Temperature
-0.5V to +7.0V
-0.5V to VCC + 0.5V
-40°C to +85°C
Storage Temperature
Soldering Temperature
-55°C to +125°C
260°C for 10 seconds
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
** The voltage input limits on IN and PBRST can be exceeded if the input current is less than 10 mA.
RECOMMENDED DC OPERATING CONDITIONS
(-40°C to +85°C)
PARAMETER
SYMBOL
MIN
TYP
MAX
5.5
UNITS NOTES
Supply Voltage
VCC
1.2
V
V
1
VIH
2.0
VCC+0.3
1, 3
1, 4
1
PBRST Input High Level
VCC-0.5
-0.03
VIL
+0.5
V
PBRST Input Low Level
DC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCC=1.2V to 5.5V)
PARAMETER
SYMBOL
VCCTP
VCCTP
VCCTP
VCCTP
VCCTP
IIL
MIN
4.50
4.25
3.00
2.85
2.55
-1.0
TYP
4.65
4.40
3.08
2.93
2.63
MAX
4.75
4.50
3.15
3.00
2.70
+1.0
UNITS NOTES
VCC Trip Point DS1707
VCC Trip Point DS1708
VCC Trip Point DS1708T
VCC Trip Point DS1708S
VCC Trip Point DS1708R
Input Leakage
V
V
1
1
1
1
1
2
3
3
3
5
5
1
V
V
V
µA
µA
mA
V
Output Current @ 2.4V
Output Current @ 0.4V
Output Voltage
IOH
350
IOL
10
VOH
VCC-0.1
Operating Current @ VCC < 5.5V
Operating Current @ VCC < 3.6V
IN Input Trip Point
ICC
60
50
µA
µA
V
ICC
VTP
1.20
1.25
1.30
CAPACITANCE
PARAMETER
(tA=25ካC)
UNITS NOTES
SYMBOL
CIN
MIN
TYP
MAX
Input Capacitance
Output Capacitance
5
7
pF
pF
COUT
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DS1707/DS1708
AC ELECTRICAL CHARACTERISTICS
(-40°C to +85°C; VCC=1.2V to 5.5V)
PARAMETER
SYMBOL MIN
TYP
MAX
UNITS NOTES
tPB
150
130
ns
PBRST = VIL
Reset Active Time
tRST
tRPD
205
5
285
8
ms
7
6
µs
VCC Detect to RST and RST
VCC Slew Rate
tF
20
µs
tRPU
130
205
5
285
ms
VCC Detect to RST and RST
VCC Slew Rate
tR
0
ns
ns
tPDLY
250
8
PBRST Stable Low to RST and RST
VIN Detect to NMI
tIPD
7
µs
NOTES:
1. All voltages are referenced to ground.
2. PBRST is internally pulled up to VCC with an internal impedance of 40 kኚ typical.
3. VCC 2.4V
4. VCC < 2.4V
5. Measured with outputs open and all inputs at VCC or ground.
6. tR = 5 µs
7. Noise immunity - pulses < 2 µs at VCCTP minimum will not cause a reset.
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DS1707/DS1708
PART MARKING CODES
8-PIN µ-SOP
(118 MIL)
A, B, C and D represents the device type and tolerance.
ABCD
707_
708_
708R
708S
708T
-
-
-
-
-
DS1707
DS1708
DS1708R
DS1708S
DS1708T
WWY represents the device manufacturing Work Week, Year.
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DS1707/DS1708
DATA SHEET REVISION SUMMARY
The following represent the key differences between 01/09/96 and 06/17/97 versions of the DS1707/08
data sheet. Please review this summary carefully.
1. Page 7 add the following statement to the “Absolute Maximum Ratings”
The voltage input limits on IN and PBRST can be exceeded if the input current is less than 10 mA.
The following represent the key differences between 06/17/97 and 08/31/98 versions of the DS1707/08
data sheet. Please review this summary carefully.
1. Add ꢀ–SOP to Maximum Compatible list
Change pin out on µ–SOP package to match with Maximum
2. Correct “Supply Voltage” Minimum to 1.2
3. Correct Example Equation
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