DS1831CS/T&R [DALLAS]
Power Supply Support Circuit, Fixed, 4 Channel, CMOS, PDSO16, 0.150 INCH, SO-16;
| 型号： | DS1831CS/T&R |
| 厂家： | 
DALLAS SEMICONDUCTOR |
| 描述： | Power Supply Support Circuit, Fixed, 4 Channel, CMOS, PDSO16, 0.150 INCH, SO-16 光电二极管 |
| 文件： | 总15页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DS1831C/D/E
3.3V/2.5V Multisupply MicroMonitor
www.maxim-ic.com
FEATURES
PIN ASSIGNMENT
C 2.5V power-on reset
C 3.3V power-on reset
DS1831C
C Two referenced comparators with separate
IN2.5V
RST2.5V
TOL2.5V
TD2.5V
PBRST2.5V
IN1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
outputs for monitoring additional supplies
RST3.3V
TOL3.3V
TD3.3V
C Internal power is drawn from higher of either
the IN2.5V input or the IN3.3V input
C Excellent for systems designed to operate
with multiple power supplies
PBRST3.3V
NMI1
C Asserts resets during power transients
C Pushbutton reset input for system override
IN2
NMI2
C Maintains reset for user configurable times
of 10ms, 100ms, or 1s
GND
MPBRST
C Watchdog timer for software monitoring
16-Pin (300mil) DIP
&
(DS1831D)
C Precision temperature-compensated voltage
16-Pin (150mil) SO
reference and voltage sensor
C 16-pin DIP and 16-pin 150mil SO available
C Operating Temperature of -40°C to +85°C
DS1831D
DS1831E
IN2.5V
RST2.5V
TOL2.5V
TD2.5V
PBRST2.5V
IN1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
IN2.5V
RST2.5V
TOL2.5V
TD2.5V
PBRST2.5V
IN1
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN3.3V
RST3.3V
TOL3.3V
TD3.3V
PBRST3.3V
NMI1
RST3.3V
TOL3.3V
TD3.3V
PBST
NMI1
ST
WDS
IN2
NMI2
GND
TDWD
GND
MPBRST
16-Pin (300mil) DIP
&
16-Pin (300mil) DIP
&
16-Pin (150mil) SO
16-Pin (150mil) SO
DESCRIPTION
The DS1831C multisupply monitor and reset monitors up to four system voltages: 2.5V supply, 3.3V (or
3V) supply, and two additional user configurable voltage monitors. DS1831 power for internal operation
comes from the higher voltage level of the 3.3V input or the 2.5V input. One of these inputs must be
greater than 1V for device operation. Pushbutton (manual reset) functionality is provided for the 2.5V
1 of 15
060303
DS1831C/D/E
reset, the 3.3V reset or for all reset outputs by the master pushbutton. The DS1831D replaces one
reference comparator and the master pushbutton with watchdog and the DS1831E replaces the 3.3V
PBRST with a last reset status output.
TOL and TD inputs allow user configuration of the DS1831 for multiple applications. The TOL inputs
configure the tolerance for the specified output and the TD inputs configure the reset time delays.
PIN DESCRIPTION
IN2.5V
2.5V Power Supply Input
Master Pushbutton (DS1831C/E)
MPBRST
TDWD
Watchdog Time Delay Select
(DS1831D)
RST 2.5V
2.5V Reset Open Drain
Output
NMI2
WDS
NMI1
Non-maskable Interrupt 2 (DS1831C/E)
Watchdog Status Output (DS1831D)
TOL2.5V
TD2.5V
Selects 2.5V Input
Tolerance
Non-maskable Interrupt 1
Selects 2.5V Reset Time
PBRST3.3V
PBST
TD3.3V
TOL3.3V
RST 3.3V
3.3V Reset Pushbutton (DS1831C/E)
Pushbutton Status Output (DS1831E)
Select 3.3V Reset Time Delay
Selects 3.3V Input Tolerance
3.3V Reset Open Drain Output
Delay
2.5V Reset Pushbutton
Sense Input 1
PBRST2.5V
IN1
IN2
Sense Input 2 (DS1831C/E)
Watchdog Strobe Inputs
(DS1831D)
ST
GND
Ground
IN3.3V
3.3V Power Supply Input
2 of 15
DS1831C/D/E
BLOCK DIAGRAM Figure 1
IN2.5V
100 kꢀ
PBRST
TD2.5V
VCC
TOLERANCE
BIAS
TOL2.5V
+
-
RST2.5V
TIME
DELAY
1.25V T.C.
REFERENCE
100 kꢀ
Level Sense
&
IN3.3V
Debounce
ꢀ
PBRST3.3V
TD3.3V
VCC
TOLERANCE
BIAS
TOL3.3V
TIME
+
-
DELAY
-
NMI1
NMI2
IN1
+
-
IN2
+
3 of 15
DS1831C/D/E
OPERATION—POWER MONITOR
The DS1831 provides the functions of detecting out-of-tolerance conditions on a 3.3V (or 3V) and 2.5V
power supply and warning a processor based system of impending power failure. When an input is
detected as out-of-tolerance on either voltage input the RST for that supply will be forced active low.
When that input returns to a valid state the associated RST will remain active for the time delay selected
with the associated TD input and then return to an inactive state until the next input out-of-tolerance
condition.
On power-up both resets are kept active for the selected reset time after the associated power supply input
has reached the selected tolerance. This allows the power supply and system power to stabilize before
RST is released.
All internal operating current for the DS1831 will be supplied by either the IN3.3V or IN2.5V input which
ever has the highest voltage level.
OPERATION—TOLERANCE SELECT
The DS1831 provides two TOL inputs for individual customization of the DS1831 to specific application
requirements. If the TOL for the 2.5V supply is tied to the 2.5V input a 5% tolerance is selected. If the
TOL is connected to ground a 10% tolerance is selected or if it is left unconnected a 15% tolerance is
selected. If the TOL for the 3.3V supply is tied to the 3.3V input a 5% tolerance is selected, a 10%
tolerance is selected if it is connected to ground, and a 20% tolerance is selected if the input is left
unconnected. These tolerance conditions are set at power up and can only be changed by power cycling
the device.
OPERATION—RESET TIME-DELAY SELECT
The DS1831 provides two TD inputs for individual customization of reset time delays and an additional
one for the DS1831D watchdog. TD inputs select time delays for the IN2.5V and IN3.3V resets outputs and
the Watchdog on the DS1831D. The reset time delays are shown in Table 1. These allow the selection of
minimum delays of 10ms, 100ms, and 1000ms.
Wiring an individual reset output to the pushbutton input of the other voltage reset allows custom reset
timings or allows for the sequencing of the reset outputs. See Figure 2.
These time delays are set at power-up and cannot be changed after the device reaches an in-tolerance
condition.
TD INPUTS/RESET AND WATCHDOG TIME-DELAYS Table 1
RESET TIME-DELAY
TD
GND
Float
VCC
MIN
10ms
100ms
1000ms
TYP
16ms
MAX
20ms
200ms
2000ms
160ms
1600ms
4 of 15
DS1831C/D/E
PUSHBUTTON RESET SEQUENCING Figure 2
3.3V Supply
2.5V Supply
IN3.3V
IN2.5V
1
2
3
16
15
RST2.5V
TOL2.5V
RST3.3V
DS1831C
TOL3.3V
14
TD2.5V
TD3.3V
4
5
13
12
PBRST2.5V
PBRST3.3V
GND
NOTE: The RST 2.5 volt output is connected to the IN3.3V via a 100kꢀ resistor in the pushbutton input and
therefore does not require a pull-up resistor (an addition pull up can be used to accelerate responses.) If an
external pull-up is used in this example it must be connected to the 3.3V power supply.
OPERATION—PUSHBUTTON RESET
The DS1831 provides three pushbutton inputs for manual reset of the device. Pushbutton inputs for the
3.3V reset, 2.5V reset, and a master pushbutton reset (DS1831C and DS1831D only) input; provide
multiple options for system control. The 3.3V pushbutton reset and 2.5V pushbutton resets provide a
simple manual reset for the associated reset output; while the master pushbutton reset forces all resets and
NMI outputs active low.
The 2.5V reset pushbutton input and the 3.3V reset pushbutton input provide manual reset control for
each associated reset output. When the output associated with a pushbutton input is not active, a
pushbutton reset can be generated by pulling the associated PBRST pin low for at least 20µs. When the
pushbutton is held low the reset will be forced active and will remain active for a reset cycle after the
pushbutton is released. See Figure 2 for an application example that allows a user to sequence the reset
outputs.
A master pushbutton reset cycle can be started if at least one voltage input (IN2.5V, IN3.3V, IN1, or IN2) is
in tolerance and at least one output is active. A master pushbutton reset is generated by pulling the
MPBRST pin low for at least 20µs. When the pushbutton is held low all outputs are forced active and will
remain active for a reset or NMI time delay after the pushbutton is released. The Master Pushbutton input
is pulled high through an internal 100kꢀ pull up resistor and debounced via internal circuitry. See Figure
3 for an application example. Figures 4 and 5 for the timing diagram.
The 2.5V and 3.3V pushbutton reset inputs are pulled high through an internal 100kꢀ pull up resistor to
the voltage input, which is associated with that pushbutton. The master pushbutton is pulled to the greater
of the IN2.5V and IN3.3V inputs.
5 of 15
DS1831C/D/E
PUSHBUTTON RESET Figure 3
2.5V Supply
IN2.5V
1
2
3
10 kꢀ
RST2.5V
TOL2.5V
DS1831C
TD2.5V
4
5
PBRST2.5V
GND
TIMING DIAGRAM—MASTER PUSHBUTTON RESET Figure 4
tPB
MPBRST
tPDLY
VIH
VIL
tRST
RST2.5V and RST3.3V
NMI1 and NMI2
VOH
tNMI
VOH
TIMING DIAGRAM—2.5V OR 3.3V PUSHBUTTON RESET Figure 5
tPB
tPDLY
VIH
PBRST2.5V
(or PBRST3.3V
)
VIL
tRST
RST2.5V (or RST3.3V
)
VOH
VIL
6 of 15
DS1831C/D/E
OPERATION—PUSHBUTTON STATUS
The DS1831E provides a master pushbutton status open drain output. The PBST output indicates the
status of the most recent reset condition. If the last reset was generated by the master pushbutton input it
would maintain a low condition until cleared by another event (except the master pushbutton) generating
a reset. Once cleared it will remain high until the master pushbutton is pulled low generating a reset
condition. The PBST output is open drain and will require a pull-up resistor on the output to maintain a
valid condition. The value of the pull up resistor is not critical in most cases but must be set low enough
to pull the output to a high state. A common value used is 10kꢀ (see Figure 6).
DS1831E APPLICATION EXAMPLE Figure 6
2.5V
3.3V Supply
VCC
IN2.5V
IN3.3V
1
2
3
4
5
6
7
8
16
15
14
13
10kꢀ
RST2.5V
RST3.3V
VCC
TOL2.5V
VSENSE1
VSENSE2
TOL3.3V
TD2.5V
PBRST2.5V
TD3.3V
PBST
ꢀ
DS1831E
12
11
10
9
IN1
IN2
NMI1
NMI2
GND
MPBRST
OUTPUT VALID CONDITIONS
The DS1831 can maintain valid outputs as long as one input remains above 1.0V. Accurate voltage
monitoring additionally requires that either the 3.3V IN or 2.5V IN input be above 1.5V. If this condition
is not met and at least one of the supply inputs are at or above 1.0V all outputs are maintained in the
active condition. The DS1831 requires pull-up resistors on the outputs to maintain a valid output. The
value of the pull up resistor is not critical in most cases but must be set low enough to pull the output to a
high state. A common pull-up resistor value used is 10kꢀ (see Figure 7).
7 of 15
DS1831C/D/E
APPLICATION DIAGRAM—OPEN DRAIN OUTPUTS Figure 7
3.3V Supply
2.5V Supply
IN2.5V
IN3.3v
1
2
3
16
15
10 Kꢀ
ꢀ
RST3.3V
RST2.5V
DS1831C
TOL2.5V
TD2.5V
TOL3.3V
14
TD3.3V
4
5
13
12
PBRST2.5V
PBRST3.3V
GND
NOTE: If outputs are at different voltages the outputs can not be connected to form a wired AND.
OPERATION—NON-MASKABLE INTERRUPT
The DS1831 has two referenced comparators (DS1831D has only one referenced comparator) that can be
used to monitor upstream voltages or other system specific voltages. Each comparator is referenced to the
1.25V internal band gap reference and controls an open-drain output. When a voltage being monitored
decays to the voltage sense point, the DS1831 pulses the NMI output to the active state for a minimum
10µs. The comparator detection circuitry also has built-in hysteresis of 100µV. The supply must be below
the voltage sense point for approximately 2µs before a low NMI will be generated. In this way, power
supply noise is minimized in the monitoring function, reducing false interrupts. See Figure 8 for the non-
maskable timing diagram.
Versatile trip voltages can be configured by the use of an external resistor divider to divide the voltage at
a sense point to the 1.25V trip levels of the referenced comparators. See Figure 9 for an example circuit
diagram and sample equations. The equations demonstrate a design process to determine the resistor
values to use.
Connecting one or both NMI outputs to one of the reset specific PBRST s allows the non-maskable
interrupt to generate an automatic reset for the reset time period when an out-of-tolerance condition
occurs in a monitored supply. An example is shown in Figure 9.
The output associated with the specific input will be held low if the voltage on the input pin is less than
1.25V. If the voltage is above 1.25V the output will not sink current and will be pulled up by the required
pull-up resistor. The value of the resistors is not critical in most cases but must be set low enough to pull
the output to a high state. A common value used is 10kꢀ. If an NMI output is connected to a pushbutton
input an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
During a power-up, any detected IN pin levels above VTP by the comparator are disabled from generating
an inactive (high) interrupt until at least one supply on the VIN inputs rises above 1.5V. All NMI outputs
will be held active (low) until at least one VIN reaches 1.5V at which point the NMI outputs will be based
on the value of the associated IN input.
8 of 15
DS1831C/D/E
TIMING DIAGRAM—NON-MASKABLE INTERRUPT Figure 8
VIN >1.25 V
VTP(max)
VTP(max)
VTP
VTP
VTP(min)
VTP(min)
tNMI
NMI
tIPD
VOH
VOL
NON-MASKABLE INTERRUPT CIRCUIT EXAMPLE Figure 9
VSENSE1
VSENSE2
VCC
R1
R2
PBRST3.3V
NMI1
PBRST2.5V
IN1
10 kꢀ
R3
DS1831C
IN2
NMI2
R4
GND
MPBRST
R1ꢀ R2
Example:
Therefore:
VSENSE1 = 11.50 volts trip point
VSENSE1
=
X 1.25V
R2
R1 ꢀ100 k
ꢀ
11.50V =
X 1.25V
100 k
ꢀ
Resulting In: R1 = 820 kꢀ
Repeat the same steps to solve for R3 and R4 with VSENSE2
.
9 of 15
DS1831C/D/E
OPERATION—WATCHDOG TIMER
The watchdog timer function (DS1831D only) forces the WDS signal active (low) when the ST input
does not have a transition (high-to-low or low-to-high) within the predetermined time period. The
time-out period is determined by the condition of the TDWD pin (see Table 1). If TDWD is connected to
ground the minimum watchdog time-out would be 10ms, TD floating would yield a minimum time-out of
100ms, and TDWD connected to VCC would provide a time-out of 1000ms minimum. Time-out of the
watchdog starts when at least one of the RST outputs becomes inactive (high). If a transition occurs on
the ST input pin prior to time-out, the watchdog timer is reset and begins to time-out again. If the
watchdog timer is allowed to time-out, then the WDS output is pulsed active for a minimum of 100µs.
The WDS output is an open-drain output and must be pulled up externally. In most applications this
output would be connected to one of the Pushbutton inputs and would not require an external pull-up
resistor. The value of the resistors is not critical in most cases but must be set low enough to pull the
output to a high state. A common value used is 10kꢀ. If a WDS output is connected to a pushbutton input
an additional pull-up resistor can be used (to improve speed of transitions) but is not required.
The ST input can be derived from many microprocessor outputs. The most typical signals used are the
microprocessor address signals, data signals, or control signals. When the microprocessor functions
normally, these signals would, as a matter of routine, cause the watchdog to be reset prior to time-out. To
guarantee that the watchdog timer does not time-out, a transition must occur at or less than the minimum
times shown in Table 1. A typical circuit example is shown in Figure 10. The watchdog timing is shown
in Figure 11.
The DS1831A watchdog function cannot be disabled. The watchdog strobe input must be strobed to avoid
a watchdog time-out however the watchdog status output can be disconnected yielding the same result.
WATCHDOG CIRCUIT EXAMPLE Figure 10
VSENSE1
VCC
R1
R2
PBRST3.3V
NMI1
PBRST2.5V
IN1
10 kꢀ
DS1831D
µP
WDS
ST
TDWD
GND
10 of 15
DS1831C/D/E
TIMING DIAGRAM—STROBE INPUT Figure 11
INVALID
EDGES
VALID
INDETERMINATE
EDGES
EDGES
MAX
ST
MIN
tST
tTD
WDS
RESET TIMING DIAGRAM—POWER UP Figure 12
tR
VINTP (MAX)
VINTP
VINTP (MIN)
IN2.5V (or IN3.3V
)
tRPU
VOH
RST2.5V (or RST3.3V
)
11 of 15
DS1831C/D/E
RESET TIMING DIAGRAM—POWER DOWN Figure 13
tF
IN2.5V (or IN3.3V
)
VINTP (MAX)
VINTP
VINTP (MIN)
tRPD
RST2.5V (or RST3.3V
)
VOL
12 of 15
DS1831C/D/E
ABSOLUTE MAXIMUM RATINGS*
Voltage on IN2.5V or IN3.3V
Pins Relative to Ground
-0.5V to +6.0V
Voltage on either RST Relative to Ground
Voltage on PBRST3.3V Relative to Ground
Voltage on PBRST2.5V Relative to Ground
-0.5V to the greater of IN2.5V + 0.5V or IN3.3V + 0.5V
-0.5V to IN3.3V + 0.5V
-0.5V to IN2.5V + 0.5V
Voltage on MPBRST, IN1, IN2
Relative to Ground
-0.5V to the greater of IN2.5V + 0.5V or IN3.3V + 0.5V
-40°C to +85°C
-55°C to +125°C
See IPC/JEDEC J-STD-020A specification
Operating Temperature Range
Storage Temperature Range
Soldering Temperature
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods of time may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
(-40LC to +85LC)
PARAMETER
IN2.5V (Supply Voltage)
IN3.3V (Supply Voltage)
SYMBOL
V IN
MIN
1.0
MAX
5.5
5.5
UNITS NOTES
V
V
1
1
V IN
1.0
PBRST 2.5V, PBRST 3.3V, MPBRST , ST
VIH
0.7 x VINT
VINT + 0.3
V
1*
input High Level
PBRST 3.3V, PBRST 5V, MPBRST , ST
VIL
-0.3
.
0.3 x VINT
V
1*
input Low Level
* VINT is the greater voltage level of the IN2.5V or IN3.3V
DC ELECTRICAL CHARACTERISTICS
(-40LC to 85LC; IN2.5V, IN3.3V = 1.0V to 5.5V)
PARAMETER
Input Leakage
Output Current @ 2.4V
Output Current @ 0.4V
SYMBOL
IIL
MIN
TYP
MAX UNITS NOTES
-1.0
+1.0
2
3
4
5
6
ꢁA
IOH
IOL
+10
mA
ꢁA
µA
V
ICC
ICC
80
60
100
85
Operating Current @ ꢂ5.5V
Operating Current @ ꢂ3.6V
IN3.3V Trip Point (TOL3.3V = IN3.3V
IN3.3V Trip Point (TOL3.3V = GND)
IN3.3V Trip Point (TOL3.3V = Float)
)
VINTP
VINTP
VINTP
VINTP
VINTP
VINTP
VTP
2.98
2.80
3.06
2.88
2.55
2.312
2.187
2.062
1.25
3.15
2.97
2.64
2.375
2.250
2.125
1.30
V
2.47
V
IN2.5V Trip Point (TOL2.5V = IN2.5V
IN2.5V Trip Point (TOL2.5V = GND)
IN2.5V Trip Point (TOL2.5V = Float)
IN Input Trip Points
)
2.250
2.125
2.000
1.15
V
V
V
V
13 of 15
DS1831C/D/E
(tA = +25LC)
NOTES
CAPACITANCE
PARAMETER
Input Capacitance
Input Capacitance
SYMBOL
CIN
MAX
UNITS
pF
5
7
COUT
pF
AC ELECTRICAL CHARACTERISTICS
(-40L to 85LC; IN2.5V, IN3.3V = 1.0V to 5.5V)
PARAMETER
RESET Active Time (TD=Low)
RESET Active Time (TD=Float)
RESET Active Time (TD=High)
VCC Detect to RST
SYMBOL MIN
TYP
16
MAX
20
UNITS NOTES
tRST
tRST
tRST
tRPU
tRPD
tIPD
tNMI
tPB
10
ms
ms
ms
ms
ꢁs
6
6
6
6
7
7
100
160
200
1000
1600
2000
See RESET Active Time
2
2
10
10
VCC Detect to RST
VIN Detect to NMI
ꢁs
NMI Active Time
20
20
ꢁs
ꢁs
PBRST = VIL
PBRST Stable Low to Reset
tPDLY
50
ꢁs
Active
Watchdog Timeout (TD(WD)=Low)
Watchdog Timeout (TDWD=Float)
Watchdog Timeout (TDWD=High)
ST Pulse Width
tTD
tTD
tTD
tST
10
100
1000
10
16
20
200
2000
ms
ms
ms
ns
160
1600
Vin Slew Rate (V INTP(MAX) to V
tF
300
ꢁs
)
INTP(MIN)
Vin Slew Rate (V INTP(MAX) to V
tR
0
ns
)
INTP(MIN)
NOTES:
1) All voltages are referenced to ground.
2) All Pushbutton inputs are internally pulled to the associated Supply IN input or the greatest Supply IN
input for the MPBRST with an internal Impedance of 100kꢀꢃ
3) ꢄll outputs are Open Drain and output IOH would be determined by the external pull-up resistor.
4) Measured with outputs open and IN3.3V or IN2.5V ? 5.5V.
5) Measured with outputs open and IN3.3V or IN2.5V ? 3.6V.
6) Measured using tR = 5µs.
7) Noise immunity - pulses <2µs at a trip level will not cause a RST or NMI .
14 of 15
DS1831C/D/E
ORDERING INFORMATION
Ordering Part
Number
Package Type
Description
DS1831C
16-Pin DIP 300mil
16-Pin SO 150mil
16-Pin DIP 300mil
16-Pin SO 150mil
16-Pin DIP 300mil
16-Pin SO 150mil
2.5V/3.3V Multisupply Monitor
2.5V/3.3V Multisupply Monitor
2.5V/3.3V Multisupply Monitor w/Watchdog
2.5V/3.3V Multisupply Monitor w/Watchdog
2.5V/3.3V Multisupply Monitor w/Pushbutton Status
2.5V/3.3V Multisupply Monitor w/Pushbutton Status
DS1831CS
DS1831D
DS1831DS
DS1831E
DS1831ES
* Add “/T&R” for tape and reeling of surface mount packages.
15 of 15
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