1520A-20-1.0A [DATADELAY]
10-TAP DIP/SMD DELAY LINE TD/TR = 5; 10 - TAP DIP / SMD DELAY LINE TD / TR = 5型号: | 1520A-20-1.0A |
厂家: | DATA DELAY DEVICES, INC. |
描述: | 10-TAP DIP/SMD DELAY LINE TD/TR = 5 |
文件: | 总3页 (文件大小:353K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
1520
10-TAP DIP/SMD DELAY LINE
TD/TR = 5
(SERIES 1520)
FEATURES
PACKAGES
GND
T1
T3
T5
T6
IN
N/C
T2
T4
T7
1
2
3
4
5
6
7
14
13
12
11
10
9
•
•
•
•
•
10 taps of equal delay increment
Delays to 1000ns
IN
Signal Input
T1-T10 Tap Outputs
GND Ground
Low profile
Epoxy encapsulated
Meets or exceeds MIL-D-23859C
Note: Standard pinout shown
Other pinouts available
T8
T10
T9
GND
8
PART NUMBER CONSTRUCTION
FUNCTIONAL DESCRIPTION
The 1520-series device is a fixed, single-input, ten-output,
1520(S)m - xxx - zzz p
passive delay line. The signal input (IN) is reproduced at the
outputs (T1-T10) in equal increments. The delay from IN to T10
(TD) and the characteristic impedance of the line (Z) are
determined by the dash number. The rise time (TR) of the line is
20% of TD, and the 3dB bandwidth is given by 1.75 / TD. The
device is available in a 14-pin DIP (1520) or a 14-pin SMD
(1520S), and a wide range of pinouts may be specified.
MOUNTING HEIGHT CODE
See Table
DELAY TIME
Expressed in nanoseconds (ns)
First two digits are significant figures
Last digit specifies # of zeros to follow
IMPEDANCE
Part numbers are constructed according to the scheme shown
at right. For example, 1520C-101-500B is a 290 mil DIP,
100ns, 50Ω delay line with pinout code B. Similarly, 1520SB-
201-251 is a 240 mil SMD, 200ns, 250Ω delay line with
standard pinout.
Expressed in nanoseconds (ns)
First two digits are significant figures
Last digit specifies # of zeros to follow
PINOUT CODE
See Table
Omit for STD pinout
SERIES SPECIFICATIONS
DELAY SPECIFICATIONS
•
•
•
•
•
Dielectric breakdown:
Distortion @ output:
Operating temperature:
Storage temperature:
Temperature coefficient:
50 Vdc
TD
TI
TR
ATTENUATION (%) TYPICAL
10% max.
(ns)
(ns)
(ns)
Z=50Ω Z=100Ω Z=200Ω Z=300Ω Z=500Ω
-55°C to +125°C
-55°C to +125°C
100 PPM/°C
10
20
1.0
2.0
3.0
5.5
3
3
5
5
N/A
5
N/A
N/A
N/A
5
N/A
N/A
N/A
N/A
7
30
3.0
6.5
3
5
5
40
4.0
8.0
3
5
5
50
5.0
10.0
12.0
15.0
20.0
24.0
30.0
36.0
40.0
44.0
50.0
60.0
75.0
3
5
5
5
PINOUT CODES
60
6.0
3
5
5
5
7
75
7.5
3
5
5
5
7
CODE IN T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 GND
100
120
150
180
200
220
250
300
375
500
600
750
1000
10.0
12.0
15.0
18.0
20.0
22.0
25.0
30.0
37.5
3
5
5
7
7
STD 14
2
2
12
13
4
3
3
11
12
6
4
4
7
5
10
9
10
5
6
9
9
6
7
7
1,8
14
3
5
6
7
8
A
B
C
D
E
F
G
H
I
1
2
7
1
2
1
2
2
1
1
1
3
5
6
7
8
3
5
10 11 12 13 1,14
4
5
6
7
8
9
6
10
12
5
5
11 12
3
13
5
2
9
14 1,8
7,8,14
4
5
6
7
8
13
3
2
3
11
7,8
11
11
7
4
9
10
6
4
5
6
7
8
4
6
10 11 12 13 1,14
4
5
6
7
8
13
13
3
2
12
12
12
12
3
3
4
10
10
5
6
9
9
6
7
7
N/A
N/A
N/A
N/A
N/A
N/A
5
8
10
10
12
15
15
N/A
10
10
12
15
20
20
3
4
5
8,14
1
7
8
4
6
9
10 11 12 13
50.0 100.0
60.0 120.0
75.0 150.0
100.0 200.0
8
10
N/A
N/A
N/A
13
2
2
3
11
4
5
10
5
6
9
9
6
9
3
7
7
8
2
8,14
8,14
7
N/A
N/A
N/A
J
13
3
12
5
10
K
L
2
4
6
12 11 10
13 12 11 10
9
7,8
6
6
5
4
1,14
7
N
P
T
U
V
W
Z
1
1
1
2
2
1
1
2
13
2
3
3
3
4
4
2
3
4
12
4
5
10 11 12 13 14
Notes: TI represents nominal tap-to-tap delay increment
Tolerance on TD = ±5% or ±2ns, whichever is greater
Tolerance on TI = ±5% or ±1ns, whichever is greater
“N/A” indicates that delay is not available at this Z
4
11
6
5
9
9
9
4
5
10
6
9
7
8,14
5
10 11 12 13 7,14
10 11 12 13 1,7
3
5
6
8
3
5
6
8
10 11 12 13
1
7,14
7
13
13
12
12
3
11
11
10
10
5
6
9
9
6
8
4
2004 Data Delay Devices
Doc #97028
5/5/04
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
1520
FUNCTIONAL DIAGRAM
MOUNTING HEIGHT CODES
T1 T2 T3 T4 T5 T6 T7 T8 T9
CODE
HEIGHT (MAX)
0.187
DIP
Yes
Yes
Yes
SMD
No
A
B
C
0.240
Yes
Yes
0.290
IN
T10
Note: Codes A and B are not available
for all values of TD
GND
GND
Contact technical staff for details
PACKAGE DIMENSIONS
14 13 12 11 10
9
8
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
1
2
3
4
5
6
7
.280
.780 MAX.
MAX.
See
Table
.015 TYP.
.070 MAX.
.010 .002
±
.018
TYP.
.350
.600 .010
±
MAX.
6 Equal spaces
each .100 .010
±
Non-Accumulative
.020 TYP.
.040
.010 TYP.
TYP.
14 13 12 11 10
9
8
7
.270
.430
TYP.
TYP.
1
2
3
4
5
6
.090
.100
See
.050
Table
TYP.
.600
.790 MAX.
1520S-xx (Gull-Wing)
Doc #97028
5/5/04
DATA DELAY DEVICES, INC.
2
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
1520
PASSIVE DELAY LINE TEST SPECIFICATIONS
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature:
Input Pulse:
25oC ± 3oC
Rload
Cload
:
:
10MΩ
High = 3.0V typical
Low = 0.0V typical
50Ω Max.
10pf
Threshold: 50% (Rising & Falling)
Source Impedance:
Rise/Fall Time:
3.0 ns Max. (measured
at 10% and 90% levels)
Pulse Width (TD <= 75ns): PWIN = 100ns
Period
Pulse Width (TD > 75ns): PWIN = 2 x TD
Period (TD > 75ns): PERIN = 10 x TD
(TD <= 75ns): PERIN = 1000ns
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PERIN
PWIN
TRISE
TFALL
INPUT
VIH
90%
50%
90%
50%
10%
SIGNAL
VIL
10%
TRISE
TFALL
TRISE
TFALL
OUTPUT
SIGNAL
VOH
90%
50%
90%
50%
10%
VOL
10%
Timing Diagram For Testing
IN
RIN
T1
OUT
IN
T2
T3
T4
T5
OSCILLOSCOPE
PULSE
GENERATOR
TRIG
TRIG
50 Ω
DEVICE UNDER
T6
TEST (DUT)
T7
T8
T9
T10
ROUT
RIN = ROUT = ZLINE
Test Setup
Doc #97028
5/5/04
DATA DELAY DEVICES, INC.
3
3 Mt. Prospect Ave. Clifton, NJ 07013
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