DDU11H-20C3 [DATADELAY]
5-TAP, ECL-INTERFACED FIXED DELAY LINE (SERIES DDU11H); 5抽头， ECL -接口固定的延时线（系列DDU11H ）
| 型号： | DDU11H-20C3 |
| 厂家： | 
DATA DELAY DEVICES, INC. |
| 描述： | 5-TAP, ECL-INTERFACED FIXED DELAY LINE (SERIES DDU11H) |
| 文件： | 总4页 (文件大小：35K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DDU11H
Ò
5-TAP, ECL-INTERFACED
FIXED DELAY LINE
(SERIES DDU11H)
data
delay
3
devices, inc.
FEATURES
PACKAGES
GND
GND
T1
1
16
15
14
13
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
GND
T1
T3
GND
N/C
T2
T4
IN
N/C
N/C
VEE
·
·
·
·
Five equally spaced outputs
Fits standard 16-pin DIP socket
Auto-insertable
T2
T4
IN
T3
3
4
5
T5
N/C
N/C
N/C
N/C
T5
Input & outputs fully 10KH-ECL interfaced & buffered
VEE
8
DDU11H-xx DIP
DDU11H-xxC3 SMD
DDU11H-xxM Military DIP DDU11H-xxMC3 Mil SMD
PIN DESCRIPTIONS
FUNCTIONAL DESCRIPTION
IN
T1-T5 Tap Outputs
VEE -5 Volts
GND Ground
Signal Input
The DDU11H-series device is a 5-tap digitally buffered delay line. The
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an
amount determined by the device dash number (See Table). For dash
numbers less than 10, the total delay of the line is measured from T1 to
T5. The nominal tap-to-tap delay increment is given by one-fourth of the
total delay, and the inherent delay from IN to T1 is nominally 1.5ns. For dash numbers greater than or
equal to 10, the total delay of the line is measured from IN to T5. The nominal tap-to-tap delay increment
is given by one-fifth of this number.
DASH NUMBER SPECIFICATIONS
SERIES SPECIFICATIONS
Part
Number
DDU11H-4
DDU11H-5
Total
Delay Per
Tap (ns)
0.5 ± 0.3
1.0 ± 0.3
1.5 ± 0.4
2.0 ± 0.4
5.0 ± 1.0
5.0 ± 2.0
10.0 ± 2.0
15.0 ± 2.0
20.0 ± 2.0
30.0 ± 2.0
40.0 ± 2.0
50.0 ± 2.5
60.0 ± 3.0
80.0 ± 4.0
100.0 ± 5.0
·
·
·
·
·
·
Minimum input pulse width: 20% of total delay
Output rise time: 2ns typical
Supply voltage: -5VDC ± 5%
Power dissipation: 200mw typical (no load)
Operating temperature: -30° to 85° C
Temp. coefficient of total delay: 100 PPM/°C
Delay (ns)
2 ± 1.0 *
4 ± 1.0 *
6 ± 2.0 *
10 ± 2.0
20 ± 3.0
25 ± 3.0
50 ± 3.0
75 ± 4.0
100 ± 5.0
150 ± 7.5
200 ± 10.0
250 ± 12.5
300 ± 15.0
400 ± 20.0
500 ± 25.0
DDU11H-8
DDU11H-10
DDU11H-20
DDU11H-25
DDU11H-50
DDU11H-75
DDU11H-100
DDU11H-150
DDU11H-200
DDU11H-250
DDU11H-300
DDU11H-400
DDU11H-500
1.5ns
25%
25%
25%
25%
VCC IN
T1
T2
T3
T4
T5 GND
Functional diagram for dash numbers < 10
* Total delay is referenced to first tap output
Input to first tap = 1.5ns ± 1ns
20%
20%
20%
20%
20%
NOTE: Any dash number between 4 and 500
not shown is also available.
VCC IN
T1
T2
T3
T4
T5 GND
Functional diagram for dash numbers >= 10
Ó1997 Data Delay Devices
Doc #97035
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
DDU11H
APPLICATION NOTES
Delay Devices if your application requires device
testing at a specific input condition.
HIGH FREQUENCY RESPONSE
The DDU11H tolerances are guaranteed for input
pulse widths and periods greater than those
specified in the test conditions. Although the
device will function properly for pulse widths as
small as 20% of the total delay and periods as
small as 40% of the total delay (for a symmetric
input), the delays may deviate from their values
at low frequency. However, for a given input
condition, the deviation will be repeatable from
pulse to pulse. Contact technical support at Data
POWER SUPPLY BYPASSING
The DDU11H relies on a stable power supply to
produce repeatable delays within the stated
tolerances. A 0.1uf capacitor from VEE to GND,
located as close as possible to the VEE pin, is
recommended. A wide VEE trace and a clean
ground plane should be used.
DEVICE SPECIFICATIONS
TABLE 1: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VEE
VIN
TSTRG
TLEAD
MIN
-7.0
VEE - 0.3
-55
MAX
0.3
0.3
150
300
UNITS NOTES
V
V
C
C
10 sec
TABLE 2: DC ELECTRICAL CHARACTERISTICS
(0C to 75C)
PARAMETER
SYMBOL
VOH
VOL
VIH
MIN
-1.020
-1.950
TYP
MAX
-0.735
-1.600
-1.070
UNITS
NOTES
VIH = MAX,50W to -2V
VIL = MIN, 50W to -2V
High Level Output Voltage
Low Level Output Voltage
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
V
V
V
V
mA
mA
VIL
IIH
IIL
-1.480
0.5
475
VIH = MAX
VIL = MIN
Doc #97035
12/10/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
DDU11H
PACKAGE DIMENSIONS
16 15 14 13
.400
TYP.
1
3
4
5
8
.800 TYP.
.320
MAX.
.020
TYP.
.150
±.030
.010 TYP.
.100
TYP.
.018
.300
TYP.
TYP.
.700 TYP.
DDU11H-xx (Commercial DIP)
DDU11H-xxM (Military DIP)
.020 TYP.
.040
.010±.002
TYP.
16 15 14 13 12 11 10
9
.882
±.005
.710 .590
MAX.
±.005
.007
±.005
1
2
3
4
5
6
7
8
.090
.100
.280
MAX.
.050
±.010
.700
.880±.020
DDU11H-xxC3 (Commercial SMD)
DDU11H-xxMC3 (Military SMD)
Doc #97035
12/10/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
DDU11H
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (Vcc): -5.0V ± 0.1V
Load:
Cload
50W to -2V
5pf ± 10%
:
Input Pulse:
Standard 10KH ECL
Threshold: (VOH + VOL) / 2
levels
(Rising & Falling)
Source Impedance:
Rise/Fall Time:
50W Max.
2.0 ns Max. (measured
between 20% and 80%)
PWIN = 1.5 x Total Delay
PERIN = 10 x Total Delay
Pulse Width:
Period:
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
REF
PULSE
GENERATOR
OUT
IN
T1
T2
T3
T4
T5
IN
DEVICE UNDER
TEST (DUT)
OSCILLOSCOPE
TRIG
TRIG
Test Setup
PERIN
PWIN
VIH
TRISE
TFALL
INPUT
SIGNAL
80%
50%
20%
80%
50%
20%
VIL
TRISE
TFALL
OUTPUT
SIGNAL
VOH
50%
50%
VOL
Timing Diagram For Testing
Doc #97035
12/10/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
4
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