PPG-312F-10MC5 [DATADELAY]
PULSE GENERATOR DELAY LINE, COMPLEMENTARY OUTPUT, DSO40;
| 型号： | PPG-312F-10MC5 |
| 厂家： | 
DATA DELAY DEVICES, INC. |
| 描述： | PULSE GENERATOR DELAY LINE, COMPLEMENTARY OUTPUT, DSO40 输出元件 逻辑集成电路 延迟线 |
| 文件： | 总5页 (文件大小：46K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PPG312F
Ò
12-BIT PROGRAMMABLE
PULSE GENERATOR
(SERIES PPG312F)
data
delay
3
devices, inc.
FEATURES
PACKAGES
TRIG
N/C
N/C
N/C
N/C
N/C
N/C
GND
N/C
N/C
GND
A3
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
N/C
OUT
OUT/
N/C
RES
N/C
N/C
VCC
A0
2
·
·
·
·
·
·
·
·
·
Digitally programmable in 4096 steps
Monotonic pulse-width-vs-address variation
Rising edge triggered
Two separate outputs: inverting & non-inverting
Precise and stable pulse width
Input & outputs fully TTL interfaced & buffered
10 T2L fan-out capability
3
4
PPG312F-xx
DIP
PPG312F-xxC5
Gull-Wing
PPG312F-xxM
Military DIP
PPG312F-xxMC5
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
A1
A2
Fits standard 40-pin DIP socket
Auto-insertable
A5
N/C
N/C
N/C
N/C
N/C
A4
Military Gull-Wing
A6
A7
GND
A8
A9
A10
A11
N/C
VCC
PIN DESCRIPTIONS
FUNCTIONAL DESCRIPTION
TRIG Trigger Input
The PPG312F-series device is a 12-bit digitally programmable pulse
generator. The width, PWA, depends on the address code (A11-A0)
according to the following formula:
OUT Non-inverted Output
OUT/ Inverted Output
A0-A11 Address Bits
RES
VCC +5 Volts
GND Ground
Reset
PWA = PW0 + TINC * A
where A is the address code, TINC is the incremental pulse width of the
device, and PW0 is the inherent pulse width of the device. The
incremental width is specified by the dash number of the device and can range from 0.5ns through 400ns,
inclusively. RESET is held LOW during normal operation. When it is brought HIGH, OUT and OUT/ are
forced into LOW and HIGH states, respectively, and the unit is ready for the next trigger input. The
address is not latched and must remain asserted while the output pulse is active.
DASH NUMBER SPECIFICATIONS
SERIES SPECIFICATIONS
Part
Number
Incremental Width
Per Step (ns)
.5 ± .3
Total Width
Change (us)
2.048 ± 0.10
4.096 ± 0.20
8.192 ± 0.41
20.48 ± 1.02
40.96 ± 2.05
81.92 ± 4.10
204.8 ± 10.2
409.6 ± 20.5
819.2 ± 41.0
1,638.4 ± 81.9
·
Programmed pulse width tolerance: 5% or 2ns,
whichever is greater
PPG312F-.5
PPG312F-1
PPG312F-2
PPG312F-5
PPG312F-10
PPG312F-20
PPG312F-50
PPG312F-100
PPG312F-200
PPG312F-400
·
·
·
·
·
Inherent width (PW0):20ns typical
Inherent delay (TTO): 10ns ± 2ns
Operating temperature: 0° to 70° C
Supply voltage VCC: 5VDC ± 5%
Supply current: ICC = 200ma typical
1 ± .5
2 ± .5
5 ± 1.5
10 ± 2.0
20 ± 2.0
50 ± 2.5
100 ± 5.0
200 ± 10.0
400 ± 20.0
NOTE: Any dash number between .5 and 400 not
shown is also available.
Ó1997 Data Delay Devices
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
PPG312F
APPLICATION NOTES
DEVICE TIMING
POWER SUPPLY BYPASSING
The timing definitions and restrictions for the
PPG312F are shown in Figure 1. The unit is
activated by a rising edge on the TRIG input.
After a time, TTO (called the inherent delay), the
rising edge of the pulse appears at OUT. The
duration of the pulse is given by the above
equation. For the duration of the pulse, the
device ignores subsequent triggers. Once the
falling edge of the pulse has appeared at OUT,
an additional time, TOTR, is required before the
device can respond to the next trigger.
The PPG312F relies on a stable power supply to
produce repeatable pulses within the stated
tolerances. A 0.1uf capacitor from VCC to GND,
located as close as possible to each VCC pin, is
recommended. A wide VCC trace should
connect all VCC pins externally, and a clean
ground plane should be used.
INCREMENT TOLERANCES
Please note that the increment tolerances listed
represent a design goal. Although most
increments will fall within tolerance, they are not
guaranteed throughout the address range of the
unit. Monotonicity is, however, guaranteed over
all addresses.
At power-up, the state of the PPG312F is
unknown. Consequently, after power is applied,
the unit may not respond to input triggers for a
time equal to the maximum pulse width, PWT.
After this time, the unit will function properly. If
your application requires that the device function
immediately, issue a quick reset at power-up.
`
A11-A0
A i
Ai+1
TRW
TOAX
TATS
RES
TRIG
OUT
OUT/
TRTS
TTW
TTO
TRO
TOTR
TSKEW
PWA
Figure 1: Timing Diagram
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
2
PPG312F
DEVICE SPECIFICATIONS
TABLE 1: AC CHARACTERISTICS
PARAMETER
Total Programmable Pulse Width
Inherent Pulse Width
Trigger to Output Delay
Reset to Output Delay
SYMBOL
PWT
PW0
TTO
MIN
TYP
4095
20.0
10.0
MAX
UNITS
TINC
ns
15.0
8.0
27.0
12.0
17.0
ns
ns
TRO
Output Skew
Trigger Pulse Width
Reset Pulse Width
Reset to Trigger Setup Time
Address to Trigger Setup Time
Output Low to Address Change
Output to Trigger Recovery Time
TSKEW
TTW
TRW
TRTS
TATS
TOAX
TOTR
1.5
ns
ns
ns
ns
ns
ns
ns
5.0
10.0
9.0
6.0
0.0
10.0
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
DC Supply Voltage
Input Pin Voltage
Storage Temperature
Lead Temperature
SYMBOL
VCC
VIN
TSTRG
TLEAD
MIN
-0.3
-0.3
-55
MAX
7.0
VDD+0.3
150
UNITS NOTES
V
V
C
300
C
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
NOTES
High Level Output Voltage
VOH
2.5
3.4
V
VCC = MIN, IOH = MAX
VIH = MIN, VIL = MAX
VCC = MIN, IOL = MAX
VIH = MIN, VIL = MAX
Low Level Output Voltage
VOL
0.35
0.5
V
High Level Output Current
Low Level Output Current
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current at Maximum
Input Voltage
High Level Input Current
Low Level Input Current
Short-circuit Output Current
Output High Fan-out
IOH
IOL
VIH
VIL
VIK
IIHH
-1.0
20.0
mA
mA
V
V
V
2.0
-60
0.8
-1.2
0.1
VCC = MIN, II = IIK
VCC = MAX, VI = 7.0V
mA
IIH
IIL
IOS
20
-0.6
-150
25
VCC = MAX, VI = 2.7V
VCC = MAX, VI = 0.5V
VCC = MAX
mA
mA
mA
Unit
Load
Output Low Fan-out
12.5
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
3
PPG312F
PACKAGE DIMENSIONS
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
.650
MAX.
.580
MAX.
.010
±.002
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
2.100 MAX.
Lead Material:
Nickel-Iron alloy 42
TIN PLATE
.320
MAX.
.015 TYP.
.070 MAX.
.018 TYP.
.100 TYP.
DIP (PPG312F-xx, PPG312F-xxM)
.020 TYP.
.040 TYP.
.010±.002
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
.882
±.005
.710 .590
MAX.
±.005
.007
±.005
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
.090
.100
.320
MAX.
.050
±.010
1.100
2.080±.020
Gull-Wing (PPG312F-xxC5, PPG312F-xxMC5)
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com
4
PPG312F
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25oC ± 3oC
Supply Voltage (Vcc): 5.0V ± 0.1V
Load:
Cload
1 FAST-TTL Gate
5pf ± 10%
:
Input Pulse:
High = 3.0V ± 0.1V
Threshold: 1.5V (Rising & Falling)
Low = 0.0V ± 0.1V
50W Max.
3.0 ns Max. (measured
between 0.6V and 2.4V )
PWIN = 10ns
Source Impedance:
Rise/Fall Time:
Pulse Width:
Period:
PERIN = 2 x Max. Pulse Width
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
PRINTER
COMPUTER
SYSTEM
REF
PULSE
GENERATOR
OUT
IN
OUT
IN
TIME INTERVAL
COUNTER
DEVICE UNDER
TEST (DUT)
TRIG
TRIG
Test Setup
PERIN
PWIN
VIH
TRISE
TFALL
INPUT
SIGNAL
2.4V
1.5V
0.6V
2.4V
1.5V
0.6V
VIL
TTO
PWA
VOH
OUTPUT
SIGNAL
1.5V
1.5V
VOL
Timing Diagram For Testing
Doc #97008
1/15/97
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
5
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