PPG36F-4MC5 [DATADELAY]

Pulse Generator Delay Line, Programmable, 1-Func, 63-Tap, Complementary Output,;


型号：	PPG36F-4MC5
厂家：	DATA DELAY DEVICES, INC.
描述：	Pulse Generator Delay Line, Programmable, 1-Func, 63-Tap, Complementary Output,
文件：	总5页 (文件大小：47K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PPG36F

6-BIT PROGRAMMABLE

PULSE GENERATOR

(SERIES PPG36F)

data

delay

devices,

inc.

FEATURES

PACKAGES

TRIG

N/C

OUT

N/C

RES

N/C

GND

VCC

OUT/

N/C

Digitally programmable in 64 steps

Monotonic pulse-width-vs-address variation

Rising edge triggered

Two separate outputs: inverting & non-inverting

Precise and stable pulse width

Input & outputs fully TTL interfaced & buffered

10 T²L fan-out capability

N/C

Fits standard 24-pin DIP socket

Auto-insertable

PPG36F-xx

DIP

PPG36F-xxM

Military DIP

PPG36F-xxC4 Gull-Wing

PPG36F-xxMC4 Military Gull-Wing

FUNCTIONAL DESCRIPTION

PIN DESCRIPTIONS

The PPG36F-series device is a 6-bit digitally programmable pulse

generator. The width, PW_A, depends on the address code (A5-A0)

according to the following formula:

TRIG Trigger Input

OUT Non-inverted Output

OUT/ Inverted Output

A0-A5 Address Bits

RES Reset

PW_A= PW₀+ T_INC* A

VCC +5 Volts

GND Ground

where A is the address code, T_INCis the incremental pulse width of the

device, and PW₀is the inherent pulse width of the device. The incremental

width is specified by the dash number of the device and can range from 0.5ns through 10ns, inclusively.

RESET is held LOW during normal operation. When it is brought HIGH, OUT and OUT/ are forced into

LOW and HIGH states, respectively, and the unit is ready for the next trigger input. The address is not

latched and must remain asserted while the output pulse is active.

SERIES SPECIFICATIONS

DASH NUMBER SPECIFICATIONS

Programmed pulse width tolerance: 5% or 2ns,

whichever is greater

Part

Number

Incremental Width

Per Step (ns)

0.5 ± 0.3

1 ± 0.5

Total Width

Change (ns)

31.5 ± 2.00

63.0 ± 3.15

126.0 ± 6.30

189.0 ± 9.45

252.0 ± 12.6

315.0 ± 15.8

378.0 ± 18.9

441.0 ± 22.1

504.0 ± 25.2

567.0 ± 28.4

630.0 ± 31.5

PPG36F-.5

PPG36F-1

PPG36F-2

PPG36F-3

PPG36F-4

PPG36F-5

PPG36F-6

PPG36F-7

PPG36F-8

PPG36F-9

PPG36F-10

Inherent width (PW₀): 12ns typical

Inherent delay (T_TO): 3.5ns ± 2ns

Operating temperature: 0° to 70° C

Supply voltage V_CC: 5VDC ± 5%

Supply current: I_CC= 60ma typical

2 ± 0.5

3 ± 1.0

4 ± 1.0

5 ± 1.5

6 ± 1.5

7 ± 1.5

8 ± 2.0

9 ± 2.0

10 ± 2.0

NOTE: Any dash number between .5 and 10 not

shown is also available.

Ó1997 Data Delay Devices

Doc #97009

1/15/97

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

PPG36F

APPLICATION NOTES

DEVICE TIMING

POWER SUPPLY BYPASSING

The timing definitions and restrictions for the

PPG36F are shown in Figure 1. The unit is

activated by a rising edge on the TRIG input.

After a time, T_TO(called the inherent delay), the

rising edge of the pulse appears at OUT. The

duration of the pulse is given by the above

equation. For the duration of the pulse, the

device ignores subsequent triggers. Once the

falling edge of the pulse has appeared at OUT,

an additional time, T_OTR, is required before the

device can respond to the next trigger.

The PPG36F relies on a stable power supply to

produce repeatable pulses within the stated

tolerances. A 0.1uf capacitor from VCC to GND,

located as close as possible to each VCC pin, is

recommended. A wide VCC trace should

connect all VCC pins externally, and a clean

ground plane should be used.

INCREMENT TOLERANCES

Please note that the increment tolerances listed

represent a design goal. Although most

increments will fall within tolerance, they are not

guaranteed throughout the address range of the

unit. Monotonicity is, however, guaranteed over

all addresses.

At power-up, the state of the PPG36F is

unknown. Consequently, after power is applied,

the unit may not respond to input triggers for a

time equal to the maximum pulse width, PW_T.

After this time, the unit will function properly. If

your application requires that the device function

immediately, issue a quick reset at power-up.

A5-A0

A _i

A_i+1

T_RW

T_OAX

T_ATS

RES

TRIG

OUT

OUT/

T_RTS

T_TW

T_TO

T_RO

T_OTR

T_SKEW

PW_A

Figure 1: Timing Diagram

Doc #97009

1/15/97

DATA DELAY DEVICES, INC.

Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

PPG36F

DEVICE SPECIFICATIONS

TABLE 1: AC CHARACTERISTICS

PARAMETER

Total Programmable Pulse Width

Inherent Pulse Width

Trigger to Output Delay

Reset to Output Delay

SYMBOL

PW_T

PW₀

T_TO

MIN

TYP

12.0

3.5

MAX

UNITS

T_INC

8.0

1.5

16.0

5.5

17.0

T_RO

Output Skew

Trigger Pulse Width

Reset Pulse Width

Reset to Trigger Setup Time

Address to Trigger Setup Time

Output Low to Address Change

Output to Trigger Recovery Time

T_SKEW

T_TW

T_RW

T_RTS

T_ATS

T_OAX

T_OTR

1.5

5.0

10.0

9.0

6.0

0.0

% of PW_T

*or 10ns, whichever is greater

TABLE 2: ABSOLUTE MAXIMUM RATINGS

PARAMETER

DC Supply Voltage

Input Pin Voltage

Storage Temperature

Lead Temperature

SYMBOL

V_CC

V_IN

T_STRG

T_LEAD

MIN

-0.3

-55

MAX

7.0

V_DD+0.3

150

UNITS NOTES

300

10 sec

TABLE 3: DC ELECTRICAL CHARACTERISTICS

(0C to 70C, 4.75V to 5.25V)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

NOTES

High Level Output Voltage

V_OH

2.5

3.4

V_CC= MIN, I_OH= MAX

V_IH= MIN, V_IL= MAX

V_CC= MIN, I_OL= MAX

V_IH= MIN, V_IL= MAX

Low Level Output Voltage

V_OL

0.35

0.5

High Level Output Current

Low Level Output Current

High Level Input Voltage

Low Level Input Voltage

Input Clamp Voltage

Input Current at Maximum

Input Voltage

High Level Input Current

Low Level Input Current

Short-circuit Output Current

Output High Fan-out

I_OH

I_OL

V_IH

V_IL

V_IK

I_IHH

-1.0

20.0

2.0

-60

0.8

-1.2

0.1

V_CC= MIN, I_I= I_IK

V_CC= MAX, V_I= 7.0V

I_IH

I_IL

I_OS

-0.6

-150

V_CC= MAX, V_I= 2.7V

V_CC= MAX, V_I= 0.5V

V_CC= MAX

Unit

Load

Output Low Fan-out

12.5

Doc #97009

1/15/97

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

PPG36F

PACKAGE DIMENSIONS

24 23 22 21 20 19 18 17 16 15 14 13

.600

.005

.580

MAX.

.010

.002

9 10 11 12

1.270 .010

Lead Material:

Nickel-Iron alloy 42

TIN PLATE

.380

MAX.

.015 TYP.

.070 MAX.

.018 TYP.

1.100 .010

11 Equal spaces

each .100 .010

Non-Accumulative

DIP (PPG36F-xx, PPG36F-xxM)

.020 TYP.

.040 TYP.

.010 .002

24 23 22 21 20 19 18 17 16 15 14 13

.882

.005

.710 .590

MAX.

.005

.007

.005

10 11 12

.100

.090

.280

MAX.

.050

.010

1.100

1.280 .020

Gull-Wing (PPG36F-xxC4, PPG36F-xxMC4)

Doc #97009

1/15/97

DATA DELAY DEVICES, INC.

Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com

PPG36F

DELAY LINE AUTOMATED TESTING

TEST CONDITIONS

INPUT:

OUTPUT:

Ambient Temperature: 25^oC ± 3^oC

Supply Voltage (Vcc): 5.0V ± 0.1V

Load:

C_load

1 FAST-TTL Gate

5pf ± 10%

Input Pulse:

High = 3.0V ± 0.1V

Threshold: 1.5V (Rising & Falling)

Low = 0.0V ± 0.1V

50W Max.

3.0 ns Max. (measured

between 0.6V and 2.4V )

PW_IN= 10ns

Source Impedance:

Rise/Fall Time:

Pulse Width:

Period:

PER_IN= 2 x Max. Pulse Width

NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.

PRINTER

COMPUTER

SYSTEM

REF

PULSE

GENERATOR

OUT

TIME INTERVAL

COUNTER

DEVICE UNDER

TEST (DUT)

TRIG

Test Setup

PER_IN

PW_IN

V_IH

T_RISE

T_FALL

INPUT

SIGNAL

2.4V

1.5V

0.6V

2.4V

1.5V

0.6V

V_IL

T_TO

PW_A

V_OH

OUTPUT

SIGNAL

1.5V

V_OL

Timing Diagram For Testing

Doc #97009

1/15/97

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

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