SMD-99F-5004 [DATADELAY]

Active Delay Line, 1-Func, 5-Tap, True Output, TTL, 0.175 INCH HEIGHT, SMD-14/8;
SMD-99F-5004
型号: SMD-99F-5004
厂家: DATA DELAY DEVICES, INC.    DATA DELAY DEVICES, INC.
描述:

Active Delay Line, 1-Func, 5-Tap, True Output, TTL, 0.175 INCH HEIGHT, SMD-14/8

输入元件 逻辑集成电路 延迟线
文件: 总4页 (文件大小:268K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SMD99F  
5-TAP, TTL-INTERFACED  
FIXED DELAY LINE  
(SERIES SMD99F)  
FEATURES  
PACKAGES  
IN  
1
4
14 VDD  
VCC  
N/C  
T1  
N/C  
T3  
IN  
14  
13  
12  
11  
10  
9
1
2
3
4
5
6
7
Five equally spaced outputs  
N/C  
N/C  
T2  
12 T1  
Designed for surface mounting  
Low profile (0.175 maximum height)  
Input & outputs fully TTL interfaced & buffered  
10 T2L fan-out capability  
T2  
10 T3  
T4  
6
7
N/C  
T4  
GND  
8
T5  
N/C  
T5  
GND  
8
SMD99F-xx (Commercial)  
SMD99F-xxM (Military)  
SMD99F-xxMC2 (Military)  
PIN DESCRIPTIONS  
FUNCTIONAL DESCRIPTION  
IN  
Signal Input  
The SMD99F-series device is a 5-tap digitally buffered delay line. The  
signal input (IN) is reproduced at the outputs (T1-T5), shifted in time by an  
amount determined by the device dash number (See Table). For dash  
numbers less than 5025, the total delay of the line is measured from T1 to  
T5. The nominal tap-to-tap delay increment is given by one-fourth of the  
T1-T5 Tap Outputs  
VCC +5 Volts  
GND Ground  
total delay, and the inherent delay from IN to T1 is nominally 3.5ns. For dash numbers greater than or  
equal to 5025, the total delay of the line is measured from IN to T5. The nominal tap-to-tap delay  
increment is given by one-fifth of this number.  
DASH NUMBER SPECIFICATIONS  
SERIES SPECIFICATIONS  
Part  
Total  
Delay Per  
Tap (ns)  
1.0 ± 0.5  
1.5 ± 0.5  
2.0 ± 1.0  
2.5 ± 1.0  
3.0 ± 1.0  
4.0 ± 1.5  
5.0 ± 2.0  
5.0 ± 2.0  
6.0 ± 2.0  
7.0 ± 2.0  
8.0 ± 2.0  
9.0 ± 3.0  
10.0 ± 3.0  
12.0 ± 3.0  
15.0 ± 3.0  
20.0 ± 3.0  
25.0 ± 3.0  
30.0 ± 3.0  
35.0 ± 4.0  
40.0 ± 4.0  
50.0 ± 5.0  
Minimum input pulse width: 40% of total delay  
Output rise time: 2ns typical  
Number  
Delay (ns)  
4 ± 1.0 *  
6 ± 1.0 *  
8 ± 2.0 *  
10 ± 2.0 *  
12 ± 2.0 *  
16 ± 2.0 *  
20 ± 3.0 *  
25 ± 3.0  
SMD99F-5004  
SMD99F-5006  
SMD99F-5008  
SMD99F-5010  
SMD99F-5012  
SMD99F-5016  
SMD99F-5020  
SMD99F-5025  
SMD99F-5030  
SMD99F-5035  
SMD99F-5040  
SMD99F-5045  
SMD99F-5050  
SMD99F-5060  
SMD99F-5075  
SMD99F-5100  
SMD99F-5125  
SMD99F-5150  
SMD99F-5175  
SMD99F-5200  
SMD99F-5250  
Supply voltage: 5VDC ± 5%  
Supply current:  
ICCL = 32ma typical  
ICCH = 7ma typical  
Operating temperature: 0° to 70° C  
Temp. coefficient of total delay: 100 PPM/°C  
30 ± 3.0  
3.5ns  
25%  
25%  
25%  
25%  
35 ± 3.0  
40 ± 3.0  
45 ± 3.0  
50 ± 3.0  
VCC IN  
T1  
T2  
T3  
T4  
T5 GND  
60 ± 3.0  
75 ± 4.0  
Functional diagram for dash numbers < 5025  
100 ± 5.0  
125 ± 6.5  
150 ± 7.5  
175 ± 8.0  
200 ± 10.0  
250 ± 12.5  
20%  
20%  
20%  
20%  
20%  
* Total delay is referenced to first tap output  
VCC IN  
T1  
T2  
T3  
T4  
T5 GND  
Input to first tap = 3.5ns ± 1ns  
Functional diagram for dash numbers >= 5025  
NOTE: Any dash number between 5004 and 5250  
not shown is also available.  
2007 Data Delay Devices  
Doc #97017  
4/26/2007  
DATA DELAY DEVICES, INC.  
3 Mt. Prospect Ave. Clifton, NJ 07013  
1
SMD99F  
APPLICATION NOTES  
Delay Devices if your application requires device  
testing at a specific input condition.  
HIGH FREQUENCY RESPONSE  
The SMD99F tolerances are guaranteed for input  
pulse widths and periods greater than those  
specified in the test conditions. Although the  
device will function properly for pulse widths as  
small as 40% of the total delay and periods as  
small as 80% of the total delay (for a symmetric  
input), the delays may deviate from their values  
at low frequency. However, for a given input  
condition, the deviation will be repeatable from  
pulse to pulse. Contact technical support at Data  
POWER SUPPLY BYPASSING  
The SMD99F relies on a stable power supply to  
produce repeatable delays within the stated  
tolerances. A 0.1uf capacitor from VCC to GND,  
located as close as possible to the VCC pin, is  
recommended. A wide VCC trace and a clean  
ground plane should be used.  
DEVICE SPECIFICATIONS  
TABLE 1: ABSOLUTE MAXIMUM RATINGS  
PARAMETER  
DC Supply Voltage  
Input Pin Voltage  
Storage Temperature  
Lead Temperature  
SYMBOL  
VCC  
MIN  
-0.3  
-0.3  
-55  
MAX  
7.0  
UNITS NOTES  
V
V
C
VIN  
VDD+0.3  
150  
TSTRG  
TLEAD  
300  
C
10 sec  
TABLE 2: DC ELECTRICAL CHARACTERISTICS  
(0C to 70C, 4.75V to 5.25V)  
PARAMETER  
SYMBOL  
MIN  
TYP  
MAX  
UNITS  
NOTES  
High Level Output Voltage  
VOH  
2.5  
3.4  
V
VCC = MIN, IOH = MAX  
VIH = MIN, VIL = MAX  
VCC = MIN, IOL = MAX  
VIH = MIN, VIL = MAX  
Low Level Output Voltage  
VOL  
0.35  
0.5  
V
High Level Output Current  
Low Level Output Current  
High Level Input Voltage  
Low Level Input Voltage  
Input Clamp Voltage  
Input Current at Maximum  
Input Voltage  
High Level Input Current  
IOH  
IOL  
VIH  
VIL  
VIK  
IIHH  
-1.0  
20.0  
mA  
mA  
V
2.0  
-60  
0.8  
-1.2  
0.1  
V
V
VCC = MIN, II = IIK  
VCC = MAX, VI = 7.0V  
mA  
IIH  
IIL  
IOS  
20  
-0.6  
-150  
25  
VCC = MAX, VI = 2.7V  
VCC = MAX, VI = 0.5V  
VCC = MAX  
µA  
mA  
Low Level Input Current  
Short-circuit Output Current  
Output High Fan-out  
mA  
Unit  
Load  
Output Low Fan-out  
12.5  
Doc #97017  
DATA DELAY DEVICES, INC.  
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com  
2
4/26/2007  
SMD99F  
PACKAGE DIMENSIONS  
1
4
14  
12  
10  
8
.020  
.150  
.100  
.150  
.050  
.510  
C
L
MAX.  
.150  
6
7
.350 TYP.  
.480 MAX.  
.510 MAX.  
.175 MAX.  
.050  
.015  
.001  
SMD99F-xx (Commercial)  
SMD99F-xxM (Military)  
.020 TYP.  
.040  
.010 .002  
±
TYP.  
14 13 12 11 10  
9
6
8
7
.882  
.005  
.710 .590  
MAX.  
±
.005  
±
.007  
.005  
±
1
2
3
4
5
.090  
.100  
.280  
MAX.  
.050  
.010  
.600  
±
±
.780 .020  
SMD99F-xxMC2 (Military)  
Doc #97017  
4/26/2007  
DATA DELAY DEVICES, INC.  
3
3 Mt. Prospect Ave. Clifton, NJ 07013  
SMD99F  
DELAY LINE AUTOMATED TESTING  
TEST CONDITIONS  
INPUT:  
OUTPUT:  
Ambient Temperature: 25oC ± 3oC  
Supply Voltage (Vcc): 5.0V ± 0.1V  
Load:  
1 FAST-TTL Gate  
Cload  
:
5pf ± 10%  
Input Pulse:  
High = 3.0V ± 0.1V  
Threshold: 1.5V (Rising & Falling)  
Low = 0.0V ± 0.1V  
50Max.  
Source Impedance:  
Rise/Fall Time:  
3.0 ns Max. (measured  
between 0.6V and 2.4V )  
PWIN = 1.5 x Total Delay  
PERIN = 10 x Total Delay  
Pulse Width:  
Period:  
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.  
PRINTER  
COMPUTER  
SYSTEM  
REF  
PULSE  
OUT  
IN  
T1  
T2  
T3  
T4  
T5  
IN  
TIME INTERVAL  
COUNTER  
DEVICE UNDER  
TEST (DUT)  
GENERATOR  
TRIG  
TRIG  
Test Setup  
PERIN  
PWIN  
VIH  
TRISE  
TFALL  
INPUT  
2.4V  
1.5V  
2.4V  
1.5V  
0.6V  
SIGNAL  
VIL  
0.6V  
TRISE  
TFALL  
OUTPUT  
SIGNAL  
VOH  
1.5V  
1.5V  
VOL  
Timing Diagram For Testing  
Doc #97017  
4/26/2007  
DATA DELAY DEVICES, INC.  
Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com  
4

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