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DA9130-XXRT1 [DIALOG]

High-Performance, 10 A, Dual-Phase DC-DC Converter for Mobile and Portable Applications;
DA9130-XXRT1
型号： DA9130-XXRT1
厂家： Dialog Semiconductor    Dialog Semiconductor
描述：

High-Performance, 10 A, Dual-Phase DC-DC Converter for Mobile and Portable Applications
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
General Description  
DA9130 is a power management IC (PMIC) suitable for supplying CPUs, GPUs, DDR memory rails  
in single in-line pin package (SIPP) modules, mobile, portable and consumer applications.  
DA9130 operates as a single-channel dual-phase buck converter, each phase requiring a small  
external 0.22 µH inductor. It is capable of delivering up to 10 A output current at a 0.3 V to 1.9 V  
output voltage range. The 2.8 V to 5.5 V input voltage range is suitable for a wide variety of low-  
voltage systems.  
With remote sensing, the DA9130 guarantees the highest accuracy and supports multiple PCB  
routing scenarios without loss of performance.  
The pass devices are fully integrated, so no external FETs or Schottky diodes are needed.  
A programmable soft start-up can be enabled, which limits the inrush current from the input node and  
secures a slope-controlled rail activation.  
The dynamic voltage control (DVC) supports adaptive adjustment of the supply voltage dependent on  
the processor load, via either a direct register write using the communication interface (I2C-  
compatible) or with a programmable input pin.  
A configurable GPI allows multiple I2C address selection for multiple instances of DA9130 in the  
same application.  
DA9130 has integrated over-temperature and over-current protection for increased system reliability,  
without the need for external sensing components.  
Key Features  
■
■
■
■
■
■
■
■
■
2.8 V to 5.5 V input voltage  
0.3 V to 1.9 V output voltage  
4 MHz nominal switching frequency  
±1 % accuracy (static)  
■
Key safety features  
□
Output under-voltage and over-voltage  
protection  
□
□
Input under-voltage protection  
2-step over-temperature protection  
±5 % accuracy (dynamic)  
I2C-compatible interface (FM+)  
Programmable GPIOs  
■
■
-40 °C to +105 ºC ambient temperature  
range  
AEC-Q100 Grade 2 qualified version also  
available for Automotive applications  
(DA9130-A)  
Programmable soft-start  
Voltage, current, and temperature  
supervision  
■
24-pin FCQFN package (nom. 3.3 mm x  
4.8 mm)  
■
-40 °C to +105 ºC ambient temperature  
range  
□
Wettable flanks  
Benefits  
■
■
■
High Efficiency buck converters deliver outstanding thermal performance  
Fully integrated switching FET’s means no external FETs or Schottky diodes are required  
Remote sensing guarantees the highest accuracy and supports multiple PCB routing scenarios  
without loss of performance.  
■
■
Fully programmable soft-start limits the inrush current from the input to give a slope-controlled  
output voltage.  
Dynamic voltage control (DVC) enables adaptive adjustment of the device output voltage  
depending on the load. This increases efficiency when the downstream circuitry enters low power  
or idle mode, resulting in power savings.  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
1 of 46  
© 2021 Dialog Semiconductor  
 
 
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
■
■
Configurable GPIOs support a range of features including I2C, DVC and Power-Good indicator.  
Optimized BoM cost and footprint: Each output requires a very small inductor and capacitor  
delivering parts and cost savings  
■
Cycle by cycle current limiting for superior over-current protection  
Applications  
■
■
■
■
Switches and routers  
■
■
Consumer products  
Smart metering  
Industrial automation  
Wireless  
SoC/FPGA high performance processing  
system requiring efficient, high current,  
power delivery  
■
SIPP modules (SoC, DRAM)  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
2 of 46  
© 2021 Dialog Semiconductor  
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
System Diagrams  
VDD = 2.8 V to 5.5 V  
1 µF  
2x 10 µF  
PVDD1  
FB1P  
220 nH  
220 nH  
VOUT1 = 0.3 V to 1.9 V  
Buck1  
4 x 10 µF  
PGND  
FB1N  
Digital Core  
OTP Memory  
Register Map  
IC_EN  
CONF/GPIO0  
GPIO1  
GPIO2  
SCL/GPIO3  
SDA/GPIO4  
DA9130  
Bias Supervision  
Oscillator  
NC  
NC  
I2C  
GPIO  
AGND  
Figure 1: Simplified Schematic Diagram  
DDR  
1.1 V  
1.8 V  
CPU  
GPU  
IC_EN  
PVDD  
IC_EN  
CONF  
PVDD  
IC_EN  
CONF  
PVDD  
DA9131AVDD  
DA9130AVDD  
DA9130AVDD  
SoC  
VR_  
HOT  
AGND  
AGND  
AGND  
GPIO  
VR_CPU_HOT  
VR_GPU_HOT  
PG (DVS ready)  
CPU_LP  
GPU_EN  
GPU_LP  
IO_LP  
DDR_LP  
VR_DDR_HOT  
Figure 2: Typical Application Diagram (Port Control)  
DDR  
1.1 V  
1.8 V  
CPU  
GPU  
IC_EN  
CONF  
PVDD  
IC_EN  
CONF  
PVDD  
IC_EN  
CONF  
PVDD  
DA9131AVDD  
DA9130AVDD  
DA9130AVDD  
SoC  
AGND  
AGND  
AGND  
I2C  
GPIO  
I2C CLK  
I2C DATA  
Faults  
PG (ENx/DVS ready)  
GPU_EN  
Figure 3: Typical Application Diagram (I2C Control)  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
3 of 46  
© 2021 Dialog Semiconductor  
 
 
 
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Contents  
General Description ............................................................................................................................ 1  
Key Features ........................................................................................................................................ 1  
Benefits................................................................................................................................................. 1  
Applications ......................................................................................................................................... 2  
System Diagrams ................................................................................................................................ 3  
1
2
3
Terms and Definitions................................................................................................................... 7  
Pinout ............................................................................................................................................. 8  
Characteristics ............................................................................................................................ 10  
3.1 Absolute Maximum Ratings ................................................................................................ 10  
3.2 Recommended Operating Conditions................................................................................. 10  
3.3 Thermal Characteristics ...................................................................................................... 11  
3.3.1  
3.3.2  
3.3.3  
Thermal Ratings .................................................................................................. 11  
Power Dissipation................................................................................................ 11  
ESD Characteristics............................................................................................. 11  
3.4 Buck Characteristics ........................................................................................................... 12  
3.5 Performance and Supervision Characteristics.................................................................... 14  
3.6 Digital IO Characteristics..................................................................................................... 14  
3.7 Timing Characteristics......................................................................................................... 15  
3.8 Typical Performance ........................................................................................................... 16  
4
Functional Description ............................................................................................................... 17  
4.1 DC-DC Buck Converter....................................................................................................... 17  
4.1.1  
4.1.2  
4.1.3  
4.1.4  
4.1.5  
4.1.6  
4.1.7  
Switching Frequency ........................................................................................... 17  
Operation Modes and Phase Selection............................................................... 17  
Output Voltage Selection..................................................................................... 18  
Soft Start-Up and Shutdown................................................................................ 18  
Current Limit ........................................................................................................ 18  
Resistive Divider.................................................................................................. 19  
Thermal Protection .............................................................................................. 20  
4.2 Internal Circuits ................................................................................................................... 20  
4.2.1  
4.2.2  
4.2.3  
IC_EN/Chip Enable/Disable................................................................................. 20  
nIRQ/Interrupt...................................................................................................... 20  
GPIO.................................................................................................................... 23  
4.3 Operating Modes................................................................................................................. 24  
4.3.1  
ON........................................................................................................................ 24  
4.3.2  
OFF...................................................................................................................... 24  
4.4 I2C Communication ............................................................................................................. 25  
4.4.1  
I2C Protocol.......................................................................................................... 25  
5
6
Register Definitions .................................................................................................................... 27  
5.1 Register Map....................................................................................................................... 27  
5.1.1  
5.1.2  
5.1.3  
System................................................................................................................. 29  
Buck1................................................................................................................... 37  
Serialization ......................................................................................................... 41  
Package Information................................................................................................................... 42  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
4 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
6.1 Package Outlines................................................................................................................ 42  
6.2 Package Marking ................................................................................................................ 43  
6.3 Moisture Sensitivity Level.................................................................................................... 43  
6.4 Soldering Information.......................................................................................................... 43  
7
8
Ordering Information .................................................................................................................. 44  
Application Information.............................................................................................................. 45  
8.1 Capacitor Selection............................................................................................................. 45  
8.2 Inductor Selection ............................................................................................................... 45  
Table of Figures  
Figure 1: Simplified Schematic Diagram ............................................................................................... 3  
Figure 2: Typical Application Diagram (Port Control)............................................................................ 3  
Figure 3: Typical Application Diagram (I2C Control).............................................................................. 3  
Figure 4: DA9130 Pinout Diagram (Bottom View)................................................................................. 8  
Figure 5: Power Derating Curve.......................................................................................................... 11  
Figure 6: DA9130 Efficiency, PWM Mode with no Phase Shedding................................................... 16  
Figure 7: DA9130 Efficiency, Auto Mode with Phase Shedding ......................................................... 16  
Figure 8: Buck Output Voltage Control Concept ................................................................................. 18  
Figure 9: Resistive Divider................................................................................................................... 19  
Figure 10: Thermal Protection Operation............................................................................................ 20  
Figure 11: Interrupt Operation Example.............................................................................................. 22  
Figure 12: I2C START and STOP Condition Timing............................................................................ 25  
Figure 13: I2C Byte Write (SDA Line) .................................................................................................. 25  
Figure 14: I2C Byte Read (SDA Line) Examples................................................................................. 26  
Figure 15: Package Outline Drawing................................................................................................... 42  
Table of Tables  
Table 1: Pin Description ........................................................................................................................ 8  
Table 2: Pin Type Definition .................................................................................................................. 9  
Table 3: Absolute Maximum Ratings................................................................................................... 10  
Table 4: Recommended Operating Conditions ................................................................................... 10  
Table 5: Package Ratings ................................................................................................................... 11  
Table 6: Power Dissipation.................................................................................................................. 11  
Table 7: ESD Characteristics .............................................................................................................. 11  
Table 8: Buck Electrical Characteristics.............................................................................................. 12  
Table 9: Electrical Characteristics ....................................................................................................... 14  
Table 10: Digital I/O Electrical Characteristics .................................................................................... 14  
Table 11: I2C Electrical Characteristics .............................................................................................. 15  
Table 12: Thermal Protection Control Registers ................................................................................. 20  
Table 13: Interrupt List......................................................................................................................... 21  
Table 14: Interrupt Registers Except for Power Good Status ............................................................. 22  
Table 15: Interrupt Registers for Power Good and Temp Warning Status ......................................... 22  
Table 16: GPIO Pin Assignment ......................................................................................................... 23  
Table 17: GPIO Function Configuration .............................................................................................. 23  
Table 18: GPIO0-Configurable Registers when CONF_EN = 1 ......................................................... 24  
Table 19: Register Map ....................................................................................................................... 27  
Table 20: SYS_STATUS_0 (0x0001).................................................................................................. 29  
Table 21: SYS_STATUS_1 (0x0002).................................................................................................. 29  
Table 22: SYS_STATUS_2 (0x0003).................................................................................................. 29  
Table 23: SYS_EVENT_0 (0x0004) .................................................................................................... 29  
Table 24: SYS_EVENT_1 (0x0005) .................................................................................................... 29  
Table 25: SYS_EVENT_2 (0x0006) .................................................................................................... 30  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
5 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 26: SYS_MASK_0 (0x0007)...................................................................................................... 30  
Table 27: SYS_MASK_1 (0x0008)...................................................................................................... 30  
Table 28: SYS_MASK_2 (0x0009)...................................................................................................... 30  
Table 29: SYS_MASK_3 (0x000A) ..................................................................................................... 30  
Table 30: SYS_CONFIG_2 (0x000D) ................................................................................................. 31  
Table 31: SYS_CONFIG_3 (0x000E).................................................................................................. 31  
Table 32: SYS_GPIO0_0 (0x0010) ..................................................................................................... 32  
Table 33: SYS_GPIO0_1 (0x0011) ..................................................................................................... 32  
Table 34: SYS_GPIO1_0 (0x0012) ..................................................................................................... 33  
Table 35: SYS_GPIO1_1 (0x0013) ..................................................................................................... 34  
Table 36: SYS_GPIO2_0 (0x0014) ..................................................................................................... 35  
Table 37: SYS_GPIO2_1 (0x0015) ..................................................................................................... 35  
Table 38: BUCK_BUCK1_0 (0x0020) ................................................................................................. 37  
Table 39: BUCK_BUCK1_1 (0x0021) ................................................................................................. 37  
Table 40: BUCK_BUCK1_2 (0x0022) ................................................................................................. 38  
Table 41: BUCK_BUCK1_3 (0x0023) ................................................................................................. 38  
Table 42: BUCK_BUCK1_4 (0x0024) ................................................................................................. 39  
Table 43: BUCK_BUCK1_5 (0x0025) ................................................................................................. 39  
Table 44: BUCK_BUCK1_6 (0x0026) ................................................................................................. 40  
Table 45: OTP_DEVICE_ID (0x0048)................................................................................................. 41  
Table 46: OTP_VARIANT_ID (0x0049)............................................................................................... 41  
Table 47: OTP_CUSTOMER_ID (0x004A) ......................................................................................... 41  
Table 48: OTP_CONFIG_ID (0x004B)................................................................................................ 41  
Table 49: MSL Classification............................................................................................................... 43  
Table 50: Ordering Information ........................................................................................................... 44  
Table 51: Recommended Consumer Grade Capacitor Types............................................................ 45  
Table 52: Recommended Automotive Grade Capacitor Types........................................................... 45  
Table 53: Recommended Inductor Types ........................................................................................... 45  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
6 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
1
Terms and Definitions  
ATE  
CPU  
DDR  
DVC  
FET  
Automated test equipment  
Central processing unit  
Dual data rate  
Dynamic voltage control  
Field effect transistor  
Fast mode plus  
FM+  
GBD  
GBQ  
Guaranteed by design  
Guaranteed by qualification  
GBSPC  
GPI  
Guaranteed by statistical process characterization  
General purpose input  
General purpose input/output  
Graphics processing unit  
Integrated circuit  
GPIO  
GPU  
IC  
HW  
Hardware  
OTP  
PCB  
PRS  
SCL  
SDA  
SIPP  
SW  
One time programmable  
Printed circuit board  
Product requirements specification  
Serial clock  
Serial data  
Single in-line pin package  
Software  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
7 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
2
Pinout  
Figure 4: DA9130 Pinout Diagram (Bottom View)  
Table 1: Pin Description  
Pin #  
Pin Name  
Type (Table 2)  
Drive  
(mA)  
Description  
1, 2  
PVDD1  
SCL/GPIO3  
FB1N  
PS  
DIO  
AI  
5000  
15  
Supply for Ch1  
SCL  
3
4
10  
Negative feedback for Ch 1  
Positive feedback for Ch 1  
SDA  
5
FB1P  
AI  
10  
6
SDA/GPIO4  
IC_EN  
DIO  
DI  
15  
7
10  
IC enable.  
8
AVDD  
PS  
PS  
DIO  
DIO  
AI  
10  
Analog supply  
Analog ground  
GPIO  
9
AGND  
10  
10  
GPIO0  
CONF/GPIO1  
FB2P  
10  
11  
10  
GPIO  
12  
10  
Positive feedback for Ch 2  
Negative feedback for Ch 2  
GPIO  
13  
FB2N  
AI  
10  
14  
GPIO2  
PVDD2  
LX2  
DIO  
PS  
AO  
PS  
10  
15, 16  
5000  
5000  
5000  
Supply for Ch2  
Buck output of Ch 2  
Power ground  
17, 18  
19, 20, 21, 22  
PGND  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
8 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Pin #  
Pin Name  
Type (Table 2)  
Drive  
(mA)  
Description  
23, 24  
LX1  
AO  
5000  
Buck output of Ch 1  
Table 2: Pin Type Definition  
Pin Type  
DI  
Description  
Pin Type  
AI  
Description  
Analog input  
Analog output  
Digital input  
DIO  
Digital input/output  
Power supply  
AO  
PS  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
9 of 46  
© 2021 Dialog Semiconductor  
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
3
Characteristics  
3.1 Absolute Maximum Ratings  
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to  
the device. These are stress ratings only, so functional operation of the device at these or any other  
conditions beyond those indicated in the operational sections of the specification are not implied.  
Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability.  
Table 3: Absolute Maximum Ratings  
Parameter  
TSTG  
Description  
Conditions  
Min  
-65  
Max  
150  
150  
6.0  
Unit  
°C  
°C  
V
Storage temperature  
Junction temperature  
System supply voltage  
Voltage on pins  
TJ  
-40  
VSYS  
-0.3  
-0.3  
VPIN  
6.0  
V
3.2 Recommended Operating Conditions  
Table 4: Recommended Operating Conditions  
Parameter Description  
Conditions (Note 1)  
Min  
2.8  
Typ  
Max  
Unit  
V
VSYS  
VPIN  
System supply voltage  
5.5  
Voltage on pins  
-0.3  
VSYS  
0.3  
+
V
TJ  
Junction temperature  
Ambient temperature  
-40  
-40  
125  
105  
°C  
°C  
TA  
Note 1 Within the specified limits, a lifetime of 10 years is guaranteed. If operating outside of these  
recommended conditions, please consult with Dialog Semiconductor.  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
10 of 46  
© 2021 Dialog Semiconductor  
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
3.3 Thermal Characteristics  
3.3.1  
Thermal Ratings  
Table 5: Package Ratings  
Parameter Description  
Conditions  
Min  
Typ  
Max  
Unit  
Package thermal  
resistance  
21.21  
°C/W  
JA  
Note 1  
Note 1 Obtained from package thermal simulations, JEDEC 2S2P four layer board (76.2 mm x 114 mm x  
1.6 mm), 70 μm (2 oz) copper thickness power planes, 35 μm (1 oz) copper thickness signal layer  
traces, natural convection (still air), see Section 6.1.  
3.3.2  
Power Dissipation  
Table 6: Power Dissipation  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
PD_Twarn  
Power  
dissipation  
@105 °C ambient,  
TJ_WARN  
0.94  
W
PD_Tcrit  
Power  
dissipation  
@105 °C ambient,  
TCRIT  
1.65  
W
Figure 5: Power Derating Curve  
3.3.3  
ESD Characteristics  
Table 7: ESD Characteristics  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
kV  
VESD_HBM  
ESD protection, human  
body model (HBM)  
2
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
11 of 46  
© 2021 Dialog Semiconductor  
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
3.4 Buck Characteristics  
Unless otherwise noted, the following is valid for TJ = -40 °C to +125 °C, VSYS = 2.8 V to 5.5 V.  
Table 8: Buck Electrical Characteristics  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
External Electrical Conditions  
VIN  
Input voltage  
VIN = VSYS  
2.8  
5.5  
V
Output capacitance, per  
phase, including voltage  
and temperature  
COUT  
-40 %  
20  
1
+30 %  
μF  
coefficient  
Output capacitor series  
resistance, per phase  
ESRCOUT  
f > 100 kHz  
mΩ  
Inductor value, per  
phase, including current  
and temperature  
dependence  
L
-50 %  
220  
8
+20 %  
13  
nH  
DCRL  
Inductor DC resistance  
mΩ  
Electrical Performance  
IOUT = 0 mA to IMAX at 25 °C  
ambient  
Output voltage,  
programmable in 10 mV  
steps  
VOUT  
0.3  
1.9  
V
A
2.8 V < VOUT + 1 V < VIN  
5.5 V  
≤
Current limit,  
programmable per phase  
ILIM  
CHx_ILIM = 1010  
-20 %  
8
+20 %  
Note 1  
Output current  
Note 2  
AVDD ≥ VOUT + 1.8 V  
IMAX  
10  
-1  
A
5 V per phase  
Output voltage accuracy,  
including static line and  
load regulation  
VOUT_ACC  
VOUT ≥ 1 V  
1
%
Output voltage accuracy,  
including static line and  
load regulation  
VOUT_ACC  
VOUT < 1 V  
-10  
10  
mV  
Power-good voltage  
threshold hysteresis  
VTHR_PG_HYS  
VTHR_PG_DWN  
VTHR_HV  
VOUT = VTHR_PG_DWN  
60  
80  
100  
-80  
mV  
mV  
mV  
Power-good voltage  
threshold for falling  
VOUT = VBUCK  
-160  
100  
-130  
150  
High VOUT voltage  
threshold  
VOUT = VBUCK  
200  
VIN = 3 V to 3.6 V  
IOUT = 0.5 * IMAX  
dt = 10 μs  
VOUT_TR_LINE  
Line transient response  
15  
mV  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
12 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
fSW  
Switching frequency  
4
MHz  
Minimum turn-on pulse  
tON_MIN  
5
7
11  
20  
ns  
0 % duty is also  
supported  
tBUCK_EN  
Turn-on time  
CHx_EN = high  
μs  
Output pull-down  
VIN = 3.7 V  
resistance for each phase  
at the LX node, see  
BUCK<x>_PD_DIS  
RPD  
145  
150  
161  
Ω
VOUT = 0.5 V  
On resistance of  
switching PMOS, per  
phase  
RON_PMOS  
VIN = 3.7 V  
VIN = 3.7 V  
17  
6
25  
10  
37  
16  
mΩ  
mΩ  
On resistance of  
switching NMOS, per  
phase  
RON_NMOS  
PWM Mode  
Current threshold for  
automatic phase  
shedding 1-phase to 2-  
phase  
ITHR_1PH_TO_2PH  
2.25  
A
Current threshold for  
automatic phase  
shedding 2-phase to 1-  
phase  
ITHR_2PH_TO_1PH  
1.7  
16  
A
VIN = 3.7 V  
No load  
Quiescent current, per  
phase  
IQ_PWM_2PH  
mA  
VIN = 3.6 V  
VOUT = 1 V  
Efficiency, phase  
shedding  
ηPWM  
85  
%
IOUT = 5 % (IMAX) to 80 %  
(IMAX)  
AUTO Mode  
VOUT = 1 V  
Load transient response, IOUT = 0 to 10 A at 25 °C  
VOUT_TR_LD_2PH  
-40  
40  
mV  
phase shedding enabled  
ambient  
dl/dt = 10 A/μs  
PFM Mode  
VIN = 3.7 V  
IQ_PFM_2PH  
Quiescent current in PFM No load  
No switching  
164  
83  
μA  
VIN = 3.6 V  
VOUT = 1 V  
IOUT = 10 mA  
ηPFM  
Efficiency  
%
Note 1 tON > 40 ns  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Note 2 For short durations to meet peak current requirements, IOUT can be operated at up to 10 % higher than  
the specified maximum operating condition. The part should not be operated in this mode for extended  
periods and is not guaranteed for continuous operation.  
3.5 Performance and Supervision Characteristics  
Table 9: Electrical Characteristics  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
Electrical Performance  
VTHR_POR  
Power-on-reset threshold  
Threshold for AVDD falling  
2.1  
2.25  
V
VTHR_POR_HYS Power-on-reset hysteresis  
200  
mV  
Thermal warning  
TWARN  
115  
130  
125  
140  
135  
150  
°C  
°C  
temperature threshold  
Thermal shutdown  
TCRIT  
temperature threshold  
OFF state  
TA = 27 °C  
IC_EN = 0  
IIN_OFF  
Supply current  
Supply current  
0.1  
10  
1
μA  
μA  
ON state  
TA = 27 °C  
IC_EN = 1  
Buck off  
IIN_ON  
5
20  
3.6 Digital IO Characteristics  
Table 10: Digital I/O Electrical Characteristics  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
Electrical Performance  
Input high voltage, IC  
enable  
VIH_EN  
1.2  
AVDD  
V
VIL_EN  
tIC_EN  
Input low voltage, IC enable  
IC enable time  
0.4  
V
1000  
μs  
Input high voltage  
GPIO, SCL, SDA  
VIH_GPIO_SCL_SDA  
VIL_GPIO_SCL_SDA  
VOH_GPIO  
1.2  
AVDD  
0.4  
V
V
V
V
Input low voltage  
GPIO, SCL, SDA  
Output high voltage  
GPIO  
Push-pull mode  
IOUT = 1 mA  
0.8*AV  
DD  
AVDD  
Output low voltage  
GPIO  
Push-pull mode  
IOUT = 1 mA  
0.2*AV  
DD  
VOL_GPIO  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Parameter  
Description  
Conditions  
Min  
Typ  
Max  
Unit  
Output low voltage  
SDA  
VOL_SDA  
IOUT = 3 mA  
0.24  
V
RPD  
RPU  
GPIO pull-down resistor  
GPIO pull-up resistor  
10  
33  
15  
46  
23  
65  
kΩ  
kΩ  
3.7 Timing Characteristics  
Table 11: I2C Electrical Characteristics  
Parameter Description  
Conditions  
Min  
Typ  
Max  
Unit  
Electrical Performance  
Bus free time between a  
tBUS  
0.5  
μs  
STOP and START condition  
CBUS  
fSCL  
Bus line capacitive load  
SCL clock frequency  
150  
pF  
20  
1000  
kHz  
Note 1  
tLO_SCL  
tHI_SCL  
tRISE  
SCL low time  
0.5  
μs  
μs  
ns  
ns  
μs  
μs  
μs  
μs  
μs  
ns  
ns  
SCL high time  
0.26  
SCL and SDA rise time  
SCL and SDA fall time  
Requirement for input  
Requirement for input  
1000  
300  
tFALL  
tSETUP_START Start condition setup time  
0.26  
0.26  
0.26  
tHOLD_START  
tSETUP_STOP  
tDATA  
Start condition hold time  
Stop condition setup time  
Data valid time  
0.45  
0.45  
tDATA_ACK  
tSETUP_DATA  
tHOLD_DATA  
Data valid acknowledge time  
Data setup time  
50  
0
Data hold time  
Note 1 Minimum clock frequency is limited to 20 kHz if I2C_TIMEOUT is enabled  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
3.8 Typical Performance  
Figure 6: DA9130 Efficiency, PWM Mode with no Phase Shedding  
Figure 7: DA9130 Efficiency, Auto Mode with Phase Shedding  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4
Functional Description  
4.1 DC-DC Buck Converter  
DA9130 operates as a single-channel dual-phase buck converter capable of delivering up to 10 A  
output current at a 0.3 V to 1.9 V output voltage range.  
The buck converter has two voltage registers. One defines the normal output voltage, while the other  
offers an alternative retention voltage. In this way, different application power modes can easily be  
supported. The voltage selection can be operated either via GPI or via control interface to guarantee  
the maximum flexibility according to the specific host processor status in the application.  
When a buck is enabled, its output voltage is monitored and a power good signal indicates that the  
buck output voltage has reached a level higher than the VTHR_PG_HYS threshold. The power good  
status is lost when the voltage drops below VTHR_PG_DWN or increases above VTHR_HV. The status of the  
power good indicator can be read back via I2C from the PG1 status bit. It can be also individually  
assigned to any of the GPIOs by setting the GPIO mode registers to PG1 output.  
The buck converter is capable of supporting DVC transitions that occur when:  
●
●
the active and selected A- or B-voltage is updated to a new target value  
the voltage selection is changed from the A- to B-voltage (or B- to A-voltage) using CH1_VSEL  
The DVC controller operates in pulse width modulation (PWM) mode with synchronous rectification.  
The slew rate of the DVC transition is programmed at 10 mV per 8 µs, 4 µs, 2 µs, 1 µs, or 0.5 µs in  
register bits CH1_SR_DVC.  
A pull-down resistor (typically 150 Ω) for each phase is always activated unless it is disabled by  
setting register bits CH1_PD_DIS to 1.  
4.1.1  
Switching Frequency  
The buck switching frequency can be tuned using register bit OSC_TUNE. The internal 8 MHz  
oscillator frequency is tuned in ±160 kHz steps. This impacts the buck converter frequency in steps  
of 80 kHz and helps to mitigate possible disturbances to other high frequency systems in the  
application.  
4.1.2  
Operation Modes and Phase Selection  
The buck converters can operate in PWM and PFM modes. The operating mode is selected using  
register bits CH1_<A or B>_MODE.  
Phase shedding automatically changes between 1- and 2-phase operation at a typical current of  
2.0 A.  
If the automatic operation mode is selected on CH1_<A or B>_MODE, the buck converter  
automatically changes between synchronous PWM mode and PFM depending on the load current.  
This improves the efficiency across the whole range of output load currents.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4.1.3  
Output Voltage Selection  
The switching converter can be configured using the I2C interface.  
Two output voltages can be pre-configured in registers CH1_<A or B>_VOUT. The output voltage  
can be selected by either toggling register bit CH1_VSEL or by re-programming the selected voltage  
control register. Both changes will result in ramped voltage transitions. After being enabled, the buck  
converter will, by default, use the register settings in CH1_A_VOUT unless the output voltage  
selection is configured via the GPI port.  
Registers CH1_VMAX limit the output voltage that can be set for each of the respective buck  
converters.  
Figure 8: Buck Output Voltage Control Concept  
4.1.4  
Soft Start-Up and Shutdown  
To limit in-rush current from VSYS, the buck converter can perform a soft-start after being enabled.  
The start-up behavior is a compromise between acceptable inrush current from the battery and turn-  
on time. Ramp times can be configured in register CH1_SR_STARTUP. Rates higher than 20 mV/µs  
may produce overshoot during the start-up phase, so it should be considered carefully.  
A ramped power down can be selected in register bits CH1_SR_SHDN. When no ramp is selected  
(immediate power down), the output node will be discharged only by the pull-down resistor, if  
enabled in register CH1_PD_DIS.  
4.1.5  
Current Limit  
The integrated current limit protects the power stages and external coil from excessive current. The  
buck current limit should be configured to at least 40 % higher than the required maximum output  
current.  
When the current limit is reached, the buck converter generates an event and an interrupt to the host  
processor unless the interrupt has been masked using register M_OC1 in SYS_MASK_1. Register  
bit OC_DVC_MASK is used to mask over-current events during DVC transitions.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4.1.6  
Resistive Divider  
DA9130 can support output voltages higher than 1.9 V using an external resistive divider shown in  
Figure 9.  
To calculate the output voltage with an external divider, use the following equation  
푅1  
푉푂푈푇 = 푉  
× (1 +  
)
푆퐸퐿  
푅2  
Equation 1  
VSEL is the device buck output voltage setting.  
Figure 9: Resistive Divider  
For example, to program the output voltage to 3.3 V, set VSEL to 1.65 V, and use a 2.2 kΩ resistor  
for both R1 and R2, with Cff = 1 nF.  
NOTE  
The resistors need to be properly selected since the output voltage accuracy will be directly affected by any  
errors on the resistors. The voltage across FB1P and FB1N (VSEL) is guaranteed, but not the output voltage  
accuracy.  
CAUTION  
The followings are important notes that need to be considered before using resistive divider on DA9130:  
1. Please contact your region's Dialog representative when adopting the resistive divider technique. Dialog  
need to prepare a special OTP because incorrect OTP settings may result in a different output voltage  
than expected.  
2. The total resistance (R1+R2) is less than 40 kΩ.  
3. It is recommended that the device is operated in PWM mode only.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4.1.7  
Thermal Protection  
DA9130 is protected from internal overheating by thermal shutdown.  
There are two kinds of flags concerning thermal protection, thermal warning and thermal critical. The  
warning flag is asserted when TJ > TWARN and the critical flag is asserted when TJ > TCRIT. When the  
critical flag is asserted, Buck1 is shut down immediately.  
Table 12: Thermal Protection Control Registers  
Category  
Register name  
TEMP_WARN  
TEMP_CRIT  
Description  
Asserted as long as the thermal warning threshold is reached  
Asserted as long as the thermal shutdown threshold is reached  
TEMP_WARN caused event  
Status  
E_TEMP_WARN  
E_TEMP_CRIT  
M_TEMP_WARN  
M_TEMP_CRIT  
M_VR_HOT  
IRQ event  
IRQ mask  
TEMP_CRIT caused event  
TEMP_WARN event IRQ mask  
TEMP_CRIT event IRQ mask  
TEMP_WARN status IRQ mask  
Buck1 Shutdown  
IRQ  
IRQ  
TCRIT  
TWARN  
Junction  
Temperature  
Warning Flag  
Critical Flag  
I2C Bus  
Write  
1
to CH<x>_EN  
Buck Enable  
Figure 10: Thermal Protection Operation  
4.2 Internal Circuits  
4.2.1  
IC_EN/Chip Enable/Disable  
IC_EN is chip enable/disable control input. When IC_EN = 0, all blocks except for low IQ POR are  
powered-down and buck output is pulled-down.  
4.2.2  
nIRQ/Interrupt  
The interrupt triggers events. Trigger conditions and control registers for each interrupt event are  
listed in Table 13.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Some of these events are categorized as fault events and affect device operation (for example, buck  
disable), see Section 4.1.6.  
Table 13: Interrupt List  
Polarity  
(Note 1)  
IRQ Status  
Register  
IRQ Mask  
Register  
Deglitch  
Period  
Name  
Trigger  
Thermal  
warning  
N
N
P
TJ rising above TWARN  
E_TEMP_WARN M_TEMP_WARN  
0 s  
0 s  
0 s  
(event)  
Thermal  
critical  
TJ rising above TCRIT  
E_TEMP_CRIT  
E_PG1  
M_TEMP_CRIT  
M_PG1  
(event)  
Buck1  
power-good  
Buck1 VOUT is in power-  
good voltage range  
(event)  
(not under- or over-voltage)  
Buck1 VOUT rising above  
over-voltage  
Buck1  
over-voltage  
Rise:8 µs  
Fall:8 µs  
N
E_OV1  
M_OV1  
threshold (target voltage +  
150 mV)  
(event)  
Buck1  
under-  
voltage  
Buck1 VOUT falling below  
under-voltage  
N
N
P
E_UV1  
E_OC1  
PG1  
M_UV1  
M_OC1  
0 s  
0 s  
0 s  
threshold (target voltage -  
(event)  
VTH_PG)  
Buck1  
over-current  
Buck1 current rising above  
over-current threshold  
(event)  
Buck1  
power-good  
Buck1 VOUT is in power-  
good voltage range  
M_PG1_STAT  
(Note 3)  
(status)  
(Note 2)  
(not under- or over-voltage)  
Thermal  
warning  
M_VR_HOT  
(Note 3)  
N
N
N
N
TJ rising above TWARN  
TEMP_WARN  
E_GPIO0  
0 s  
(status)  
(Note 2)  
Detect GPIO0 change for  
active trigger  
GPIO0  
change  
M_GPIO0  
M_GPIO1  
M_GPIO2  
selected GPIO0_TRIG  
register  
(event)  
100 µs/  
1 ms/  
Detect GPIO1 change for  
active trigger  
GPIO1  
change  
E_GPIO1  
10 ms/  
100 ms  
selected GPIO1_TRIG  
register  
(event)  
Detect GPIO2 change for  
active trigger  
GPIO2  
change  
E_GPIO2  
selected GPIO2_TRIG  
register  
(event)  
Note 1 Polarity at the source of the flag: P = active-high, N = active-low.  
General rule is: normal system state is high, and abnormal system state is low (for example,  
PG = high means power-good, TEMP_CRIT = low when TEMP critical state).  
Note 2 Interrupt outputs the status as is. I2C write is not required for interrupt clear.  
Note 3 OTP load value defined by CONF pin setting if CONF_EN = 1.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 14: Interrupt Registers Except for Power Good Status  
Register  
Description  
E_<name>  
Read-only interrupt event register  
0: No interrupt  
1: Interrupt occurred  
Cleared after being written to I2C. Set until IRQ is removed.  
M_<name>  
Interrupt mask register  
0: Not masked  
1: Masked. No IRQ signal sent. Event register (E_<name>) is updated.  
Table 15: Interrupt Registers for Power Good and Temp Warning Status  
Register  
Description  
PG<x>  
Buck<x> power good status. Asserted as long as the buck<x> output voltage is in range  
(under-voltage threshold < buck output voltage < over-voltage threshold)  
0: Not power good  
1: Power good  
M_PG<x>_STAT Power good status interrupt mask register  
0: Not masked  
1: Masked. No IRQ signal sent. Power good status register (PG<x>) is updated  
TEMP_WARN  
M_VR_HOT  
Asserted as long as the thermal warning threshold (TWARN) is reached  
0: Junction temperature is below TWARN  
1: Junction temperature is above TWARN  
Temperature warning status (TEMP_WARN) interrupt mask register  
0: Not masked  
1: Masked. No IRQ signal sent. Temperature warning status register (TEMP_WARN) is  
updated  
I2C  
Write  
Clear  
Condition  
TJ > TWARN TJ < TWARN  
·
·
·
GPIO is cofigured as nIRQ  
M_TEMP_WARN = 0  
M_PG#_STAT = 0  
Over-voltage  
Target Voltage  
Under-voltage  
VOUT  
Status Reg  
TEMP_WARN  
Event Reg  
0
1
0
E_TEMP_WARN  
IRQ Not  
Masked  
Status Reg  
PG#  
Active-High Setting  
(GPIO#_POL = 0)  
GPIO (nIRQ)  
Active-Low Setting  
(GPIO#_POL = 1)  
Figure 11: Interrupt Operation Example  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4.2.3  
GPIO  
4.2.3.1  
GPIO Pin Assignment  
The DA9130 provides up to five GPIO pins, three if the I2C is enabled, see Table 16. These registers  
are OTP programmable. When CONF_EN = 1 GPIO0 can be used for chip configuration.  
Any register settings for GPIO3 and GPIO4 are ignored and GPIO3 and GPIO4 function as SCL and  
SDA respectively if I2C_EN = 1.  
Table 16: GPIO Pin Assignment  
OTP Option  
GPIO Pin  
GPIO2  
Available  
GPIOs  
I2C_EN  
CONF_EN  
CONF/  
GPIO0  
GPIO1  
SCL/  
GPIO3  
SDA/  
GPIO4  
1’b0  
1’b1  
1’b0  
1’b1  
1’b0  
1’b1  
GPIO0  
CONF  
GPIO0  
CONF  
GPIO1  
GPIO1  
GPIO1  
GPIO1  
GPIO2  
GPIO2  
GPIO2  
GPIO2  
GPIO3  
GPIO3  
SCL  
GPIO4  
GPIO4  
SDA  
5
4
3
2
SCL  
SDA  
4.2.3.2  
GPIO Function  
The GPIOs pins are configurable as the following functions in register GPIO<x>_MODE (x = 0 to 4):  
●
●
●
●
●
Buck1 enable input (EN1)  
Buck1 DVC control input (DVC1)  
Buck1 OTP setting reload input (RELOAD)  
Buck1 power good output (PG1)  
Interrupt output (nIRQ)  
Table 17: GPIO Function Configuration  
GPIO<x>_MODE[3:0]  
Function  
GPIO disable  
EN1  
IO Condition  
4’h0  
4’h1  
4’h2  
4’h3  
4’h4  
4’h5  
4’h6  
4’h7  
4’h8  
4’h9  
4’hA  
4’hB  
4’hC  
4’hD  
4’hE  
4’hF  
HiZ  
In  
Reserved  
Reserved  
DVC1  
In  
In  
In  
Reserved  
Reserved  
RELOAD  
PG1  
In  
In  
In  
Out  
Out  
Out  
Out  
Out  
HiZ  
Out  
Out  
Reserved  
Reserved  
Reserved  
nIRQ  
Reserved  
Low level  
High level  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
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4.2.3.3  
Chip Configuration Select (CONF)  
GPIO0 functions as chip configuration select (CONF) input when CONF_EN = 1.  
Three different chip configurations can be selected according to the CONF pin level, whether it is  
HIGH, LOW, or Hi-Z. Table 18 lists the device configurations that can be modified if CONF_EN = 1.  
Table 18: GPIO0-Configurable Registers when CONF_EN = 1  
Register Name  
IF_SLAVE_ADDR[6:0]  
CH1_A_MODE[1:0]  
CH1_B_MODE[1:0]  
CH1_VSEL  
Description  
I2C slave address  
CH1_A Operation mode select  
CH1_B Operation mode select  
CH1 output voltage and operation selection  
CH1 enable  
CH1_EN  
CH1_A_VOUT[7:0]  
CH1_B_VOUT[7:0]  
M_PG1_STAT  
CH1 output voltage setting A  
CH1 output voltage setting B  
IRQ mask setting for CH1 power good status  
IRQ mask setting for temp warning status  
GPIO1 mode setting  
M_VR_HOT  
GPIO1_MODE[3:0]  
GPIO2_MODE[3:0]  
GPIO1_OBUF  
GPIO2 mode setting  
GPIO1 output buffer select  
GPIO2_OBUF  
GPIO2 output buffer select  
GPIO1_TRIG[1:0]  
GPIO1_POL  
GPIO1 input trigger select  
GPIO1 polarity select  
GPIO1_PUPD  
GPIO1 pull-up/pull-down enable  
GPIO1 input debounce time setting  
GPIO1 input debounce rising edge enable  
GPIO1 input debounce falling edge enable  
GPIO2 input trigger select  
GPIO1_DEB[1:0]  
GPIO1_DEB_RISE  
GPIO1_DEB_FALL  
GPIO2_TRIG[1:0]  
GPIO2_POL  
GPIO2 polarity select  
GPIO2_PUPD  
GPIO2 pull-up/pull-down enable  
GPIO2 input debounce time setting  
GPIO2 input debounce rising edge enable  
GPIO2 input debounce falling edge enable  
GPIO2_DEB[1:0]  
GPIO2_DEB_RISE  
GPIO2_DEB_FALL  
4.3 Operating Modes  
4.3.1  
ON  
DA9130 is ON when the IC_EN port is higher than VIH_EN and the supply voltage is higher than  
VTHR_POR. Once enabled, the host processor can start communicating with DA9130 using the control  
interface, after the tIC_EN delay.  
4.3.2  
OFF  
DA9130 is OFF when the IC_EN port is lower than VIL_EN. In OFF, the bucks are always disabled and  
LX nodes are pulled down by (typically 150 Ω) internal pull-down resistors.  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
4.4 I2C Communication  
All features of DA9130 can be controlled with the I2C interface which is enabled or disabled in  
register I2C_EN.  
I2C_EN  
Description  
0
I2C disable: SCL/GPIO3 and SDA/GPIO4 pins can be used as GPIO  
I2C enable: SCL/GPIO3 and SDA/GPIO4 pins are used as I2C clock input and I2C data  
input/output.  
1
GPIO3 functions as the I2C clock and GPIO4 carries all the power manager bidirectional I2C data.  
The I2C interface is open-drain supporting multiple devices on a single line. The bus lines have to be  
pulled high by external pull-up resistors (2 kΩ to 20 kΩ). The standard frequency of the I2C bus is  
1 MHz in fast-mode plus (FM+), 400 kHz in fast-mode, or 100 kHz in standard mode.  
4.4.1  
I2C Protocol  
All data is transmitted across the I2C bus in eight-bit groups. To send a bit, the SDA line is driven  
towards the intended state while the SCL is low (a low SDA indicates a zero bit). Once the SDA has  
settled, the SCL line is brought high and then low. This pulse on SCL clocks the SDA bit into the  
receiver’s shift register.  
A two-byte serial protocol is used containing one byte for address and one byte data. Data and  
address transfer are transmitted MSB first for both read and write operations. All transmissions begin  
with the START condition from the master while the bus is in idle state (the bus is free). It is initiated  
by a high to low transition on the SDA line while the SCL is in the high state (a STOP condition is  
indicated by a low to high transition on the SDA line while the SCL is in the high state).  
SCL  
SDA  
Figure 12: I2C START and STOP Condition Timing  
The I2C bus is monitored for a valid slave address whenever the interface is enabled. It responds  
immediately when it receives its own slave address. The acknowledge is done by pulling the SDA  
line low during the following clock cycle (white blocks marked with A in Figure 13 and Figure 14).  
The protocol for a register write from master to slave consists of a START condition, a slave address  
with read/write bit, and the eight-bit register address followed by eight bits of data, terminated by a  
STOP condition. DA9130 responds to all bytes with acknowledge (A), see Figure 13.  
P
S
SLAVEadr  
7-bits  
W
A
REGadr  
8-bits  
A
DATA  
8-bits  
A
1-bit  
Master to Slave  
Slave to Master  
S = START condition  
P = STOP condition  
A = Acknowledge (low)  
W = Write (low)  
Figure 13: I2C Byte Write (SDA Line)  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
When the host reads data from a register it first has to write to DA9130 with the target register  
address and then read from DA9130 with a repeated START, or alternatively a second START,  
condition. After receiving the data, the host sends no acknowledge (A*) and terminates the  
transmission with a STOP condition, see Figure 14.  
A*  
P
S
SLAVEadr W A REGadr A Sr SLAVEadr  
R
A
DATA  
8-bits  
1-bit  
7-bits 1-bit  
8-bits  
7-bits  
S
SLAVEadr W A REGadr  
A
P
S
SLAVEadr  
R
A
DATA  
8-bits  
A*  
P
7-bits 1-bit  
8-bits  
7-bits 1-bit  
Master to Slave  
Slave to Master  
S = START condition  
Sr = Repeated START condition  
P = STOP condition  
A = Acknowledge (low)  
A* = No Acknowledge  
W = Write (low)  
R = Read (high)  
Figure 14: I2C Byte Read (SDA Line) Examples  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
5
Register Definitions  
5.1 Register Map  
Table 19: Register Map  
Addr  
Register  
7
6
5
4
3
2
1
0
System Module  
System  
0x0001  
0x0002  
0x0003  
0x0004  
SYS_STATUS_0  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
PG1  
Reserved  
OV1  
TEMP_CRIT  
UV1  
TEMP_WARN  
OC1  
SYS_STATUS_1  
SYS_STATUS_2  
SYS_EVENT_0  
Reserved  
Reserved  
GPIO2  
GPIO1  
GPIO0  
Reserved  
E_TEMP_CRI  
T
E_TEMP_WA  
RN  
0x0005  
0x0006  
0x0007  
SYS_EVENT_1  
SYS_EVENT_2  
SYS_MASK_0  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
E_PG1  
E_OV1  
E_UV1  
E_OC1  
Reserved  
Reserved  
E_GPIO2  
Reserved  
E_GPIO1  
E_GPIO0  
M_TEMP_CRI  
T
M_TEMP_WA  
RN  
0x0008  
0x0009  
0x000A  
SYS_MASK_1  
SYS_MASK_2  
SYS_MASK_3  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
M_PG1  
M_OV1  
M_UV1  
M_OC1  
Reserved  
M_GPIO2  
Reserved  
M_GPIO1  
Reserved  
M_GPIO0  
M_VR_H  
OT  
M_PG1_STA  
T
0x000B  
0x000C  
0x000D  
SYS_CONFIG_0  
SYS_CONFIG_1  
SYS_CONFIG_2  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
OC_LATCHOFF<1:0>  
OSC_TUNE<2:0>  
OC_DVC_  
MASK  
PG_DVC_MASK<1:0>  
Reserved  
Reserved  
0x000E  
SYS_CONFIG_3  
Reserved  
Reserved  
Reserved  
I2C_TIMEOU  
T
Reserved  
0x0010  
0x0011  
SYS_GPIO0_0  
SYS_GPIO0_1  
Reserved  
Reserved  
Reserved  
GPIO0_MODE<3:0>  
GPIO0_OBUF  
GPIO0_D  
EB_FALL  
GPIO0_D  
EB_RISE  
GPIO0_DEB<1:0>  
GPIO0_P  
UPD  
GPIO0_PO  
L
GPIO0_TRIG<1:0>  
GPIO1_TRIG<1:0>  
GPIO2_TRIG<1:0>  
0x0012  
0x0013  
SYS_GPIO1_0  
SYS_GPIO1_1  
Reserved  
Reserved  
Reserved  
GPIO1_MODE<3:0>  
GPIO1_OBUF  
GPIO2_OBUF  
GPIO1_D  
EB_FALL  
GPIO1_D  
EB_RISE  
GPIO1_DEB<1:0>  
GPIO1_P  
UPD  
GPIO1_PO  
L
0x0014  
0x0015  
SYS_GPIO2_0  
SYS_GPIO2_1  
Reserved  
Reserved  
Reserved  
GPIO2_MODE<3:0>  
GPIO2_D  
EB_FALL  
GPIO2_D  
EB_RISE  
GPIO2_DEB<1:0>  
GPIO2_P  
UPD  
GPIO2_PO  
L
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Addr  
Register  
7
6
5
4
3
2
1
0
Buck Control  
Buck1  
0x0020  
0x0021  
0x0022  
0x0023  
0x0024  
BUCK_BUCK1_0  
Reserved  
Reserved  
Reserved  
CH1_SR_DVC_DWN<2:0>  
CH1_SR_SHDN<2:0>  
CH1_SR_DVC_UP<2:0>  
CH1_SR_STARTUP<2:0>  
CH1_ILIM<3:0>  
CH1_EN  
BUCK_BUCK1_1  
BUCK_BUCK1_2  
BUCK_BUCK1_3  
BUCK_BUCK1_4  
CH1_PD_DIS  
Reserved  
Reserved  
Reserved  
CH1_VMAX<7:0>  
Reserved  
Reserved  
Reserved  
CH1_VSE  
L
CH1_B_MODE<1:0>  
CH1_A_MODE<1:0>  
0x0025  
0x0026  
0x0027  
BUCK_BUCK1_5  
BUCK_BUCK1_6  
BUCK_BUCK1_7  
CH1_A_VOUT<7:0>  
CH1_B_VOUT<7:0>  
Reserved  
Reserved  
Reserved  
Reserved  
Reserved  
VRC<3:0>  
Reserved  
Reserved  
Serialization  
0x0048  
0x0049  
0x004A  
OTP_DEVICE_ID  
DEV_ID<7:0>  
MRC<3:0>  
OTP_VARIANT_ID  
OTP_CUSTOMER_I  
D
CUST_ID<7:0>  
0x004B  
OTP_CONFIG_ID  
CONFIG_REV<7:0>  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
5.1.1  
System  
Table 20: SYS_STATUS_0 (0x0001)  
Bit  
[1]  
[0]  
Symbol  
Description  
TEMP_CRIT  
TEMP_WARN  
Asserted whilst the thermal shutdown threshold is exceeded  
Asserted whilst the thermal warning threshold is exceeded  
Table 21: SYS_STATUS_1 (0x0002)  
Bit  
[3]  
[2]  
[1]  
[0]  
Symbol  
PG1  
Description  
Asserted whilst Buck1 output voltage is in range  
Asserted whilst Buck1 output is over-voltage  
Asserted whilst Buck1 output is under-voltage  
Asserted whilst Buck1 output is over-current  
OV1  
UV1  
OC1  
Table 22: SYS_STATUS_2 (0x0003)  
Bit  
[2]  
[1]  
[0]  
Symbol  
GPIO2  
GPIO1  
GPIO0  
Description  
GPIO2 status  
GPIO1 status  
GPIO0 status  
Table 23: SYS_EVENT_0 (0x0004)  
Bit  
Symbol  
Description  
TEMP_CRIT event. Write 1 to clear this bit after the event source has been  
released.  
[1]  
E_TEMP_CRIT  
TEMP_WARN event. Write 1 to clear this bit after the event source has been  
released.  
[0]  
E_TEMP_WARN  
Table 24: SYS_EVENT_1 (0x0005)  
Bit  
Symbol  
Description  
PG1 caused event. Write 1 to clear this bit after the event source has been  
released.  
[3]  
E_PG1  
OV1 caused event. Write 1 to clear this bit after the event source has been  
released.  
[2]  
[1]  
[0]  
E_OV1  
E_UV1  
E_OC1  
UV1 caused event. Write 1 to clear this bit after the event source has been  
released.  
OC1 caused event. Write 1 to clear this bit after the event source has been  
released.  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 25: SYS_EVENT_2 (0x0006)  
Bit  
Symbol  
Description  
GPIO2 event. Write 1 to clear this bit after the event source has been  
released.  
[2]  
E_GPIO2  
GPIO1 event. Write 1 to clear this bit after the event source has been  
released.  
[1]  
[0]  
E_GPIO1  
E_GPIO0  
GPIO0 event. Write 1 to clear this bit after the event source has been  
released.  
Table 26: SYS_MASK_0 (0x0007)  
Bit  
[1]  
[0]  
Symbol  
Description  
M_TEMP_CRIT  
TEMP_CRIT IRQ mask  
M_TEMP_WARN TEMP_WARN IRQ mask  
Table 27: SYS_MASK_1 (0x0008)  
Bit  
[3]  
[2]  
[1]  
[0]  
Symbol  
M_PG1  
M_OV1  
M_UV1  
M_OC1  
Description  
PG1 event IRQ mask  
OV1 event IRQ mask  
UV1 event IRQ mask  
OC1 event IRQ mask  
Table 28: SYS_MASK_2 (0x0009)  
Bit  
[2]  
[1]  
[0]  
Symbol  
Description  
M_GPIO2  
M_GPIO1  
M_GPIO0  
GPIO2 IRQ mask  
GPIO1 IRQ mask  
GPIO0 IRQ mask  
Table 29: SYS_MASK_3 (0x000A)  
Bit  
Symbol  
Description  
Temp warning status IRQ mask. Initial value is determined by CONF pin  
setting at the start-up if CONF_EN = 1, see Section 4.2.3.3  
[3]  
M_VR_HOT  
PG1 status IRQ mask. Initial value is determined by CONF pin setting at the  
start-up if CONF_EN = 1, see Section 4.2.3.3  
[0]  
M_PG1_STAT  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 30: SYS_CONFIG_2 (0x000D)  
Bit  
Symbol  
Description  
Over-current latch-off setting. BUCK shut-down after OCP for 8 µs/1 ms/3 ms  
unless disable setting. IRQ is generated unless IRQ is masked.  
Value  
0x0  
0x1  
Description  
Latch off disable  
[6:5] OC_LATCHOFF  
Latch off after 8 µs of OCP signal  
Latch off after 1 ms of OCP signal  
Latch off after 3 ms of OCP signal  
0x2  
0x3  
Over-current event (IRQ and latch-off feature) mask during DVC ramp-up and  
ramp-down  
[4]  
OC_DVC_MASK  
Power-good mask during DVC  
Value  
0x0  
0x1  
Description  
No mask  
[3:2] PG_DVC_MASK  
Mask as not power good during DVC  
Mask as power good during DVC  
Reserved  
0x2  
0x3  
Table 31: SYS_CONFIG_3 (0x000E)  
Bit  
Symbol  
Description  
Tune oscillator frequency, tuned frequency = Current + OSC_TUNE *  
160 kHz  
Value  
0x3  
0x2  
0x1  
0x0  
0x7  
0x6  
0x5  
0x4  
Description  
3
2
1
[6:4]  
OSC_TUNE  
0
-1  
-2  
-3  
-4  
[1]  
I2C_TIMEOUT  
Enable automatic reset of 2-wire interface (if SDA stays low for >50 ms).  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 32: SYS_GPIO0_0 (0x0010)  
Bit  
Symbol  
Description  
GPIO function mode select  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
0x8  
0x9  
0xA  
0xB  
0xC  
0xD  
0xE  
0xF  
Description  
GPIO disable  
EN1 input  
Reserved  
Reserved  
DVC1 input  
Reserved  
Reserved  
[4:1]  
GPIO0_MODE  
RELOAD input  
PG1 output  
Reserved  
Reserved  
Reserved  
nIRQ output  
Reserved  
Low output  
High output  
GPIO output buffer select  
Value  
0x0  
Description  
[0]  
GPIO0_OBUF  
open-drain output  
push-pull output  
0x1  
Table 33: SYS_GPIO0_1 (0x0011)  
Bit  
[7]  
[6]  
Symbol  
Description  
GPIO0_DEB_FALL  
GPIO0_DEB_RISE  
GPI debouce falling edge  
GPI debounce rising edge  
GPI debounce time  
Value  
0x0  
0x1  
Description  
100 µs debouce  
1 ms debouce  
[5:4]  
GPIO0_DEB  
0x2  
10 ms debounce  
100 ms debounce  
0x3  
GPIO pull-up/pull-down enable  
Value  
0x0  
Description  
[3]  
GPIO0_PUPD  
GPI: pull-down disabled, GPO: pull-up to AVDD  
disabled  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
0x1  
GPI: pull-down enabled, GPO: pull-up to AVDD enabled  
GPIO polarity  
Value  
0x0  
Description  
[2]  
GPIO0_POL  
GPIO is active-high  
GPIO is active-low  
0x1  
GPI trigger type  
Value  
0x0  
0x1  
Description  
Dual-edge triggered  
Pos-edge triggered  
Neg-edge triggered  
Reserved (No trigger)  
[1:0]  
GPIO0_TRIG  
0x2  
0x3  
Table 34: SYS_GPIO1_0 (0x0012)  
Bit  
Symbol  
Description  
GPIO function mode select. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
0x8  
0x9  
0xA  
0xB  
0xC  
0xD  
0xE  
0xF  
Description  
GPIO disable  
EN1 input  
Reserved  
Reserved  
DVC1 input  
Reserved  
Reserved  
[4:1]  
GPIO1_MODE  
RELOAD input  
PG1 output  
Reserved  
Reserved  
Reserved  
nIRQ output  
Reserved  
Low output  
High output  
GPIO output buffer select. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
Value  
0x0  
Description  
[0]  
GPIO1_OBUF  
open-drain output  
push-pull output  
0x1  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 35: SYS_GPIO1_1 (0x0013)  
Bit  
Symbol  
Description  
GPI debouce falling edge. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
[7]  
GPIO1_DEB_FALL  
GPI debounce rising edge. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
[6]  
GPIO1_DEB_RISE  
GPIO1_DEB  
GPI debounce time. Initial value is determined by CONF pin setting at  
the start-up in CONF_EN = 1  
Value  
0x0  
0x1  
Description  
100 µs debouce  
1 ms debouce  
[5:4]  
0x2  
10 ms debounce  
100 ms debounce  
0x3  
GPIO pull-up/pull-down enable. Initial value is determined by CONF  
pin setting at the start-up in CONF_EN = 1  
Value  
0x0  
Description  
[3]  
[2]  
GPIO1_PUPD  
GPI: pull-down disabled, GPO: pull-up to AVDD  
disabled  
0x1  
GPI: pull-down enabled, GPO: pull-up to AVDD enabled  
GPIO polarity. Initial value is determined by CONF pin setting at the  
start-up in CONF_EN = 1  
Value  
0x0  
Description  
GPIO1_POL  
GPIO is active-high  
GPIO is active-low  
0x1  
GPI trigger type. Initial value is determined by CONF pin setting at the  
start-up in CONF_EN = 1  
Value  
0x0  
0x1  
Description  
Dual-edge triggered  
Pos-edge triggered  
Neg-edge triggered  
Reserved (No trigger)  
[1:0]  
GPIO1_TRIG  
0x2  
0x3  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Table 36: SYS_GPIO2_0 (0x0014)  
Bit  
Symbol  
Description  
GPIO function mode select. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
0x8  
0x9  
0xA  
0xB  
0xC  
0xD  
0xE  
0xF  
Description  
GPIO disable  
EN1 input  
Reserved  
Reserved  
DVC1 input  
Reserved  
Reserved  
[4:1]  
GPIO2_MODE  
RELOAD input  
PG1 output  
Reserved  
Reserved  
Reserved  
nIRQ output  
Reserved  
Low output  
High output  
GPIO output buffer select. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
Value  
0x0  
Description  
[0]  
GPIO2_OBUF  
open-drain output  
push-pull output  
0x1  
Table 37: SYS_GPIO2_1 (0x0015)  
Bit  
Symbol  
Description  
GPI debouce falling edge. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
[7]  
GPIO2_DEB_FALL  
GPI debounce rising edge. Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
[6]  
GPIO2_DEB_RISE  
GPIO2_DEB  
GPI debounce time. Initial value is determined by CONF pin setting at  
the start-up in CONF_EN = 1  
Value  
0x0  
0x1  
Description  
100 µs debouce  
1 ms debouce  
[5:4]  
0x2  
10 ms debounce  
100 ms debounce  
0x3  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
GPIO pull-up/pull-down enable. Initial value is determined by CONF  
pin setting at the start-up in CONF_EN = 1  
Value  
0x0  
Description  
[3]  
[2]  
GPIO2_PUPD  
GPI: pull-down disabled, GPO: pull-up to AVDD  
disabled  
0x1  
GPI: pull-down enabled, GPO: pull-up to AVDD enabled  
GPIO polarity. Initial value is determined by CONF pin setting at the  
start-up in CONF_EN = 1  
Value  
0x0  
Description  
GPIO2_POL  
GPIO is active-high  
GPIO is active-low  
0x1  
GPI trigger type. Initial value is determined by CONF pin setting at the  
start-up in CONF_EN = 1  
Value  
0x0  
0x1  
Description  
Dual-edge triggered  
Pos-edge triggered  
Neg-edge triggered  
Reserved (No trigger)  
[1:0]  
GPIO2_TRIG  
0x2  
0x3  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
5.1.2  
Buck1  
Table 38: BUCK_BUCK1_0 (0x0020)  
Bit  
Symbol  
Description  
Voltage slew-rate for DVC ramp-down  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
Description  
10 mV/8 µs  
10 mV/4 µs  
10 mV/2 µs  
10 mV/µs  
[6:4]  
CH1_SR_DVC_DWN  
20 mV/µs  
Reserved  
Reserved  
Reserved  
Voltage slew-rate for DVC ramp-up  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
Description  
10 mV/8 µs  
10 mV/4 µs  
10 mV/2 µs  
10 mV/µs  
[3:1]  
CH1_SR_DVC_UP  
20 mV/µs  
40 mV/µs  
Reserved  
Reserved  
Channel enable. Initial value is determined by CONF pin setting at the  
start-up in CONF_EN = 1  
[0]  
CH1_EN  
Table 39: BUCK_BUCK1_1 (0x0021)  
Bit  
Symbol  
Description  
Voltage slew-rate during shut-down  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
Description  
10 mV/8 µs  
10 mV/4 µs  
10 mV/2 µs  
10 mV/µs  
[6:4]  
CH1_SR_SHDN  
20 mV/µs  
Reserved  
Reserved  
Immediate power-down  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Voltage slew-rate during startup  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
Description  
10 mV/8 µs  
10 mV/4 µs  
10 mV/2 µs  
10 mV/µs  
[3:1]  
CH1_SR_STARTUP  
20 mV/µs  
40 mV/µs  
Reserved  
Reserved  
[0]  
CH1_PD_DIS  
Pull-down while buck is disabled. 0: enable, 1: disable  
Table 40: BUCK_BUCK1_2 (0x0022)  
Bit  
Symbol  
Description  
Select OCP threshold (A)  
Value  
0x0  
0x1  
0x2  
0x3  
0x4  
0x5  
0x6  
0x7  
0x8  
0x9  
0xA  
0xB  
0xC  
0xD  
0xE  
0xF  
Description  
Reserved  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
[3:0]  
CH1_ILIM  
6.5  
7.0  
7.5  
8.0  
8.5  
9.0  
9.5  
10.0  
Disable  
Table 41: BUCK_BUCK1_3 (0x0023)  
Bit  
Symbol  
Description  
VOUT max setting (V):  
From 0.30 V (0x1E) to 1.90 V (0xBE) in 10 mV steps.  
This is a read-only register.  
[7:0]  
CH1_VMAX  
Value  
Description  
0x1E  
0.3  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
0x1F  
0x20  
0.31  
0.32  
Continuing through…  
0x99  
To…  
0xBD  
0xBE  
1.53  
1.89  
1.9  
Table 42: BUCK_BUCK1_4 (0x0024)  
Bit  
Symbol  
Description  
Output voltage and operation selection: 0: A, 1: B.  
Initial value is determined by CONF pin setting at the start-up in  
CONF_EN = 1  
[4]  
CH1_VSEL  
Operation mode selection.  
Initial value is determined by CONF pin setting at the start-up in  
CONF_EN = 1  
Value  
0x0  
Description  
[3:2]  
CH1_B_MODE  
Force PFM operation  
0x1  
Force PWM operation (full phase)  
Force PWM operation (with phase shedding)  
Auto mode  
0x2  
0x3  
Operation mode selection.  
Initial value is determined by CONF pin setting at the start-up in  
CONF_EN = 1  
Value  
0x0  
Description  
[1:0]  
CH1_A_MODE  
Force PFM operation  
0x1  
Force PWM operation (full phase)  
Force PWM operation (with phase shedding)  
Auto mode  
0x2  
0x3  
Table 43: BUCK_BUCK1_5 (0x0025)  
Bit  
Symbol  
Description  
Output voltage setting A: Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
From 0.30 V (0x1E) to 1.90 V (0xBE) in steps of 10 mV (default 1.0 V)  
Write-protected when value is written below 0.30 V or above 1.90 V  
Value  
0x1E  
0x1F  
0x20  
Description  
0.3  
[7:0]  
CH1_A_VOUT  
0.31  
0.32  
Continuing through…  
0x64  
1
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
39 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
To…  
0xBC  
0xBD  
0xBE  
1.88  
1.89  
1.9  
Table 44: BUCK_BUCK1_6 (0x0026)  
Bit  
Symbol  
Description  
Output voltage setting B: Initial value is determined by CONF pin  
setting at the start-up in CONF_EN = 1  
From 0.30 V (0x1E) to 1.90 V (0xBE) in steps of 10 mV (default 1.0 V)  
Write-protected when value is written below 0.30 V or above 1.90 V  
Value  
0x1E  
0x1F  
0x20  
Description  
0.3  
0.31  
0.32  
[7:0]  
CH1_B_VOUT  
Continuing through…  
0x64  
To…  
0xBC  
0xBD  
0xBE  
1
1.88  
1.89  
1.9  
Datasheet  
Revision 2.0  
11-Aug-2021  
CFR0011-120-00  
40 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
5.1.3  
Serialization  
Table 45: OTP_DEVICE_ID (0x0048)  
Bit  
Symbol  
Description  
[7:0]  
DEV_ID  
Device ID  
Table 46: OTP_VARIANT_ID (0x0049)  
Bit  
Symbol  
MRC  
Description  
[7:4]  
[3:0]  
Mask Revision Code  
Chip Variant Code  
VRC  
Table 47: OTP_CUSTOMER_ID (0x004A)  
Bit  
Symbol  
Description  
[7:0]  
CUST_ID  
Customer ID  
Table 48: OTP_CONFIG_ID (0x004B)  
Bit  
Symbol  
Description  
[7:0]  
CONFIG_REV  
OTP Variant  
Datasheet  
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CFR0011-120-00  
41 of 46  
© 2021 Dialog Semiconductor  
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
6
Package Information  
6.1 Package Outlines  
Figure 15: Package Outline Drawing  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
6.2 Package Marking  
Package Marking  
Marking Content  
A1 Corner >  
1st  
Format  
Pin 1 ID  
●
2nd  
3rd  
Orientation/Part No.  
D A 9 1 3 0  
OTP/Option/Year  
Date Code  
x x A T  
y y  
w w z z z z  
4th  
Date Code Format: yy = Year, ww = Week, zzzz = Traceability  
xx identifies the OTP Variant  
A or AT optionally indicate the Automotive and Automotive high temp test options.  
6.3 Moisture Sensitivity Level  
The moisture sensitivity level (MSL) is an indicator for the maximum allowable time period (floor  
lifetime) in which a moisture sensitive plastic device, once removed from the dry bag, can be  
exposed to an environment with a specified maximum temperature and a maximum relative humidity  
before the solder reflow process. The MSL classification is defined in Table 49.  
For detailed information on MSL levels refer to the IPC/JEDEC standard J-STD-020, which can be  
downloaded from http://www.jedec.org.  
The FCQFN package is qualified for MSL 3.  
Table 49: MSL Classification  
MSL Level  
MSL 4  
Floor Lifetime  
72 hours  
168 hours  
4 weeks  
Conditions  
30 °C / 60 % RH  
30 °C / 60 % RH  
30 °C / 60 % RH  
30 °C / 60 % RH  
30 °C / 60 % RH  
MSL 3  
MSL 2A  
MSL 2  
1 year  
MSL 1  
Unlimited  
6.4 Soldering Information  
Refer to the IPC/JEDEC standard J-STD-020 for relevant soldering information. This document can  
be downloaded from http://www.jedec.org.  
Datasheet  
Revision 2.0  
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CFR0011-120-00  
43 of 46  
© 2021 Dialog Semiconductor  
 
DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
7
Ordering Information  
The ordering number consists of the part number followed by a suffix indicating the packing method.  
For details and availability, please consult your Dialog Semiconductor local sales representative.  
Table 50: Ordering Information  
Part Number  
DA9130-xxRT2  
DA9130-xxRT1  
Package  
24 FCQFN wettable flanks, 3.3 x 4.8 T&R, 4800 pcs  
24 FCQFN wettable flanks Tray, 490 pcs  
Package Description  
MOQ  
3 Reels - 14400  
30 Trays - 14700 pcs  
Datasheet  
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CFR0011-120-00  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
8
Application Information  
The following recommended components are examples selected from requirements of a typical  
application.  
8.1 Capacitor Selection  
Ceramic capacitors are used as bypass capacitors at all VDD and output rails. When selecting a  
capacitor, especially for types with high capacitance at smallest physical dimension, the DC bias  
characteristic has to be taken into account.  
Table 51: Recommended Consumer Grade Capacitor Types  
Application  
Value  
(µF)  
Size  
0402  
0603  
0402  
Temp.  
Char.  
Tol.  
(%)  
V-Rate Type  
(V)  
VOUT  
output bypass  
10  
10  
1
X5R  
X5R  
X5R  
20  
20  
10  
6.3  
25  
10  
Murata GRM155R60J106ME15  
PVDDx  
bypass  
Murata GRM188R61E106MA73  
Murata GRM155R61A105KE15  
AVDD bypass  
Table 52: Recommended Automotive Grade Capacitor Types  
Application  
Value  
(µF)  
Size  
0805  
3216  
0805  
Temp.  
Char.  
Tol.  
(%)  
V-Rate Type  
(V)  
VOUT  
output bypass  
10  
10  
1
X7R ±15%  
X7R ±15%  
X7R ±15%  
±10  
±10  
±10  
6.3  
TDK CGA4J1X7R0J106K125AC  
Murata GCM31CR71C106KA64L  
Murata GCM21BR71H105KA03L  
PVDDx  
bypass  
16  
50  
AVDD bypass  
8.2 Inductor Selection  
Inductors should be selected based on the following parameters:  
●
Rated maximum current  
Usually a coil provides two current limits: ISAT specifies the maximum current at which the  
inductance drops by 30 % of the nominal value, and IMAX is defined by the maximum power  
dissipation and is applied to the effective current.  
●
DC resistance  
Critical for the converter efficiency and should therefore be minimized.  
Table 53: Recommended Inductor Types  
Value  
(µH)  
Size (mm)  
IMAX (DC)  
(A)  
ISAT  
(A)  
Tol. DC Resistance Type  
(%)  
(mΩ)  
0.22  
2.5 x 2.0 x 1.2  
6.7  
8
20  
8
TDK TFM252012ALMAR22MTAA  
Datasheet  
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DA9130  
High-Performance, 10 A, Dual-Phase DC-DC  
Converter for Mobile and Portable Applications  
Status Definitions  
Revision  
Datasheet Status  
Product Status  
Definition  
1.<n>  
Target  
Development  
This datasheet contains the design specifications for product development.  
Specifications may be changed in any manner without notice.  
2.<n>  
3.<n>  
Preliminary  
Final  
Qualification  
Production  
This datasheet contains the specifications and preliminary characterization  
data for products in pre-production. Specifications may be changed at any  
time without notice in order to improve the design.  
This datasheet contains the final specifications for products in volume  
production. The specifications may be changed at any time in order to  
improve the design, manufacturing and supply. Major specification changes  
are communicated via Customer Product Notifications. Datasheet changes  
are communicated via www.dialog-semiconductor.com.  
4.<n>  
Obsolete  
Archived  
This datasheet contains the specifications for discontinued products. The  
information is provided for reference only.  
Disclaimer  
Unless otherwise agreed in writing, the Dialog Semiconductor products (and any associated software) referred to in this document are not  
designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications  
where failure or malfunction of a Dialog Semiconductor product (or associated software) can reasonably be expected to result in personal injury,  
death or severe property or environmental damage. Dialog Semiconductor and its suppliers accept no liability for inclusion and/or use of Dialog  
Semiconductor products (and any associated software) in such equipment or applications and therefore such inclusion and/or use is at the  
customer’s own risk.  
Information in this document is believed to be accurate and reliable. However, Dialog Semiconductor does not give any representations or  
warranties, express or implied, as to the accuracy or completeness of such information. Dialog Semiconductor furthermore takes no  
responsibility whatsoever for the content in this document if provided by any information source outside of Dialog Semiconductor.  
Dialog Semiconductor reserves the right to change without notice the information published in this document, including, without limitation, the  
specification and the design of the related semiconductor products, software and applications. Notwithstanding the foregoing, for any automotive  
grade version of the device, Dialog Semiconductor reserves the right to change the information published in this document, including, without  
limitation, the specification and the design of the related semiconductor products, software and applications, in accordance with its standard  
automotive change notification process.  
Applications, software, and semiconductor products described in this document are for illustrative purposes only. Dialog Semiconductor makes  
no representation or warranty that such applications, software and semiconductor products will be suitable for the specified use without further  
testing or modification. Unless otherwise agreed in writing, such testing or modification is the sole responsibility of the customer and Dialog  
Semiconductor excludes all liability in this respect.  
Nothing in this document may be construed as a license for customer to use the Dialog Semiconductor products, software and applications  
referred to in this document. Such license must be separately sought by customer with Dialog Semiconductor.  
All use of Dialog Semiconductor products, software and applications referred to in this document is subject to Dialog Semiconductor’s Standard  
Terms and Conditions of Sale, available on the company website (www.dialog-semiconductor.com) unless otherwise stated.  
Dialog, Dialog Semiconductor and the Dialog logo are trademarks of Dialog Semiconductor Plc or its subsidiaries. All other product or service  
names and marks are the property of their respective owners.  
© 2021 Dialog Semiconductor. All rights reserved.  
RoHS Compliance  
Dialog Semiconductor’s suppliers certify that its products are in compliance with the requirements of Directive 2011/65/EU of the European  
Parliament on the restriction of the use of certain hazardous substances in electrical and electronic equipment. RoHS certificates from our  
suppliers are available on request.  
Contact Dialog Semiconductor  
General Enquiry:  
Enquiry Form  
Local Offices:  
https://www.dialog-semiconductor.com/contact/sales-offices  
Datasheet  
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