SLG7NT4953VTR [DIALOG]

Bat_Power_GOOD;


型号：	SLG7NT4953VTR
厂家：	Dialog Semiconductor
描述：	Bat_Power_GOOD
文件：	总12页 (文件大小：465K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SLG7NT4953

Bat_Power_GOOD

FOR INTERNAL USE ONLY

THIS DATASHEET IS FOR INTERNAL USE ONLY – DO NOT DISTRIBUTE

OUTSIDE OF SILEGO AND INTEL.

Rev 0.12

Silego Technology, Inc.

SLG7NT4953_DS_r012

SLG7NT4953_GP_r001

Preliminary

Revised March 08, 2015

SLG7NT4953

Bat_Power_GOOD

General Description

Pin Configuration

Silego SLG7NT4953 is a low power and small

form device. The SoC is housed in a 1.6 x 1.6 mm

STQFN package which is optimal for using with

small devices.

Features

• Low Power Consumption

• Pb-Free / RoHS Compliant

• Halogen-Free

VDD

V3.3A_DSW_PWRGD

VBAT_MON

VCCST_PWRGD

SYS_PWROK

ALL_SYS_PWRGD_PMIC

• STQFN-12 Package

SUS_VR_PWRGD

GND

Output Summary

• 3 Outputs — Push Pull 1X

• 3 Outputs — Open Drain NMOS 1X

STQFN-12

TOP VIEW

Rev 0.12

Silego Technology, Inc.

SLG7NT4953_DS_r012

SLG7NT4953_GP_r001

Preliminary

Revised March 08, 2015

SLG7NT4953

Bat_Power_GOOD

Block Diagram

SLG7NT4953_DS_r012

Preliminary

Page 3

SLG7NT4953

Bat_Power_GOOD

Pin Configuration

Pin #

Pin Name

Type

PWR

Digital Input

Pin Description

Supply Voltage

Digital Input without Schmitt trigger

VDD

V3.3A_DSW_PWRGD

VBAT_MON

Analog Input/Output Analog Input/Output

SUS_VR_PWRGD

DDR_VCCIO_PWRGD

PCH_PWROK

Digital Input

Digital Output

GND

Digital Input without Schmitt trigger

Open Drain NMOS 1X

Ground

GND

ALL_SYS_PWRGD_PMIC

SYS_PWROK

VCCST_PWRGD

RSMRST_PWRGD_N

DPWROK

Digital Output

Push Pull 1X

Open Drain NMOS 1X

Push Pull 1X

Ordering Information

Part Number

Package Type

SLG7NT4953V

V=STQFN-12

SLG7NT4953VTR

STQFN-12 – Tape and Reel (3k units)

SLG7NT4953_DS_r012

Preliminary

Page 4

SLG7NT4953

Bat_Power_GOOD

Absolute Maximum Conditions

Parameter

Min.

-0.3

-1.0

-65

Max.

Unit

V_HIGHto GND

Voltage at input pins

Current at input pin

1.0

125

150

°C

Storage temperature range

Junction temperature

ESD Protection (Human Body Model)

ESD Protection (Charged Device Model)

Moisture Sensitivity Level

2000

1000

Electrical Characteristics

(@ 25°C, unless otherwise stated)

Symbol

V_DD

T_A

Parameter

Supply Voltage

Operating Temperature

Quiescent Current

Maximal Voltage Applied to

any PIN in High-Impedance

State

Maximal Average or DC

Current

(note 1)

Condition/Note

Min.

1.71

-40

Typ.

3.3

Max.

5.5

Unit

°C

I_Q

Static inputs and outputs

µA

V_O

VDD

I_O

Per Each Chip Side

Logic Input, at VDD=1.8V

Logic Input, at VDD=3.3V

Logic Input, at VDD=5.0V

Logic Input, at VDD=1.8V

Logic Input, at VDD=3.3V

Logic Input, at VDD=5.0V

Logic Input PINs; V_IN= VDD

Logic Input PINs; V_IN= 0V

Push Pull,

I_OH= 100uA, 1X Driver, at VDD=1.8 V

Push Pull & PMOS OD,

I_OH= 3mA, 1X Driver, at VDD=3.3 V

Push Pull & PMOS OD,

I_OH= 5mA, 1X Driver, at VDD=5.0 V

Push Pull,

I_OL= 100uA, 1X Driver, at VDD=1.8 V

Open Drain,

I_OL= 100uA, 1X Driver, at VDD=1.8 V

Push Pull,

I_OL= 3mA, 1X Driver, at VDD=3.3 V

Open Drain,

I_OL= 3mA, 1X Driver, at VDD=3.3 V

1.10

1.78

2.64

VDD

0.69

1.21

1.84

1.0

V_IH

V_IL

HIGH-Level Input Voltage

LOW-Level Input Voltage

I_IH

I_IL

HIGH-Level Input Current

LOW-Level Input Current

-1.0

µA

1.0

1.68

2.71

4.15

1.79

3.09

4.73

0.02

0.01

0.18

0.090

HIGH-Level Output Voltage

(note 1)

V_OH

0.03

0.02

0.28

0.147

LOW-Level Output Voltage

(note 1)

V_OL

SLG7NT4953_DS_r012

Preliminary

Page 5

SLG7NT4953

Bat_Power_GOOD

Push Pull,

I_OL= 5mA, 1X Driver, at VDD=5.0 V

Open Drain,

I_OL= 5mA, 1X Driver, at VDD=5.0 V

Push Pull & PMOS OD,

V_OH= V_DD-0.2, 1X Driver, at VDD=1.8 V

Push Pull & PMOS OD,

V_OH= 2.4 V, 1X Driver, at VDD=3.3 V

Push Pull & PMOS OD,

V_OH= 2.4 V, 1X Driver, at VDD=5.0 V

0.23

0.33

0.18

0.12

1.000

5.83

1.394

10.158

HIGH-Level Output Current

(note 1)

I_OH

21.808 29.008

Push Pull,

V_OL=0.15V, 1X Driver, at VDD=1.8 V

Open Drain,

V_OL=0.15V, 1X Driver, at VDD=1.8 V

Push Pull,

V_OL=0.4V, 1X Driver, at VDD=3.3 V

Open Drain,

V_OL=0.4V, 1X Driver, at VDD=3.3 V

Push Pull,

V_OL=0.4V, 1X Driver, at VDD=5.0 V

Open Drain,

0.76

1.37

4.06

1.339

2.669

6.44

LOW-Level Output Current

(note 1)

I_OL

7.313 12.405

6.01 9.73

11.756 17.38

V_OL=0.4V, 1X Driver, at VDD=5.0 V

ACMP0 threshold including input offset,

reference voltage variation and

hysteresis, at temperature 25°C.

Analog Comparator

Threshold Voltage

V_ACMP0

897

1000

Analog Comparator

Hysteresis Voltage (note 1)

V_HYST

T_DLY0

T_DLY1

T_DLY2

ACMP 0

At temperature 25°C

At temperature -40°C +85°C (note 1)

At temperature 25°C

At temperature -40°C +85°C (note 1)

At temperature 25°C

At temperature -40°C +85°C (note 1)

At temperature 25°C

18.87

17.02

1.88

1.69

2.33

2.1

2.33

2.1

20.02

2.02

2.5

0.31

20.99

24.85

2.17

2.56

2.67

3.15

2.67

3.15

Delay0 Time

Delay1 Time

Delay2 Time

T_DLY3

T_SU

Delay3 Time

Start up Time

At temperature -40°C +85°C (note 1)

From VDD rising past 1.35V

1. Guaranteed by Design.

SLG7NT4953_DS_r012

Preliminary

Page 6

SLG7NT4953

Bat_Power_GOOD

Functionality Waveforms

Channel 1 (yellow/top line) – PIN#3 (VBAT_MON)

D0 – PIN#2 (V3.3A_DSW_PWRGD)

D1 – PIN#4 (SUS_VR_PWRGD)

D2 – PIN#5 (DDR_VCCIO_PWRGD)

D3 – PIN#12 (DPWROK)

D4 – PIN#11 (RSMRST_PWRGD_N)

D5 – PIN#8 (ALL_SYS_PWRGD_PMIC)

D6 – PIN#10 (VCCST_PWRGD) with external 5kΩ pull up resistor

D7 – PIN#6 (PCH_PWROK) with external 5kΩ pull up resistor

D8 – PIN#9 (SYS_PWROK) with external 5kΩ pull up resistor

1. Chip Functionality

2. Chip Functionality

SLG7NT4953_DS_r012

Preliminary

Page 7

SLG7NT4953

Bat_Power_GOOD

Package Top Marking

Datasheet

Revision

0.12

Programming

Code Number

Locked

Status

Part Code

Revision

Date

001

03/08/2015

The IC security bit is locked/set for code security for production unless otherwise specified. Revision

number is not changed for bit locking.

SLG7NT4953_DS_r012

Preliminary

Page 8

SLG7NT4953

Bat_Power_GOOD

Package Drawing and Dimensions

12 Lead STQFN Package

JEDEC MO-220

SLG7NT4953_DS_r012

Preliminary

Page 9

SLG7NT4953

Bat_Power_GOOD

Tape and Reel Specification

Max Units

Trailer A

Leader B

Pocket (mm)

Nominal

Package

Size (mm)

Reel &

Hub Size

(mm)

# of

Pins

Package Type

Length

per reel per box

Pockets

Width

Pitch

(mm)

STQFN 12L

FC 0.4P

Green

1.6x1.6x0.55

3000

178/60

100

400

100

400

Carrier Tape Drawing and Dimensions

Pocket

Index Hole Index Hole

Pocket

BTM Width

(mm)

Pocket

Depth

(mm)

Index Hole

Pocket

Pitch

(mm)

Index Hole

Diameter

(mm)

BTM

Length

(mm)

to Tape

Edge

to Pocket Tape Width

Center

(mm)

Pitch

(mm)

Package

Type

(mm)

STQFN 12L

FC 0.4P

Green

1.9

0.8

1.5

1.75

3.5

Refer to EIA-481 Specifications

Recommended Reflow Soldering Profile

Please see IPC/JEDEC J-STD-020: latest revision for reflow profile based on package volume of 1.408 mm³(nominal).

More information can be found at www.jedec.org.

SLG7NT4953_DS_r012

Preliminary

Page 10

SLG7NT4953

Bat_Power_GOOD

Datasheet Revision History

Date

Version

0.10

0.11

Change

10/16/2015

12/23/2015

03/08/2016

New design for SLG46120 chip

Updated Device Revision Table

Updated Title Description

0.12

SLG7NT4953_DS_r012

Preliminary

Page 11

SLG7NT4953

Bat_Power_GOOD

Silego Website & Support

Silego Technology Website

Silego Technology provides online support via our website at http://www.silego.com/.This website is used as a means to make files

and information easily available to customers.

For more information regarding Silego Green products, please visit:

http://greenpak.silego.com/

http://greenpak2.silego.com/

http://greenpak3.silego.com/

http://greenfet.silego.com/

http://greenfet2.silego.com/

http://greenclk.silego.com/

Products are also available for purchase directly from Silego at the Silego Online Store at http://www.silego.com/

Silego Technical Support

Datasheets and errata, application notes and example designs, user guides, and hardware support documents and the latest software

releases are available at the Silego website or can be requested directly at info@silego.com.

For specific GreenPAK design or applications questions and support please send e-mail requests to GreenPAK@silego.com

Users of Silego products can receive assistance through several channels:

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Silego Technology has live training assistance and sales support available at http://www.silego.com/. Please contact us to schedule a

1 on 1 training session with one of our application engineers.

Contact Your Local Sales Representative

Customers can contact their local sales representative or field application engineer (FAE) for support. Local sales offices are also

available to help customers. More information regarding your local representative is available at the Silego website or send a request

to info@silego.com

Contact Silego Directly

Silego can be contacted directly via e-mail at info@silego.com or user submission form, located at the following URL:

http://support.silego.com/

Other Information

The latest Silego Technology press releases, listing of seminars and events, listings of worldwide Silego Technology offices and

representatives are all available at http://www.silego.com/

THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS

CRITICAL COMPONENTS IN LIFE

SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. SILEGO TECHNOLOGY DOES NOT ASSUME ANY LIABILITY

ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. SILEGO TECHNOLOGY RESERVES THE RIGHT TO

IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE

SLG7NT4953_DS_r012

Preliminary

Page 12

SLG7NT4953VTR [DIALOG]

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